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([2a01:e0a:982:cbb0:5001:8e1b:dd18:1d3]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3749ee99d6dsm3272538f8f.48.2024.08.30.00.47.08 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 30 Aug 2024 00:47:09 -0700 (PDT) Message-ID: Date: Fri, 30 Aug 2024 09:47:06 +0200 Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: neil.armstrong@linaro.org Reply-To: neil.armstrong@linaro.org Subject: Re: [PATCH v1 0/4] Enable shared SE support over I2C To: Mukesh Kumar Savaliya , konrad.dybcio@linaro.org, andersson@kernel.org, andi.shyti@kernel.org, linux-arm-msm@vger.kernel.org, dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org Cc: quic_vdadhani@quicinc.com References: <20240829092418.2863659-1-quic_msavaliy@quicinc.com> Content-Language: en-US, fr Autocrypt: addr=neil.armstrong@linaro.org; keydata= xsBNBE1ZBs8BCAD78xVLsXPwV/2qQx2FaO/7mhWL0Qodw8UcQJnkrWmgTFRobtTWxuRx8WWP GTjuhvbleoQ5Cxjr+v+1ARGCH46MxFP5DwauzPekwJUD5QKZlaw/bURTLmS2id5wWi3lqVH4 BVF2WzvGyyeV1o4RTCYDnZ9VLLylJ9bneEaIs/7cjCEbipGGFlfIML3sfqnIvMAxIMZrvcl9 qPV2k+KQ7q+aXavU5W+yLNn7QtXUB530Zlk/d2ETgzQ5FLYYnUDAaRl+8JUTjc0CNOTpCeik 80TZcE6f8M76Xa6yU8VcNko94Ck7iB4vj70q76P/J7kt98hklrr85/3NU3oti3nrIHmHABEB AAHNKk5laWwgQXJtc3Ryb25nIDxuZWlsLmFybXN0cm9uZ0BsaW5hcm8ub3JnPsLAkQQTAQoA OwIbIwULCQgHAwUVCgkICwUWAgMBAAIeAQIXgBYhBInsPQWERiF0UPIoSBaat7Gkz/iuBQJk Q5wSAhkBAAoJEBaat7Gkz/iuyhMIANiD94qDtUTJRfEW6GwXmtKWwl/mvqQtaTtZID2dos04 YqBbshiJbejgVJjy+HODcNUIKBB3PSLaln4ltdsV73SBcwUNdzebfKspAQunCM22Mn6FBIxQ GizsMLcP/0FX4en9NaKGfK6ZdKK6kN1GR9YffMJd2P08EO8mHowmSRe/ExAODhAs9W7XXExw UNCY4pVJyRPpEhv373vvff60bHxc1k/FF9WaPscMt7hlkbFLUs85kHtQAmr8pV5Hy9ezsSRa GzJmiVclkPc2BY592IGBXRDQ38urXeM4nfhhvqA50b/nAEXc6FzqgXqDkEIwR66/Gbp0t3+r yQzpKRyQif3OwE0ETVkGzwEIALyKDN/OGURaHBVzwjgYq+ZtifvekdrSNl8TIDH8g1xicBYp QTbPn6bbSZbdvfeQPNCcD4/EhXZuhQXMcoJsQQQnO4vwVULmPGgtGf8PVc7dxKOeta+qUh6+ SRh3vIcAUFHDT3f/Zdspz+e2E0hPV2hiSvICLk11qO6cyJE13zeNFoeY3ggrKY+IzbFomIZY 4yG6xI99NIPEVE9lNBXBKIlewIyVlkOaYvJWSV+p5gdJXOvScNN1epm5YHmf9aE2ZjnqZGoM Mtsyw18YoX9BqMFInxqYQQ3j/HpVgTSvmo5ea5qQDDUaCsaTf8UeDcwYOtgI8iL4oHcsGtUX oUk33HEAEQEAAcLAXwQYAQIACQUCTVkGzwIbDAAKCRAWmrexpM/4rrXiB/sGbkQ6itMrAIfn M7IbRuiSZS1unlySUVYu3SD6YBYnNi3G5EpbwfBNuT3H8//rVvtOFK4OD8cRYkxXRQmTvqa3 3eDIHu/zr1HMKErm+2SD6PO9umRef8V82o2oaCLvf4WeIssFjwB0b6a12opuRP7yo3E3gTCS KmbUuLv1CtxKQF+fUV1cVaTPMyT25Od+RC1K+iOR0F54oUJvJeq7fUzbn/KdlhA8XPGzwGRy 4zcsPWvwnXgfe5tk680fEKZVwOZKIEuJC3v+/yZpQzDvGYJvbyix0lHnrCzq43WefRHI5XTT QbM0WUIBIcGmq38+OgUsMYu4NzLu7uZFAcmp6h8g Organization: Linaro In-Reply-To: <20240829092418.2863659-1-quic_msavaliy@quicinc.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Hi, On 29/08/2024 11:24, Mukesh Kumar Savaliya wrote: > This Series adds support to share QUP based I2C SE between subsystems. > Each subsystem should have its own GPII which interacts between SE and > GSI DMA HW engine. > > Subsystem must acquire Lock over the SE on GPII channel so that it > gets uninterrupted control till it unlocks the SE. It also makes sure > the commonly shared TLMM GPIOs are not touched which can impact other > subsystem or cause any interruption. Generally, GPIOs are being > unconfigured during suspend time. > > GSI DMA engine is capable to perform requested transfer operations > from any of the SE in a seamless way and its transparent to the > subsystems. Make sure to enable “qcom,shared-se” flag only while > enabling this feature. I2C client should add in its respective parent > node. > > --- > Mukesh Kumar Savaliya (4): > dt-bindindgs: i2c: qcom,i2c-geni: Document shared flag > dma: gpi: Add Lock and Unlock TRE support to access SE exclusively > soc: qcom: geni-se: Export function geni_se_clks_off() > i2c: i2c-qcom-geni: Enable i2c controller sharing between two > subsystems > > .../bindings/i2c/qcom,i2c-geni-qcom.yaml | 4 ++ > drivers/dma/qcom/gpi.c | 37 ++++++++++++++++++- > drivers/i2c/busses/i2c-qcom-geni.c | 29 +++++++++++---- > drivers/soc/qcom/qcom-geni-se.c | 4 +- > include/linux/dma/qcom-gpi-dma.h | 6 +++ > include/linux/soc/qcom/geni-se.h | 3 ++ > 6 files changed, 74 insertions(+), 9 deletions(-) > I see in downstream that this flag is used on the SM8650 qupv3_se6_i2c, and that on the SM8650-HDK this i2c is shared between the aDSP battmgr and the linux to access the HDMI controller. Is this is the target use-case ? We have some issues on this platform that crashes the system when Linux does some I2C transfers while battmgr does some access at the same time, the problem is that on the Linux side the i2c uses the SE DMA and not GPI because fifo_disable=0 so by default this bypasses GPI. A temporary fix has been merged: https://lore.kernel.org/all/20240605-topic-sm8650-upstream-hdk-iommu-fix-v1-1-9fd7233725fa@linaro.org/ but it's clearly not a real solution What would be the solution to use the shared i2c with on one side battmgr using GPI and the kernel using SE DMA ? In this case, shouldn't we force using GPI on linux with: ==============><===================================================================== diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c index ee2e431601a6..a15825ea56de 100644 --- a/drivers/i2c/busses/i2c-qcom-geni.c +++ b/drivers/i2c/busses/i2c-qcom-geni.c @@ -885,7 +885,7 @@ static int geni_i2c_probe(struct platform_device *pdev) else fifo_disable = readl_relaxed(gi2c->se.base + GENI_IF_DISABLE_RO) & FIFO_IF_DISABLE; - if (fifo_disable) { + if (gi2c->is_shared || fifo_disable) { /* FIFO is disabled, so we can only use GPI DMA */ gi2c->gpi_mode = true; ret = setup_gpi_dma(gi2c); ==============><===================================================================== Neil