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Thu, 16 Jul 2026 05:48:04 -0700 (PDT) X-Received: by 2002:a05:6a20:db0a:b0:3bf:c223:4640 with SMTP id adf61e73a8af0-3c34d5dd5camr15385962637.32.1784206084526; Thu, 16 Jul 2026 05:48:04 -0700 (PDT) Received: from [192.168.1.9] ([106.222.231.43]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-13cd403a7f7sm10961801c88.0.2026.07.16.05.47.56 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 16 Jul 2026 05:48:04 -0700 (PDT) Message-ID: Date: Thu, 16 Jul 2026 18:17:54 +0530 Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v8 4/4] i2c: qcom-geni: Support multi-owner controllers in GPI mode To: Konrad Dybcio , viken.dadhaniya@oss.qualcomm.com, andi.shyti@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, vkoul@kernel.org, Frank.Li@kernel.org, andersson@kernel.org, konradybcio@kernel.org, dmitry.baryshkov@oss.qualcomm.com, linmq006@gmail.com, quic_jseerapu@quicinc.com, zhengxingda@iscas.ac.cn, kees@kernel.org, agross@kernel.org, linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org Cc: krzysztof.kozlowski@oss.qualcomm.com, bartosz.golaszewski@oss.qualcomm.com, bjorn.andersson@oss.qualcomm.com References: <20260708051023.2872304-1-mukesh.savaliya@oss.qualcomm.com> <20260708051023.2872304-5-mukesh.savaliya@oss.qualcomm.com> Content-Language: en-US From: Mukesh Savaliya In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: YthGPgEDsstmYkiWCmJtCgXeoUGkzY2t X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzE2MDEzMiBTYWx0ZWRfX8KZ6Dl3QzC7a mCUFecEQZodxXcC38VJAx+TvkRxek95kk0b/8Xb9z81OzRgGSevu97pQF3gj63KQXlNawosOnj1 FC0/HF3KtZyRCDUt9oryL5cu2FI8/fjp8DmQcm3E3uuSpQ3m2f/eG6EHWma+/dZdGlslSAjZQlK 5ulLhk0bD1AdppP8Kwkh9ZxTm3Eawa3nwOdPjcxagqo+MUf7Il+xF7as+LgtO0MAdV2bZHauda8 jj/wCtP1ZcyrHIolZIO6yPSMyEk8/GCZ8PlaMJh22ZFYR5elpd3JmzDJlEI68TP40wzd7+MpTuL 2TFzHMx3IcghuW9G+lCRVviaVZwTPwLcCqeoL/QOnzcRfI7+mjQuzqqftTB77htmaQ+pLLqf0Zh Yh5MvRdTX9yn0VSZaUlRij5q2GZxcdUtEQ2Dpj5hMiJAVmqozfcAtDrHl60YVTwfbonkd91mH6U XF/jbuxIKUOt4+focLg== X-Proofpoint-GUID: YthGPgEDsstmYkiWCmJtCgXeoUGkzY2t X-Authority-Analysis: v=2.4 cv=BPODalQG c=1 sm=1 tr=0 ts=6a58d305 cx=c_pps a=Qgeoaf8Lrialg5Z894R3/Q==:117 a=OlrBKP18NtReKxGUJ9moaA==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=EUspDBNiAAAA:8 a=jn-D0AhQX9NsX7IxBaoA:9 a=QEXdDO2ut3YA:10 a=x9snwWr2DeNwDh03kgHS:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwNzE2MDEzMiBTYWx0ZWRfXxSLABAaMIsAq B3RCyXbWOb8+FzaXgOzrGp97p6ElENDcIcBwd7ZJGL7KWJF5pCpknEWzYrFaZARyyeJ25dOL+Qp BhFHVEwWau17m66HirySrKyX6yeLLsE= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-16_04,2026-07-15_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 suspectscore=0 lowpriorityscore=0 adultscore=0 malwarescore=0 priorityscore=1501 phishscore=0 bulkscore=0 spamscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607160132 On 7/15/2026 5:54 PM, Konrad Dybcio wrote: > On 7/8/26 7:10 AM, Mukesh Kumar Savaliya wrote: >> Some platforms use a QUP-based I2C controller in a configuration where the >> controller is shared with another system processor. In this setup the >> operating system must not assume exclusive ownership of the controller or >> its associated pins. >> >> Add support for enabling multi-owner operation when DeviceTree specifies >> qcom,qup-multi-owner. When enabled, mark the underlying serial engine as >> shared so the common GENI resource handling avoids selecting the "sleep" >> pinctrl state, which could disrupt transfers initiated by the other >> processor. >> >> For GPI mode transfers, request lock/unlock TRE sequencing from the GPI >> driver by setting a single lock_action selector per message, emitting lock >> before the first message and unlock after the last message (handling the >> single-message case as well). This serializes access to the shared >> controller without requiring message-position flags to be passed into the >> DMA engine layer. >> >> Signed-off-by: Mukesh Kumar Savaliya >> --- > > [...] > > >> + if (gi2c->se.multi_owner) >> + return dev_err_probe(gi2c->se.dev, -EINVAL, >> + "I2C sharing not supported in non GSI mode\n"); > > ultra nit: "non-GSI" > Will update in next patch. >> + >> tx_depth = geni_se_get_tx_fifo_depth(&gi2c->se); >> >> /* I2C Master Hub Serial Elements doesn't have the HW_PARAM_0 register */ >> @@ -1098,6 +1115,11 @@ static int geni_i2c_probe(struct platform_device *pdev) >> gi2c->clk_freq_out = I2C_MAX_STANDARD_MODE_FREQ; >> } >> >> + if (of_property_read_bool(pdev->dev.of_node, "qcom,qup-multi-owner")) { > > Let's use device_property_present() instead. > Sure, Thanks for the suggestion and review. Will update in next patch. > with that: > > Reviewed-by: Konrad Dybcio > > Konrad