Re: [PATCH 4/7] media: qcom: camss: csiphy: Add support for v2.3.0 two-phase CSIPHY

Vijay Kumar Tumati
2026-01-06T18:05:27Z

On 11/27/2025 12:14 AM, Krzysztof Kozlowski wrote:
> On Wed, Nov 26, 2025 at 01:38:37AM -0800, Hangxiang Ma wrote:
>> Add more detailed resource information for CSIPHY devices in the camss
>> driver along with the support for v2.3.0 in the 2 phase CSIPHY driver
>> that is responsible for the PHY lane register configuration, module
>> reset and interrupt handling.
>>
>> Additionally, generalize the struct name for the lane configuration that
>> had been added for Kaanapali and use it for SM8750 as well as they share
>> the settings.
>>
>> Signed-off-by: Hangxiang Ma <hangxiang.ma@oss.qualcomm.com>
>> ---
>> .../platform/qcom/camss/camss-csiphy-3ph-1-0.c | 11 ++-
>> drivers/media/platform/qcom/camss/camss.c | 107 +++++++++++++++++++++
>> 2 files changed, 114 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
>> index f9db7e195dfe..157e946f67db 100644
>> --- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
>> +++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
>> @@ -684,9 +684,9 @@ csiphy_lane_regs lane_regs_sm8650[] = {
>> {0x0c10, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
>> };
>>
>> -/* 3nm 2PH v 2.4.0 2p5Gbps 4 lane DPHY mode */
>> +/* 3nm 2PH v 2.3.0/2.4.0 2p5Gbps 4 lane DPHY mode */
>> static const struct
>> -csiphy_lane_regs lane_regs_kaanapali[] = {
> There is no such line in next. Your cover letter does not explain
> dependencies.
Will do. Thanks.
>
>> +csiphy_lane_regs lane_regs_v_2_3[] = {
> Best regards,
> Krzysztof
>