From: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
To: Bjorn Andersson <quic_bjorande@quicinc.com>
Cc: <andi.shyti@kernel.org>, <linux-arm-msm@vger.kernel.org>,
<linux-i2c@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<quic_srichara@quicinc.com>, <quic_varada@quicinc.com>
Subject: Re: [PATCH 1/1] i2c: qcom-geni: add 32MHz I2C SE clock support for IPQ5424
Date: Wed, 25 Sep 2024 11:24:02 +0530 [thread overview]
Message-ID: <e2b26bf4-d5ea-4fd8-bcb7-2200aa1bdabc@quicinc.com> (raw)
In-Reply-To: <ZvMk8T0dK+heMLer@hu-bjorande-lv.qualcomm.com>
On 9/25/2024 2:15 AM, Bjorn Andersson wrote:
> On Tue, Sep 24, 2024 at 12:20:20PM +0530, Manikanta Mylavarapu wrote:
>
> Subject gives a clear indication that this is specific to IPQ5424, which
> it isn't. So, please drop that wording from the subject.
>
Okay, sure.
> Perhaps:
> "i2c: qcom-geni: Support systems with 32MHz SE clock"
>
Okay, sure.
>> The IPQ5424 I2C SE clock operates at a frequency of 32MHz. Since the
>> existing map table is based on 19.2MHz, this patch incorporate the
>> clock map table to derive the SCL clock from the 32MHz SE clock.
>
> Then here you're doing the right thing of introducing the IPQ5424, so
> this looks good to me.
>
>>
>> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
>> ---
>> drivers/i2c/busses/i2c-qcom-geni.c | 11 +++++++++++
>> 1 file changed, 11 insertions(+)
>>
>> diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c
>> index 212336f724a6..bbd9ecf09f4b 100644
>> --- a/drivers/i2c/busses/i2c-qcom-geni.c
>> +++ b/drivers/i2c/busses/i2c-qcom-geni.c
>> @@ -71,6 +71,7 @@ enum geni_i2c_err_code {
>>
>> #define I2C_AUTO_SUSPEND_DELAY 250
>> #define KHZ(freq) (1000 * freq)
>> +#define MHZ(freq) (1000000 * freq)
>> #define PACKING_BYTES_PW 4
>>
>> #define ABORT_TIMEOUT HZ
>> @@ -152,11 +153,21 @@ static const struct geni_i2c_clk_fld geni_i2c_clk_map[] = {
>> {KHZ(1000), 1, 3, 9, 18},
>> };
>>
>> +/* source_clock = 32 MHz */
>> +static const struct geni_i2c_clk_fld geni_i2c_clk_map_32M[] = {
>
> I'd prefer that you s/32M/32mhz/, and that you rename geni_i2c_clk_map
> to geni_i2c_clk_map_19p2mhz[].
>
Okay, sure.
>> + {KHZ(100), 7, 14, 18, 40},
>> + {KHZ(400), 4, 3, 11, 20},
>> + {KHZ(1000), 4, 3, 6, 15},
>> +};
>> +
>> static int geni_i2c_clk_map_idx(struct geni_i2c_dev *gi2c)
>> {
>> int i;
>> const struct geni_i2c_clk_fld *itr = geni_i2c_clk_map;
>>
>> + if (clk_get_rate(gi2c->se.clk) == MHZ(32))
>> + itr = geni_i2c_clk_map_32M;
>
> Leave itr uninitialized above and add an else here with the assignment,
> to make it clearer that it's one or the other case. (Compared to "It's
> always 19.2MHz and then in some cases we override that with 32MHz")
>
>
Okay, sure.
> PS. I wouldn't mind you dropping the addition of the MHZ macro and just
> compare clk_get_rate() with 32000000 and 19200000. But that's a matter
> of taste.
>
Okay, sure. I will drop MHZ macro.
Thanks & Regards,
Manikanta.
> Regards,
> Bjorn
>
>> +
>> for (i = 0; i < ARRAY_SIZE(geni_i2c_clk_map); i++, itr++) {
>> if (itr->clk_freq_out == gi2c->clk_freq_out) {
>> gi2c->clk_fld = itr;
>> --
>> 2.34.1
>>
next prev parent reply other threads:[~2024-09-25 5:54 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-24 6:50 [PATCH 1/1] i2c: qcom-geni: add 32MHz I2C SE clock support for IPQ5424 Manikanta Mylavarapu
2024-09-24 20:45 ` Bjorn Andersson
2024-09-25 5:54 ` Manikanta Mylavarapu [this message]
2024-09-25 5:39 ` Vladimir Zapolskiy
2024-09-25 6:22 ` Manikanta Mylavarapu
2024-09-25 7:36 ` Mukesh Kumar Savaliya
2024-09-25 8:44 ` Manikanta Mylavarapu
2024-09-25 9:55 ` Mukesh Kumar Savaliya
2024-09-25 10:03 ` Manikanta Mylavarapu
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