From: Ryan Chen <ryan_chen-SAlXDmAnmOAqDJ6do+/SaQ@public.gmane.org>
To: Benjamin Herrenschmidt
<benh-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org>,
Brendan Higgins
<brendanhiggins-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>
Cc: "Wolfram Sang" <wsa-z923LK4zBo2bacvFa/9K2g@public.gmane.org>,
"Rob Herring" <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
"Mark Rutland" <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
"Thomas Gleixner" <tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>,
"Jason Cooper" <jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org>,
"Marc Zyngier" <marc.zyngier-5wv7dgnIgG8@public.gmane.org>,
"Joel Stanley" <joel-U3u1mxZcP9KHXe+LvDLADg@public.gmane.org>,
"Vladimir Zapolskiy" <vz-ChpfBGZJDbMAvxtiuMwx3w@public.gmane.org>,
"Kachalov Anton" <mouse-Pma6HLj0uuo@public.gmane.org>,
"Cédric Le Goater" <clg-Bxea+6Xhats@public.gmane.org>,
"linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"Linux Kernel Mailing List"
<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"OpenBMC Maillist"
<openbmc-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org>
Subject: RE: [PATCH v6 4/5] i2c: aspeed: added driver for Aspeed I2C
Date: Tue, 25 Apr 2017 09:47:18 +0000 [thread overview]
Message-ID: <e90ff5914518400ea6902ca40406eb0f@TWMBX01.aspeed.com> (raw)
In-Reply-To: <1493112875.25766.268.camel-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org>
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset="utf-8", Size: 18710 bytes --]
Thanks Ryan. Can you shed some light on the meaning of the high-speed bit as well please ?
About ASPEED_I2CD_M_HIGH_SPEED_EN, it is support for I2C specification "High speed transfer". And also device need support it.
If you just speed up the I2C bus clock, you donât have to enable ASPEED_I2CD_M_HIGH_SPEED_EN, just change the clock is ok.
-----Original Message-----
From: Benjamin Herrenschmidt [mailto:benh@kernel.crashing.org]
Sent: Tuesday, April 25, 2017 5:35 PM
To: Ryan Chen <ryan_chen@aspeedtech.com>; Brendan Higgins <brendanhiggins@google.com>
Cc: Wolfram Sang <wsa@the-dreams.de>; Rob Herring <robh+dt@kernel.org>; Mark Rutland <mark.rutland@arm.com>; Thomas Gleixner <tglx@linutronix.de>; Jason Cooper <jason@lakedaemon.net>; Marc Zyngier <marc.zyngier@arm.com>; Joel Stanley <joel@jms.id.au>; Vladimir Zapolskiy <vz@mleia.com>; Kachalov Anton <mouse@mayc.ru>; Cédric Le Goater <clg@kaod.org>; linux-i2c@vger.kernel.org; devicetree@vger.kernel.org; Linux Kernel Mailing List <linux-kernel@vger.kernel.org>; OpenBMC Maillist <openbmc@lists.ozlabs.org>
Subject: Re: [PATCH v6 4/5] i2c: aspeed: added driver for Aspeed I2C
On Tue, 2017-04-25 at 08:50 +0000, Ryan Chen wrote:
> Hello All,
> ASPEED_I2CD_M_SDA_DRIVE_1T_EN,
> ASPEED_I2CD_SDA_DRIVE_1T_EN is specific for some case usage.Â
> For example, if i2c bus is use on "high speed" and "single slave and
> master" and i2c bus is too long. It need drive SDA or SCL less lunacy.
> It would enable it.
> Otherwise, donât enable it. especially in multi-master.
> It canât be enable.
That smells like a specific enough use case that we should probably cover with a device-tree property, something like an empty "sda-extra-drive" property (empty properties are typically used for booleans, their presence means "true").
Thanks Ryan. Can you shed some light on the meaning of the high-speed bit as well please ? Does it force to a specific speed (ignoring the
divisor) or we can still play with the clock high/low counts ?
Cheers,
Ben.
> Â Â
>
>
> Best Regards,
> Ryan
>
> ä¿¡é©ç§æè¡ä»½æéå
¬å¸
> ASPEED Technology Inc.
> 2F,No.15,Industry East Road 4.,Hsinchu Science Park, Hsinchu City
> 30077, Taiwan
> Tel: 886-3-578-9568Â #857
> Fax: 886-3-578-9586
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>
> -----Original Message-----
> From: Brendan Higgins [mailto:brendanhiggins@google.com]
> Sent: Tuesday, April 25, 2017 4:32 PM
> To: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> Cc: Wolfram Sang <wsa@the-dreams.de>; Rob Herring <robh+dt@kernel.org
> >; Mark Rutland <mark.rutland@arm.com>; Thomas Gleixner <tglx@linutro
> nix.de>; Jason Cooper <jason@lakedaemon.net>; Marc Zyngier <marc.zyng
> ier@arm.com>; Joel Stanley <joel@jms.id.au>; Vladimir Zapolskiy <vz@m
> leia.com>; Kachalov Anton <mouse@mayc.ru>; Cédric Le Goater <clg@kaod
> .org>; linux-i2c@vger.kernel.org; devicetree@vger.kernel.org; Linux
> Kernel Mailing List <linux-kernel@vger.kernel.org>; OpenBMC Maillist
> <openbmc@lists.ozlabs.org>; Ryan Chen <ryan_chen@aspeedtech.com>
> Subject: Re: [PATCH v6 4/5] i2c: aspeed: added driver for Aspeed I2C
>
> Adding Ryan.
>
> On Mon, Apr 24, 2017 at 7:19 PM, Benjamin Herrenschmidt <benh@kernel.
> crashing.org> wrote:
> > On Mon, 2017-04-24 at 11:56 -0700, Brendan Higgins wrote:
> > > > > +struct aspeed_i2c_bus {
> > > > > +     struct i2c_adapter              adap;
> > > > > +     struct device                   *dev;
> > > > > +     void __iomem                    *base;
> > > > > +Â Â Â Â Â /* Synchronizes I/O mem access to base. */
> > > > > +     spinlock_t                      lock;
> > > >
> > > > I am not entirely convinced we need that lock. The i2c core will
> > > > take a mutex protecting all operations on the bus. So we only
> > > > need to synchronize between our "xfer" code and our interrupt
> > > > handler.
> > >
> > > You are right if both having slave and master active at the same
> > > time was not possible; however, it is.
> >
> > Right, I somewhat forgot about the slave case.
> >
> > Â ...
> >
> > > > Some of those error states probably also warrant a reset of the
> > > > controller, I think aspeed does that in the SDK.
> > >
> > > For timeout and cmd_err, I do not see any argument against it; it
> > > sounds like we are in a very messed up, very unknown state, so
> > > full reset is probably the best last resort.
> >
> > Yup.
> >
> > > For SDA staying pulled down, I
> > > think we can say with reasonable confidence that some device on
> > > our bus is behaving very badly and I am not convinced that
> > > resetting the controller is likely to do anything to help;
> >
> > Right. Hammering with STOPs and pray ...
>
> I think sending recovery mode sends stops as a part of the recovery
> algorithm it executes.
>
> >
> > > Â that being said, I really
> > > do not have any good ideas to address that. So maybe praying and
> > > resetting the controller is *the most reasonable thing to do.* I
> > > would like to know what you think we should do in that case.
> >
> > Well, there's a (small ?) chance that it's a controller bug
> > asserting the line so ... but there's little we can do if not.
>
> True.
>
> >
> > > While I was thinking about this I also realized that the SDA line
> > > check after recovery happens in the else branch, but SCL line
> > > check does not happen after we attempt to STOP if SCL is hung. If
> > > we decide to make special note SDA being hung by a device that
> > > won't let go, we might want to make a special note that SCL is
> > > hung by a device that won't let go. Just a thought.
> >
> > Maybe. Or just "unrecoverable error"... hopefully these don't happen
> > too often ... We had cases of a TPM misbehaving like that.
>
> Yeah, definitely should print something out.
>
> >
> > > > > +out:
> > >
> > > ...
> > > > What about I2C_M_NOSTART ?
> > > >
> > > > Not that I've ever seen it used... ;-)
> > >
> > > Right now I am not doing any of the protocol mangling options, but
> > > I can add them in if you think it is important for initial
> > > support.
> >
> > No, not important, we can add that later if it ever becomes useful.
> >
> > Â ...
> >
> > > > In general, you always ACK all interrupts first. Then you handle
> > > > the bits you have harvested.
> > > >
> > >
> > > The documentation says to ACK the interrupt after handling in the
> > > RX
> > > case:
> > >
> > > <<<
> > > S/W needs to clear this status bit to allow next data receiving.
> > > > > >
> > >
> > > I will double check with Ryan to make sure TX works the same way.
> > >
> > > > > +Â Â Â Â Â if (irq_status & ASPEED_I2CD_INTR_ERROR ||
> > > > > +Â Â Â Â Â Â Â Â Â (!bus->msgs && bus->master_state !=
> > > > > ASPEED_I2C_MASTER_STOP)) {
> > >
> > > ...
> > > >
> > > > I would set master_state to "RECOVERY" (new state ?) and ensure
> > > > those things are caught if they happen outside of a recovery.
> >
> > I replied privately ... as long as we ack before we start a new
> > command we should be ok but we shouldn't ack after.
> >
> > Your latest patch still does that. It will do things like start a
> > STOP command *then* ack the status bits. I'm pretty sure that's
> > bogus.
> >
> > That way it's a lot simpler to simply move the
> >
> > Â Â Â Â Â Â Â Â writel(irq_status, bus->base + ASPEED_I2C_INTR_STS_REG);
> >
> > To either right after the readl of the status reg at the beginning
> > of aspeed_i2c_master_irq().
> >
> > I would be very surprised if that didn't work properly and wasn't
> > much safer than what you are currently doing.
>
> I think I tried your way and it worked. In anycase, Ryan will be able
> to clarify for us.
>
> >
> > > Let me know if you still think we need a "RECOVERY" state.
> >
> > The way you just switch to stop state and store the error for later
> > should work I think.
> >
> > > >
> > > > > +Â Â Â Â Â if (bus->master_state == ASPEED_I2C_MASTER_START) {
> > >
> > > ...
> > > >
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â dev_dbg(bus->dev,
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â "no slave present at %02x",
> > > > > msg-
> > > > > > addr);
> > > > >
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â status_ack |= ASPEED_I2CD_INTR_TX_NAK;
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â bus->cmd_err = -EIO;
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â do_stop(bus);
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â goto out_no_complete;
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â } else {
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â status_ack |= ASPEED_I2CD_INTR_TX_ACK;
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â if (msg->flags & I2C_M_RD)
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â bus->master_state =
> > > > > ASPEED_I2C_MASTER_RX;
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â else
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â bus->master_state =
> > > > > ASPEED_I2C_MASTER_TX_FIRST;
> > > >
> > > > What about the SMBUS_QUICK case ? (0-len transfer). Do we need
> > > > to handle this here ? A quick look at the TX_FIRST case makes me
> > > > think we are ok there but I'm not sure about the RX case.
> > >
> > > I did not think that there is an SMBUS_QUICK RX. Could you point
> > > me to an example?
> >
> > Not so much an RX, it's more like you are sending a 1-bit data in
> > the place of the Rd/Wr bit. So you have a read with a lenght of 0, I
> > don't think in that case you should set ASPEED_I2CD_M_RX_CMD in
> > __aspeed_i2c_do_start
>
> Forget what I said, I was just not thinking about the fact that SMBus
> emulation causes the data bit to be encoded as the R/W flag. I see
> what you are saying; you are correct.
>
> >
> > > > I'm not sure the RX case is tight also. What completion does the
> > > > HW give you for the address cycle ? Won't you get that before it
> > > > has received the first character ? IE. You fall through to the
> > > > read case of the state machine with the read potentially not
> > > > complete yet no ?
> > >
> > > ...
> > > > > +Â Â Â Â Â case ASPEED_I2C_MASTER_RX:
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â if (!(irq_status & ASPEED_I2CD_INTR_RX_DONE)) {
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â dev_err(bus->dev, "master failed to
> > > > > RX");
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â goto out_complete;
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â }
> > > >
> > > > See my comment above for a bog standard i2c_read. Aren't you
> > > > getting the completion for the address before the read is even
> > > > started ?
> > >
> > > In practice no, but it is probably best to be safe :-)
> >
> > Yup :)
> > > >
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â status_ack |= ASPEED_I2CD_INTR_RX_DONE;
> > > > > +
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â recv_byte = aspeed_i2c_read(bus,
> > > > > ASPEED_I2C_BYTE_BUF_REG) >> 8;
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â msg->buf[bus->buf_index++] = recv_byte;
> > > > > +
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â if (msg->flags & I2C_M_RECV_LEN &&
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â recv_byte <= I2C_SMBUS_BLOCK_MAX) {
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â msg->len = recv_byte +
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â ((msg->flags &
> > > > > I2C_CLIENT_PEC) ? 2 : 1);
> > >
> > > ...
> > > > > +Â Â Â Â Â return ((clk_high << ASPEED_I2CD_TIME_SCL_HIGH_SHIFT)
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â & ASPEED_I2CD_TIME_SCL_HIGH_MASK)
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â | ((clk_low <<
> > > > > ASPEED_I2CD_TIME_SCL_LOW_SHIFT)
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â & ASPEED_I2CD_TIME_SCL_LOW_MASK)
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â | (base_clk &
> > > > > ASPEED_I2CD_TIME_BASE_DIVISOR_MASK);
> > > > > +}
> > > >
> > > > As I think I mentioned earlier, the AST2500 has a slightly
> > > > different register layout which support larger values for high
> > > > and low, thus allowing a finer granularity.
> > >
> > > I am developing against the 2500.
> >
> > Yes but we'd like the driver to work with both :-)
>
> Right, I thought you were making an assertion about the 2500, if you
> are making an assertion about the 2400, I do not know and do not have
> one handy.
>
> >
> > > > BTW. In case you haven't, I would suggest you copy/paste the
> > > > above in a userspace app and run it for all frequency divisors
> > > > and see if your results match the aspeed table :)
> > >
> > > Good call.
> >
> > If you end up doing that, can you shoot it my way ? I can take care
> > of making sure it's all good for the 2400.
>
> Will do.
>
> >
> > > > > +static int aspeed_i2c_init_clk(struct aspeed_i2c_bus *bus,
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â struct platform_device *pdev) {
> > > > > +Â Â Â Â Â u32 clk_freq, divisor;
> > > > > +Â Â Â Â Â struct clk *pclk;
> > > > > +Â Â Â Â Â int ret;
> > > > > +
> > > > > +Â Â Â Â Â pclk = devm_clk_get(&pdev->dev, NULL);
> > > > > +Â Â Â Â Â if (IS_ERR(pclk)) {
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â dev_err(&pdev->dev, "clk_get failed\n");
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â return PTR_ERR(pclk);
> > > > > +Â Â Â Â Â }
> > > > > +Â Â Â Â Â ret = of_property_read_u32(pdev->dev.of_node,
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â "clock-frequency",
> > > > > &clk_freq);
> > > >
> > > > See my previous comment about calling that 'bus-frequency'
> > > > rather
> > > > than 'clock-frequency'.
> > > >
> > > > > +Â Â Â Â Â if (ret < 0) {
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â dev_err(&pdev->dev,
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â "Could not read clock-frequency
> > > > > property\n");
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â clk_freq = 100000;
> > > > > +Â Â Â Â Â }
> > > > > +Â Â Â Â Â divisor = clk_get_rate(pclk) / clk_freq;
> > > > > +Â Â Â Â Â /* We just need the clock rate, we don't actually use
> > > > > the
> > > > > clk object. */
> > > > > +Â Â Â Â Â devm_clk_put(&pdev->dev, pclk);
> > > > > +
> > > > > +Â Â Â Â Â /* Set AC Timing */
> > > > > +Â Â Â Â Â if (clk_freq / 1000 > 1000) {
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â aspeed_i2c_write(bus, aspeed_i2c_read(bus,
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â ASPEED_I2
> > > > > C_FU
> > > > > N_CTRL_REG) |
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â ASPEED_I2CD_M_HIGH_SPEED_EN |
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â ASPEED_I2CD_M_SDA_DRIVE_1T_EN |
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â ASPEED_I2CD_SDA_DRIVE_1T_EN,
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â ASPEED_I2C_FUN_CTRL_REG);
> > > > > +
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â aspeed_i2c_write(bus, 0x3,
> > > > > ASPEED_I2C_AC_TIMING_REG2);
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â aspeed_i2c_write(bus,
> > > > > aspeed_i2c_get_clk_reg_val(divisor),
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â ASPEED_I2C_AC_TIMING_REG1);
> > > >
> > > > I already discussed by doubts about the above. I can try to
> > > > scope it with the EVB if you don't get to it. For now I'd rather
> > > > take the code out.
> > > >
> > > > We should ask aspeed from what frequency the "1T" stuff is
> > > > useful.
> > >
> > > Will do, I will try to rope Ryan in on the next review; it will be
> > > good for him to get used to working with upstream anyway.
> >
> > Yup. However, for the sake of getting something upstream (and in
> > OpenBMC 4.10 kernel) asap, I would suggest just dropping support for
> > those fast speeds for now, we can add them back later.
>
> Alright, that's fine. Still, Ryan, could you provide some context on
> this?
>
> >
> > > >
> > > > > +Â Â Â Â Â } else {
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â aspeed_i2c_write(bus,
> > > > > aspeed_i2c_get_clk_reg_val(divisor),
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â ASPEED_I2C_AC_TIMING_REG1);
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â aspeed_i2c_write(bus, ASPEED_NO_TIMEOUT_CTRL,
> > > > > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â ASPEED_I2C_AC_TIMING_REG2);
> > > > > +Â Â Â Â Â }
> > >
> > > ...
> > > > > +Â Â Â Â Â spin_lock_init(&bus->lock);
> > > > > +Â Â Â Â Â init_completion(&bus->cmd_complete);
> > > > > +Â Â Â Â Â bus->adap.owner = THIS_MODULE;
> > > > > +Â Â Â Â Â bus->adap.retries = 0;
> > > > > +Â Â Â Â Â bus->adap.timeout = 5 * HZ;
> > > > > +Â Â Â Â Â bus->adap.algo = &aspeed_i2c_algo;
> > > > > +Â Â Â Â Â bus->adap.algo_data = bus;
> > > > > +Â Â Â Â Â bus->adap.dev.parent = &pdev->dev;
> > > > > +Â Â Â Â Â bus->adap.dev.of_node = pdev->dev.of_node;
> > > > > +Â Â Â Â Â snprintf(bus->adap.name, sizeof(bus->adap.name),
> > > > > "Aspeed
> > > > > i2c");
> > > >
> > > > Another trivial one, should we put some kind of bus number in
> > > > that string ?
> > >
> > > Whoops, looks like I missed this one; I will get to it in the next
> > > revision.
> >
> > Ok. I noticed you missed that in v7, so I assume you mean v8 :-)
>
> Yep, I will get it in v8.
>
> >
> > > >
> > > > > +Â Â Â Â Â bus->dev = &pdev->dev;
> > > > > +
> > > > > +Â Â Â Â Â /* reset device: disable master & slave functions */
> > > > > +Â Â Â Â Â aspeed_i2c_write(bus, 0, ASPEED_I2C_FUN_CTRL_REG);
> > >
> > > ...
> > > --
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next prev parent reply other threads:[~2017-04-25 9:47 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-28 5:12 [PATCH v6 0/5] i2c: aspeed: added driver for Aspeed I2C Brendan Higgins
2017-03-28 5:12 ` [PATCH v6 1/5] irqchip/aspeed-i2c-ic: binding docs for Aspeed I2C Interrupt Controller Brendan Higgins
2017-03-28 8:49 ` Benjamin Herrenschmidt
2017-03-29 10:34 ` Brendan Higgins
2017-03-29 12:11 ` Benjamin Herrenschmidt
2017-03-29 20:51 ` Brendan Higgins
2017-03-29 21:17 ` Benjamin Herrenschmidt
[not found] ` <20170328051226.21677-2-brendanhiggins-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>
2017-04-03 14:16 ` Rob Herring
[not found] ` <20170328051226.21677-1-brendanhiggins-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>
2017-03-28 5:12 ` [PATCH v6 2/5] irqchip/aspeed-i2c-ic: Add I2C IRQ controller for Aspeed Brendan Higgins
[not found] ` <20170328051226.21677-3-brendanhiggins-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>
2017-03-28 8:32 ` Marc Zyngier
2017-03-28 9:12 ` Benjamin Herrenschmidt
[not found] ` <1490692375.3177.119.camel-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org>
2017-03-28 9:40 ` Marc Zyngier
[not found] ` <91936f1a-0a0d-4091-b981-976503a6f7cd-5wv7dgnIgG8@public.gmane.org>
2017-03-28 20:50 ` Benjamin Herrenschmidt
[not found] ` <1490734216.3177.140.camel-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org>
2017-03-29 9:59 ` Brendan Higgins
2017-03-29 10:55 ` Marc Zyngier
2017-03-28 8:52 ` Benjamin Herrenschmidt
2017-03-29 10:58 ` Joel Stanley
2017-03-29 20:16 ` Brendan Higgins
2017-03-28 5:12 ` [PATCH v6 4/5] i2c: aspeed: added driver for Aspeed I2C Brendan Higgins
2017-03-28 8:57 ` Benjamin Herrenschmidt
2017-03-28 9:09 ` Benjamin Herrenschmidt
2017-03-29 10:23 ` Brendan Higgins
2017-03-31 0:33 ` Joel Stanley
[not found] ` <20170328051226.21677-5-brendanhiggins-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>
2017-03-31 7:33 ` Benjamin Herrenschmidt
[not found] ` <1490945610.3177.229.camel-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org>
2017-04-24 18:56 ` Brendan Higgins
2017-04-25 2:19 ` Benjamin Herrenschmidt
[not found] ` <1493086747.25766.264.camel-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org>
2017-04-25 8:32 ` Brendan Higgins
2017-04-25 8:50 ` Ryan Chen
2017-04-25 9:34 ` Benjamin Herrenschmidt
[not found] ` <1493112875.25766.268.camel-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org>
2017-04-25 9:47 ` Ryan Chen [this message]
2017-04-25 19:50 ` Brendan Higgins
[not found] ` <CAFd5g45htFgr5oHbB9W_nyyMfm5J7BCKUuP73RxKhNW3LkWtyw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-04-26 0:52 ` Ryan Chen
2017-03-31 0:01 ` [PATCH v6 0/5] " Andrew Jeffery
2017-03-28 5:12 ` [PATCH v6 3/5] i2c: aspeed: added documentation for Aspeed I2C driver Brendan Higgins
[not found] ` <20170328051226.21677-4-brendanhiggins-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>
2017-03-28 8:54 ` Benjamin Herrenschmidt
[not found] ` <1490691283.3177.112.camel-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org>
2017-03-29 10:25 ` Brendan Higgins
2017-04-03 14:22 ` Rob Herring
2017-04-03 14:24 ` Rob Herring
2017-03-28 5:12 ` [PATCH v6 5/5] i2c: aspeed: added slave support " Brendan Higgins
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