Re: [PATCH 1/1] i2c: qcom-geni: add 32MHz I2C SE clock support for IPQ5424

Vladimir Zapolskiy
2024-09-25T05:39:15Z

Hello Manikanta,

On 9/24/24 09:50, Manikanta Mylavarapu wrote:
> The IPQ5424 I2C SE clock operates at a frequency of 32MHz. Since the
> existing map table is based on 19.2MHz, this patch incorporate the
> clock map table to derive the SCL clock from the 32MHz SE clock.
>
> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
> ---
> drivers/i2c/busses/i2c-qcom-geni.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c
> index 212336f724a6..bbd9ecf09f4b 100644
> --- a/drivers/i2c/busses/i2c-qcom-geni.c
> +++ b/drivers/i2c/busses/i2c-qcom-geni.c
> @@ -71,6 +71,7 @@ enum geni_i2c_err_code {
>
> #define I2C_AUTO_SUSPEND_DELAY 250
> #define KHZ(freq) (1000 * freq)
> +#define MHZ(freq) (1000000 * freq)

pleae drop this new macro, please use freq * HZ_PER_MHZ instead of MHZ(freq).

KHZ(freq) macro should be also replaced by HZ_PER_KHZ, but it's a separate change.

--
Best wishes,
Vladimir