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Mon, 05 Oct 2026 21:57:53 -0700 (PDT) X-Received: by 2002:a17:90b:2648:b0:3a8:4e64:e59e with SMTP id 98e67ed59e1d1-3a84e64f263mr1760755a91.0.1791262672866; Mon, 05 Oct 2026 21:57:52 -0700 (PDT) Received: from [10.217.219.98] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3a85436fb54sm2819331a91.10.2026.10.05.21.57.49 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 05 Oct 2026 21:57:52 -0700 (PDT) Message-ID: Date: Tue, 6 Oct 2026 10:27:45 +0530 Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] i2c: qcom-geni: restore tSCL with 32MHz I2C fast-mode To: Daniel J Blueman Cc: Viken Dadhaniya , Andi Shyti , Manikanta Mylavarapu , Bjorn Andersson , linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org References: <20260929041444.9837-1-daniel@quora.org> <1ca16602-fb66-4706-8e86-3b35372324b9@oss.qualcomm.com> Content-Language: en-US From: Mukesh Savaliya In-Reply-To: Content-Type: text/plain; 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On 9/30/2026 3:01 PM, Daniel J Blueman wrote: > On Wed, 30 Sept 2026 at 15:19, Mukesh Savaliya > wrote: >> >> Thanks Daniel ! >> >> On 9/29/2026 9:44 AM, Daniel J Blueman wrote: >>> Commit cb97bf3d4f91 ("i2c: qcom-geni: Fix hardcoded clock index in >>> SE_GENI_CLK_SEL") allowed GENI to use 32MHz clock. This changed I2C >>> timing, making the Yoga Slim 7x keyboard (ITE 048D:8987) unusable >>> on all boots, and touchpad unusable on some boots, resulting in: >>> >>> i2c_hid_of 1-003a: unexpected HID descriptor bcdVersion (0x0000) >>> i2c_hid_of 1-002c: failed to fetch HID descriptor: -110 >>> >>> With this change, t_high_cnt 3 and clk_div 4 gave a tSCL of 375ns >>> versus the previous default of 521ns, however the I2C spec has a >>> minimum tSCL of 600ns. >>> >>> Restore tSCL to the spec with t_high_cnt 5 giving a 625ns tSCL, >>> verified on Lenovo Yoga Slim 7x X1E-80100. >>> >> >> There might be a final count which i should get and update back. >> Since this fix is working though not suggested per hardware guidance, >> should we consider as temporary fix and move ahead to prevent failing >> usecase ? > > If you can get the final values into a patch for the next -rc instead > of my fix here, that would be the minimal path for everyone. You or > the hardware team can cross-check against the I2C standard as I did > [1, p44]. > Yes, Agree Dan ! That would be quick and fast way. I am in discussion to get more details on correct configuration meeting the specs. > I would revert the original patch if there is hardware that uses the > I2C 1MHz fast-mode, since the current timings aren't to spec, but also > weren't before. > Agree, after having last change thought that would meet the spec. > Thanks, > Dan > > -- [1] https://www.nxp.com/docs/en/user-guide/UM10204.pdf