From: Krzysztof Kozlowski <krzk@kernel.org>
To: Michael Wu <michael.wu@kneron.us>,
Jarkko Nikula <jarkko.nikula@linux.intel.com>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Mika Westerberg <mika.westerberg@linux.intel.com>,
Jan Dabros <jsd@semihalf.com>,
linux-i2c@vger.kernel.org
Cc: Andi Shyti <andi.shyti@kernel.org>,
Morgan Chang <morgan.chang@kneron.us>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/2] i2c: designware: determine HS tHIGH and tLOW based on HW paramters
Date: Wed, 25 Sep 2024 13:33:25 +0200 [thread overview]
Message-ID: <eceb7e42-6677-4d04-8c48-34734a5bf276@kernel.org> (raw)
In-Reply-To: <20240925080432.186408-2-michael.wu@kneron.us>
On 25/09/2024 10:04, Michael Wu wrote:
> In commit 35eba185fd1a ("i2c: designware: Calculate SCL timing
> parameter for High Speed Mode") hs_hcnt and hs_hcnt are computed based on
> fixed tHIGH = 160 and tLOW = 320. However, this fixed values only applies
> to the set of conditions of IC_CAP_LOADING = 400pF and
> IC_FREQ_OPTIMIZATION = 1. Outside of this conditions set, if this fixed
> values are still used, the calculated HCNT and LCNT will make the SCL
> frequency unabled to reach 3.4 MHz.
>
> If hs_hcnt and hs_lcnt are calculated based on fixed tHIGH = 160 and
> tLOW = 320, SCL frequency may not reach 3.4 MHz when IC_CAP_LOADING is not
> 400pF or IC_FREQ_OPTIMIZATION is not 1.
>
> Section 3.15.4.5 in DesignWare DW_apb_i2c Databook v2.03 says when
> IC_CLK_FREQ_OPTIMIZATION = 0,
>
> MIN_SCL_HIGHtime = 60 ns for 3.4 Mbps, bus loading = 100pF
> = 120 ns for 3,4 Mbps, bus loading = 400pF
> MIN_SCL_LOWtime = 160 ns for 3.4 Mbps, bus loading = 100pF
> = 320 ns for 3.4 Mbps, bus loading = 400pF
>
> and section 3.15.4.6 says when IC_CLK_FREQ_OPTIMIZATION = 1,
>
> MIN_SCL_HIGHtime = 60 ns for 3.4 Mbps, bus loading = 100pF
> = 160 ns for 3.4 Mbps, bus loading = 400pF
> MIN_SCL_LOWtime = 120 ns for 3.4 Mbps, bus loading = 100pF
> = 320 ns for 3.4 Mbps, bus loading = 400pF
>
> In order to calculate more accurate hs_hcnt and hs_lcnt, two hardware
> parameters IC_CAP_LOADING and IC_CLK_FREQ_OPTIMIZATION must be
> considered together.
>
> Signed-off-by: Michael Wu <michael.wu@kneron.us>
> ---
> drivers/i2c/busses/i2c-designware-common.c | 16 ++++++++++++++
> drivers/i2c/busses/i2c-designware-core.h | 8 +++++++
> drivers/i2c/busses/i2c-designware-master.c | 24 +++++++++++++++++++--
> drivers/i2c/busses/i2c-designware-platdrv.c | 2 ++
> 4 files changed, 48 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-designware-common.c b/drivers/i2c/busses/i2c-designware-common.c
> index e8a688d04aee..f0a7d0ce6fd6 100644
> --- a/drivers/i2c/busses/i2c-designware-common.c
> +++ b/drivers/i2c/busses/i2c-designware-common.c
> @@ -332,6 +332,22 @@ void i2c_dw_adjust_bus_speed(struct dw_i2c_dev *dev)
> }
> EXPORT_SYMBOL_GPL(i2c_dw_adjust_bus_speed);
>
> +void i2c_dw_parse_of(struct dw_i2c_dev *dev)
> +{
> + int ret;
> +
> + ret = device_property_read_u32(dev->dev, "bus-loading",
Generic properties should be described in generic schema. Where is this
one defined?
Also, bindings come before users.
Best regards,
Krzysztof
next prev parent reply other threads:[~2024-09-25 11:33 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-25 8:04 [PATCH 0/2] Compute HS HCNT and LCNT based on HW parameters Michael Wu
2024-09-25 8:04 ` [PATCH 1/2] i2c: designware: determine HS tHIGH and tLOW based on HW paramters Michael Wu
2024-09-25 9:16 ` Andy Shevchenko
2024-09-25 9:21 ` Andy Shevchenko
2024-09-26 8:45 ` Michael Wu
2024-09-26 12:18 ` Andy Shevchenko
2024-09-26 13:50 ` Krzysztof Kozlowski
2024-09-26 14:09 ` Andy Shevchenko
2024-09-25 10:58 ` Jarkko Nikula
2024-09-25 11:02 ` Andy Shevchenko
2024-09-26 9:11 ` Michael Wu
2024-09-25 11:33 ` Krzysztof Kozlowski [this message]
2024-09-27 13:41 ` kernel test robot
2024-09-25 8:04 ` [PATCH 2/2] dt-bindings: i2c: snps,designware-i2c: add bus-loading and clk-freq-optimized Michael Wu
2024-09-25 11:32 ` Krzysztof Kozlowski
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