[PATCH v3 0/5] i2c: i2c-mpc: make I2C bus speed configurable

[PATCH v3 0/5] i2c: i2c-mpc: make I2C bus speed configurable

[Wolfgang Grandegger]

This patch series makes the I2C bus speed configurable by using the
I2C node property "clock-frequency". If the property is not defined,
the old fixed clock settings will be used for backward compatibility.
The property "fsl,preserve-clocking" allows to inherit the settings
from the bootloader. Furthermore, it does some cleanup and uses the
new bindings for the Socrates board:

  i2c: i2c-mpc: various coding style fixes
  i2c: i2c-mpc: use dev based printout function
  i2c: i2c-mpc: make I2C bus speed configurable
  powerpc: i2c-mpc: document new FSL I2C bindings and cleanup
  powerpc/85xx: i2c-mpc: use new I2C bindings for the Socates board

Ben, could you please consider this patch series for inclusion into
2.6.30.

TIA,

Wolfgang.

[PATCH v3 1/5] i2c: i2c-mpc: various coding style fixes

[Wolfgang Grandegger]

[-- Attachment #1: i2c-mpc-coding-style.patch --]
[-- Type: text/plain, Size: 3412 bytes --]

Fix errors reported by checkpatch (indention, long lines, trailing
white space, etc.).

Signed-off-by: Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org>
---
 drivers/i2c/busses/i2c-mpc.c |   35 ++++++++++++++++++-----------------
 1 file changed, 18 insertions(+), 17 deletions(-)

Index: linux-2.6-galak/drivers/i2c/busses/i2c-mpc.c
===================================================================
--- linux-2.6-galak.orig/drivers/i2c/busses/i2c-mpc.c	2009-04-07 10:09:09.400719216 +0200
+++ linux-2.6-galak/drivers/i2c/busses/i2c-mpc.c	2009-04-07 10:09:13.271719088 +0200
@@ -20,7 +20,7 @@
 #include <linux/of_platform.h>
 #include <linux/of_i2c.h>
 
-#include <asm/io.h>
+#include <linux/io.h>
 #include <linux/fsl_devices.h>
 #include <linux/i2c.h>
 #include <linux/interrupt.h>
@@ -28,10 +28,10 @@
 
 #define DRV_NAME "mpc-i2c"
 
-#define MPC_I2C_FDR 	0x04
-#define MPC_I2C_CR	0x08
-#define MPC_I2C_SR	0x0c
-#define MPC_I2C_DR	0x10
+#define MPC_I2C_FDR   0x04
+#define MPC_I2C_CR    0x08
+#define MPC_I2C_SR    0x0c
+#define MPC_I2C_DR    0x10
 #define MPC_I2C_DFSRR 0x14
 
 #define CCR_MEN  0x80
@@ -58,7 +58,7 @@
 	u32 flags;
 };
 
-static __inline__ void writeccr(struct mpc_i2c *i2c, u32 x)
+static inline void writeccr(struct mpc_i2c *i2c, u32 x)
 {
 	writeb(x, i2c->base + MPC_I2C_CR);
 }
@@ -100,8 +100,7 @@
 	u32 x;
 	int result = 0;
 
-	if (i2c->irq == NO_IRQ)
-	{
+	if (i2c->irq == NO_IRQ) {
 		while (!(readb(i2c->base + MPC_I2C_SR) & CSR_MIF)) {
 			schedule();
 			if (time_after(jiffies, orig_jiffies + timeout)) {
@@ -176,7 +175,7 @@
 }
 
 static int mpc_write(struct mpc_i2c *i2c, int target,
-		     const u8 * data, int length, int restart)
+		     const u8 *data, int length, int restart)
 {
 	int i, result;
 	unsigned timeout = i2c->adap.timeout;
@@ -207,7 +206,7 @@
 }
 
 static int mpc_read(struct mpc_i2c *i2c, int target,
-		    u8 * data, int length, int restart)
+		    u8 *data, int length, int restart)
 {
 	unsigned timeout = i2c->adap.timeout;
 	int i, result;
@@ -311,7 +310,8 @@
 	.timeout = HZ,
 };
 
-static int __devinit fsl_i2c_probe(struct of_device *op, const struct of_device_id *match)
+static int __devinit fsl_i2c_probe(struct of_device *op,
+				   const struct of_device_id *match)
 {
 	int result = 0;
 	struct mpc_i2c *i2c;
@@ -341,11 +341,12 @@
 		result = request_irq(i2c->irq, mpc_i2c_isr,
 				     IRQF_SHARED, "i2c-mpc", i2c);
 		if (result < 0) {
-			printk(KERN_ERR "i2c-mpc - failed to attach interrupt\n");
+			printk(KERN_ERR
+			       "i2c-mpc - failed to attach interrupt\n");
 			goto fail_request;
 		}
 	}
-	
+
 	mpc_i2c_setclock(i2c);
 
 	dev_set_drvdata(&op->dev, i2c);
@@ -368,7 +369,7 @@
 	free_irq(i2c->irq, i2c);
  fail_request:
 	irq_dispose_mapping(i2c->irq);
- 	iounmap(i2c->base);
+	iounmap(i2c->base);
  fail_map:
 	kfree(i2c);
 	return result;
@@ -414,7 +415,7 @@
 
 	rv = of_register_platform_driver(&mpc_i2c_driver);
 	if (rv)
-		printk(KERN_ERR DRV_NAME 
+		printk(KERN_ERR DRV_NAME
 		       " of_register_platform_driver failed (%i)\n", rv);
 	return rv;
 }
@@ -428,6 +429,6 @@
 module_exit(fsl_i2c_exit);
 
 MODULE_AUTHOR("Adrian Cox <adrian-nKrwMtk+6Wm9FHfhHBbuYA@public.gmane.org>");
-MODULE_DESCRIPTION
-    ("I2C-Bus adapter for MPC107 bridge and MPC824x/85xx/52xx processors");
+MODULE_DESCRIPTION("I2C-Bus adapter for MPC107 bridge and "
+		   "MPC824x/85xx/52xx processors");
 MODULE_LICENSE("GPL");

Re: [PATCH v3 1/5] i2c: i2c-mpc: various coding style fixes

[Grant Likely]

On Tue, Apr 7, 2009 at 1:20 AM, Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org> wrote:
> Fix errors reported by checkpatch (indention, long lines, trailing
> white space, etc.).
>
> Signed-off-by: Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org>

Acked-by: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>

> ---
>  drivers/i2c/busses/i2c-mpc.c |   35 ++++++++++++++++++-----------------
>  1 file changed, 18 insertions(+), 17 deletions(-)
>
> Index: linux-2.6-galak/drivers/i2c/busses/i2c-mpc.c
> ===================================================================
> --- linux-2.6-galak.orig/drivers/i2c/busses/i2c-mpc.c   2009-04-07 10:09:09.400719216 +0200
> +++ linux-2.6-galak/drivers/i2c/busses/i2c-mpc.c        2009-04-07 10:09:13.271719088 +0200
> @@ -20,7 +20,7 @@
>  #include <linux/of_platform.h>
>  #include <linux/of_i2c.h>
>
> -#include <asm/io.h>
> +#include <linux/io.h>
>  #include <linux/fsl_devices.h>
>  #include <linux/i2c.h>
>  #include <linux/interrupt.h>
> @@ -28,10 +28,10 @@
>
>  #define DRV_NAME "mpc-i2c"
>
> -#define MPC_I2C_FDR    0x04
> -#define MPC_I2C_CR     0x08
> -#define MPC_I2C_SR     0x0c
> -#define MPC_I2C_DR     0x10
> +#define MPC_I2C_FDR   0x04
> +#define MPC_I2C_CR    0x08
> +#define MPC_I2C_SR    0x0c
> +#define MPC_I2C_DR    0x10
>  #define MPC_I2C_DFSRR 0x14
>
>  #define CCR_MEN  0x80
> @@ -58,7 +58,7 @@
>        u32 flags;
>  };
>
> -static __inline__ void writeccr(struct mpc_i2c *i2c, u32 x)
> +static inline void writeccr(struct mpc_i2c *i2c, u32 x)
>  {
>        writeb(x, i2c->base + MPC_I2C_CR);
>  }
> @@ -100,8 +100,7 @@
>        u32 x;
>        int result = 0;
>
> -       if (i2c->irq == NO_IRQ)
> -       {
> +       if (i2c->irq == NO_IRQ) {
>                while (!(readb(i2c->base + MPC_I2C_SR) & CSR_MIF)) {
>                        schedule();
>                        if (time_after(jiffies, orig_jiffies + timeout)) {
> @@ -176,7 +175,7 @@
>  }
>
>  static int mpc_write(struct mpc_i2c *i2c, int target,
> -                    const u8 * data, int length, int restart)
> +                    const u8 *data, int length, int restart)
>  {
>        int i, result;
>        unsigned timeout = i2c->adap.timeout;
> @@ -207,7 +206,7 @@
>  }
>
>  static int mpc_read(struct mpc_i2c *i2c, int target,
> -                   u8 * data, int length, int restart)
> +                   u8 *data, int length, int restart)
>  {
>        unsigned timeout = i2c->adap.timeout;
>        int i, result;
> @@ -311,7 +310,8 @@
>        .timeout = HZ,
>  };
>
> -static int __devinit fsl_i2c_probe(struct of_device *op, const struct of_device_id *match)
> +static int __devinit fsl_i2c_probe(struct of_device *op,
> +                                  const struct of_device_id *match)
>  {
>        int result = 0;
>        struct mpc_i2c *i2c;
> @@ -341,11 +341,12 @@
>                result = request_irq(i2c->irq, mpc_i2c_isr,
>                                     IRQF_SHARED, "i2c-mpc", i2c);
>                if (result < 0) {
> -                       printk(KERN_ERR "i2c-mpc - failed to attach interrupt\n");
> +                       printk(KERN_ERR
> +                              "i2c-mpc - failed to attach interrupt\n");
>                        goto fail_request;
>                }
>        }
> -
> +
>        mpc_i2c_setclock(i2c);
>
>        dev_set_drvdata(&op->dev, i2c);
> @@ -368,7 +369,7 @@
>        free_irq(i2c->irq, i2c);
>  fail_request:
>        irq_dispose_mapping(i2c->irq);
> -       iounmap(i2c->base);
> +       iounmap(i2c->base);
>  fail_map:
>        kfree(i2c);
>        return result;
> @@ -414,7 +415,7 @@
>
>        rv = of_register_platform_driver(&mpc_i2c_driver);
>        if (rv)
> -               printk(KERN_ERR DRV_NAME
> +               printk(KERN_ERR DRV_NAME
>                       " of_register_platform_driver failed (%i)\n", rv);
>        return rv;
>  }
> @@ -428,6 +429,6 @@
>  module_exit(fsl_i2c_exit);
>
>  MODULE_AUTHOR("Adrian Cox <adrian-nKrwMtk+6Wm9FHfhHBbuYA@public.gmane.org>");
> -MODULE_DESCRIPTION
> -    ("I2C-Bus adapter for MPC107 bridge and MPC824x/85xx/52xx processors");
> +MODULE_DESCRIPTION("I2C-Bus adapter for MPC107 bridge and "
> +                  "MPC824x/85xx/52xx processors");
>  MODULE_LICENSE("GPL");
>
>



-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

[PATCH v3 2/5] i2c: i2c-mpc: use dev based printout function

[Wolfgang Grandegger]

[-- Attachment #1: i2c-mpc-dev-print.patch --]
[-- Type: text/plain, Size: 3696 bytes --]

This patch used the dev_dbg, dev_err, etc. functions for debug
and error output instead of printk and pr_debug.

Signed-off-by: Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org>
---
 drivers/i2c/busses/i2c-mpc.c |   31 +++++++++++++++++--------------
 1 file changed, 17 insertions(+), 14 deletions(-)

Index: linux-2.6-galak/drivers/i2c/busses/i2c-mpc.c
===================================================================
--- linux-2.6-galak.orig/drivers/i2c/busses/i2c-mpc.c	2009-04-07 10:09:13.271719088 +0200
+++ linux-2.6-galak/drivers/i2c/busses/i2c-mpc.c	2009-04-07 10:09:14.012720756 +0200
@@ -50,6 +50,7 @@
 #define CSR_RXAK 0x01
 
 struct mpc_i2c {
+	struct device *dev;
 	void __iomem *base;
 	u32 interrupt;
 	wait_queue_head_t queue;
@@ -104,7 +105,7 @@
 		while (!(readb(i2c->base + MPC_I2C_SR) & CSR_MIF)) {
 			schedule();
 			if (time_after(jiffies, orig_jiffies + timeout)) {
-				pr_debug("I2C: timeout\n");
+				dev_dbg(i2c->dev, "timeout\n");
 				writeccr(i2c, 0);
 				result = -EIO;
 				break;
@@ -118,7 +119,7 @@
 			(i2c->interrupt & CSR_MIF), timeout);
 
 		if (unlikely(!(i2c->interrupt & CSR_MIF))) {
-			pr_debug("I2C: wait timeout\n");
+			dev_dbg(i2c->dev, "wait timeout\n");
 			writeccr(i2c, 0);
 			result = -ETIMEDOUT;
 		}
@@ -131,17 +132,17 @@
 		return result;
 
 	if (!(x & CSR_MCF)) {
-		pr_debug("I2C: unfinished\n");
+		dev_dbg(i2c->dev, "unfinished\n");
 		return -EIO;
 	}
 
 	if (x & CSR_MAL) {
-		pr_debug("I2C: MAL\n");
+		dev_dbg(i2c->dev, "MAL\n");
 		return -EIO;
 	}
 
 	if (writing && (x & CSR_RXAK)) {
-		pr_debug("I2C: No RXAK\n");
+		dev_dbg(i2c->dev, "No RXAK\n");
 		/* generate stop */
 		writeccr(i2c, CCR_MEN);
 		return -EIO;
@@ -263,12 +264,12 @@
 	/* Allow bus up to 1s to become not busy */
 	while (readb(i2c->base + MPC_I2C_SR) & CSR_MBB) {
 		if (signal_pending(current)) {
-			pr_debug("I2C: Interrupted\n");
+			dev_dbg(i2c->dev, "Interrupted\n");
 			writeccr(i2c, 0);
 			return -EINTR;
 		}
 		if (time_after(jiffies, orig_jiffies + HZ)) {
-			pr_debug("I2C: timeout\n");
+			dev_dbg(i2c->dev, "timeout\n");
 			if (readb(i2c->base + MPC_I2C_SR) ==
 			    (CSR_MCF | CSR_MBB | CSR_RXAK))
 				mpc_i2c_fixup(i2c);
@@ -279,9 +280,10 @@
 
 	for (i = 0; ret >= 0 && i < num; i++) {
 		pmsg = &msgs[i];
-		pr_debug("Doing %s %d bytes to 0x%02x - %d of %d messages\n",
-			 pmsg->flags & I2C_M_RD ? "read" : "write",
-			 pmsg->len, pmsg->addr, i + 1, num);
+		dev_dbg(i2c->dev,
+			"Doing %s %d bytes to 0x%02x - %d of %d messages\n",
+			pmsg->flags & I2C_M_RD ? "read" : "write",
+			pmsg->len, pmsg->addr, i + 1, num);
 		if (pmsg->flags & I2C_M_RD)
 			ret =
 			    mpc_read(i2c, pmsg->addr, pmsg->buf, pmsg->len, i);
@@ -320,6 +322,8 @@
 	if (!i2c)
 		return -ENOMEM;
 
+	i2c->dev = &op->dev; /* for debug and error output */
+
 	if (of_get_property(op->node, "dfsrr", NULL))
 		i2c->flags |= FSL_I2C_DEV_SEPARATE_DFSRR;
 
@@ -331,7 +335,7 @@
 
 	i2c->base = of_iomap(op->node, 0);
 	if (!i2c->base) {
-		printk(KERN_ERR "i2c-mpc - failed to map controller\n");
+		dev_err(i2c->dev, "failed to map controller\n");
 		result = -ENOMEM;
 		goto fail_map;
 	}
@@ -341,8 +345,7 @@
 		result = request_irq(i2c->irq, mpc_i2c_isr,
 				     IRQF_SHARED, "i2c-mpc", i2c);
 		if (result < 0) {
-			printk(KERN_ERR
-			       "i2c-mpc - failed to attach interrupt\n");
+			dev_err(i2c->dev, "failed to attach interrupt\n");
 			goto fail_request;
 		}
 	}
@@ -357,7 +360,7 @@
 
 	result = i2c_add_adapter(&i2c->adap);
 	if (result < 0) {
-		printk(KERN_ERR "i2c-mpc - failed to add adapter\n");
+		dev_err(i2c->dev, "failed to add adapter\n");
 		goto fail_add;
 	}
 	of_register_i2c_devices(&i2c->adap, op->node);

Re: [PATCH v3 2/5] i2c: i2c-mpc: use dev based printout function

[Grant Likely]

On Tue, Apr 7, 2009 at 1:20 AM, Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org> wrote:
> This patch used the dev_dbg, dev_err, etc. functions for debug
> and error output instead of printk and pr_debug.
>
> Signed-off-by: Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org>

Acked-by: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>

> ---
>  drivers/i2c/busses/i2c-mpc.c |   31 +++++++++++++++++--------------
>  1 file changed, 17 insertions(+), 14 deletions(-)
>
> Index: linux-2.6-galak/drivers/i2c/busses/i2c-mpc.c
> ===================================================================
> --- linux-2.6-galak.orig/drivers/i2c/busses/i2c-mpc.c   2009-04-07 10:09:13.271719088 +0200
> +++ linux-2.6-galak/drivers/i2c/busses/i2c-mpc.c        2009-04-07 10:09:14.012720756 +0200
> @@ -50,6 +50,7 @@
>  #define CSR_RXAK 0x01
>
>  struct mpc_i2c {
> +       struct device *dev;
>        void __iomem *base;
>        u32 interrupt;
>        wait_queue_head_t queue;
> @@ -104,7 +105,7 @@
>                while (!(readb(i2c->base + MPC_I2C_SR) & CSR_MIF)) {
>                        schedule();
>                        if (time_after(jiffies, orig_jiffies + timeout)) {
> -                               pr_debug("I2C: timeout\n");
> +                               dev_dbg(i2c->dev, "timeout\n");
>                                writeccr(i2c, 0);
>                                result = -EIO;
>                                break;
> @@ -118,7 +119,7 @@
>                        (i2c->interrupt & CSR_MIF), timeout);
>
>                if (unlikely(!(i2c->interrupt & CSR_MIF))) {
> -                       pr_debug("I2C: wait timeout\n");
> +                       dev_dbg(i2c->dev, "wait timeout\n");
>                        writeccr(i2c, 0);
>                        result = -ETIMEDOUT;
>                }
> @@ -131,17 +132,17 @@
>                return result;
>
>        if (!(x & CSR_MCF)) {
> -               pr_debug("I2C: unfinished\n");
> +               dev_dbg(i2c->dev, "unfinished\n");
>                return -EIO;
>        }
>
>        if (x & CSR_MAL) {
> -               pr_debug("I2C: MAL\n");
> +               dev_dbg(i2c->dev, "MAL\n");
>                return -EIO;
>        }
>
>        if (writing && (x & CSR_RXAK)) {
> -               pr_debug("I2C: No RXAK\n");
> +               dev_dbg(i2c->dev, "No RXAK\n");
>                /* generate stop */
>                writeccr(i2c, CCR_MEN);
>                return -EIO;
> @@ -263,12 +264,12 @@
>        /* Allow bus up to 1s to become not busy */
>        while (readb(i2c->base + MPC_I2C_SR) & CSR_MBB) {
>                if (signal_pending(current)) {
> -                       pr_debug("I2C: Interrupted\n");
> +                       dev_dbg(i2c->dev, "Interrupted\n");
>                        writeccr(i2c, 0);
>                        return -EINTR;
>                }
>                if (time_after(jiffies, orig_jiffies + HZ)) {
> -                       pr_debug("I2C: timeout\n");
> +                       dev_dbg(i2c->dev, "timeout\n");
>                        if (readb(i2c->base + MPC_I2C_SR) ==
>                            (CSR_MCF | CSR_MBB | CSR_RXAK))
>                                mpc_i2c_fixup(i2c);
> @@ -279,9 +280,10 @@
>
>        for (i = 0; ret >= 0 && i < num; i++) {
>                pmsg = &msgs[i];
> -               pr_debug("Doing %s %d bytes to 0x%02x - %d of %d messages\n",
> -                        pmsg->flags & I2C_M_RD ? "read" : "write",
> -                        pmsg->len, pmsg->addr, i + 1, num);
> +               dev_dbg(i2c->dev,
> +                       "Doing %s %d bytes to 0x%02x - %d of %d messages\n",
> +                       pmsg->flags & I2C_M_RD ? "read" : "write",
> +                       pmsg->len, pmsg->addr, i + 1, num);
>                if (pmsg->flags & I2C_M_RD)
>                        ret =
>                            mpc_read(i2c, pmsg->addr, pmsg->buf, pmsg->len, i);
> @@ -320,6 +322,8 @@
>        if (!i2c)
>                return -ENOMEM;
>
> +       i2c->dev = &op->dev; /* for debug and error output */
> +
>        if (of_get_property(op->node, "dfsrr", NULL))
>                i2c->flags |= FSL_I2C_DEV_SEPARATE_DFSRR;
>
> @@ -331,7 +335,7 @@
>
>        i2c->base = of_iomap(op->node, 0);
>        if (!i2c->base) {
> -               printk(KERN_ERR "i2c-mpc - failed to map controller\n");
> +               dev_err(i2c->dev, "failed to map controller\n");
>                result = -ENOMEM;
>                goto fail_map;
>        }
> @@ -341,8 +345,7 @@
>                result = request_irq(i2c->irq, mpc_i2c_isr,
>                                     IRQF_SHARED, "i2c-mpc", i2c);
>                if (result < 0) {
> -                       printk(KERN_ERR
> -                              "i2c-mpc - failed to attach interrupt\n");
> +                       dev_err(i2c->dev, "failed to attach interrupt\n");
>                        goto fail_request;
>                }
>        }
> @@ -357,7 +360,7 @@
>
>        result = i2c_add_adapter(&i2c->adap);
>        if (result < 0) {
> -               printk(KERN_ERR "i2c-mpc - failed to add adapter\n");
> +               dev_err(i2c->dev, "failed to add adapter\n");
>                goto fail_add;
>        }
>        of_register_i2c_devices(&i2c->adap, op->node);
>
>



-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

[PATCH v3 3/5] i2c: i2c-mpc: make I2C bus speed configurable

[Wolfgang Grandegger]

[-- Attachment #1: i2c-mpc-set-clock.patch --]
[-- Type: text/plain, Size: 10467 bytes --]

This patch makes the I2C bus speed configurable by using the I2C node
property "clock-frequency". If the property is not defined, the old
fixed clock settings will be used for backward comptibility.

The generic I2C clock properties, especially the CPU-specific source
clock pre-scaler are defined via the OF match table:

  static const struct of_device_id mpc_i2c_of_match[] = {
	...
	{.compatible = "fsl,mpc8543-i2c",
	 .data = &(struct fsl_i2c_match_data) {
			.setclock = mpc_i2c_setclock_8xxx,
			.prescaler = 2,
		},
	},

The "data" field defines the relevant I2C setclock function and the
relevant pre-scaler for the I2C source clock frequency.

It uses arch-specific tables and functions to determine resonable
Freqency Divider Register (fdr) values for MPC83xx, MPC85xx, MPC86xx,
MPC5200 and MPC5200B.

The i2c->flags field and the corresponding FSL_I2C_DEV_* definitions
have been removed as they are obsolete.

Signed-off-by: Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org>
---
 drivers/i2c/busses/i2c-mpc.c |  262 +++++++++++++++++++++++++++++++++++++++----
 1 file changed, 242 insertions(+), 20 deletions(-)

Index: linux-2.6-galak/drivers/i2c/busses/i2c-mpc.c
===================================================================
--- linux-2.6-galak.orig/drivers/i2c/busses/i2c-mpc.c	2009-04-07 10:09:14.012720756 +0200
+++ linux-2.6-galak/drivers/i2c/busses/i2c-mpc.c	2009-04-07 10:09:14.581719146 +0200
@@ -26,6 +26,9 @@
 #include <linux/interrupt.h>
 #include <linux/delay.h>
 
+#include <asm/mpc52xx.h>
+#include <sysdev/fsl_soc.h>
+
 #define DRV_NAME "mpc-i2c"
 
 #define MPC_I2C_FDR   0x04
@@ -56,7 +59,18 @@
 	wait_queue_head_t queue;
 	struct i2c_adapter adap;
 	int irq;
-	u32 flags;
+};
+
+struct mpc_i2c_divider {
+	u16 divider;
+	u16 fdr;	/* including dfsrr */
+};
+
+struct mpc_i2c_match_data {
+	void (*setclock)(struct device_node *node,
+			 struct mpc_i2c *i2c,
+			 u32 clock, u32 prescaler);
+	u32 prescaler;
 };
 
 static inline void writeccr(struct mpc_i2c *i2c, u32 x)
@@ -150,17 +164,180 @@
 	return 0;
 }
 
-static void mpc_i2c_setclock(struct mpc_i2c *i2c)
+#ifdef CONFIG_PPC_52xx
+static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
+	{20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23},
+	{28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02},
+	{36, 0x26}, {40, 0x27}, {44, 0x04}, {48, 0x28},
+	{52, 0x63}, {56, 0x29}, {60, 0x41}, {64, 0x2a},
+	{68, 0x07}, {72, 0x2b}, {80, 0x2c}, {88, 0x09},
+	{96, 0x2d}, {104, 0x0a}, {112, 0x2e}, {120, 0x81},
+	{128, 0x2f}, {136, 0x47}, {144, 0x0c}, {160, 0x30},
+	{176, 0x49}, {192, 0x31}, {208, 0x4a}, {224, 0x32},
+	{240, 0x0f}, {256, 0x33}, {272, 0x87}, {288, 0x10},
+	{320, 0x34}, {352, 0x89}, {384, 0x35}, {416, 0x8a},
+	{448, 0x36}, {480, 0x13}, {512, 0x37}, {576, 0x14},
+	{640, 0x38}, {768, 0x39}, {896, 0x3a}, {960, 0x17},
+	{1024, 0x3b}, {1152, 0x18}, {1280, 0x3c}, {1536, 0x3d},
+	{1792, 0x3e}, {1920, 0x1b}, {2048, 0x3f}, {2304, 0x1c},
+	{2560, 0x1d}, {3072, 0x1e}, {3584, 0x7e}, {3840, 0x1f},
+	{4096, 0x7f}, {4608, 0x5c}, {5120, 0x5d}, {6144, 0x5e},
+	{7168, 0xbe}, {7680, 0x5f}, {8192, 0xbf}, {9216, 0x9c},
+	{10240, 0x9d}, {12288, 0x9e}, {15360, 0x9f}
+};
+
+int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock, int prescaler)
+{
+	const struct mpc52xx_i2c_divider *div = NULL;
+	unsigned int pvr = mfspr(SPRN_PVR);
+	u32 divider;
+	int i;
+
+	if (!clock)
+		return -EINVAL;
+
+	/* Determine divider value */
+	divider = mpc52xx_find_ipb_freq(node) / clock;
+
+	/*
+	 * We want to choose an FDR/DFSR that generates an I2C bus speed that
+	 * is equal to or lower than the requested speed.
+	 */
+	for (i = 0; i < ARRAY_SIZE(mpc52xx_i2c_dividers); i++) {
+		div = &mpc_i2c_dividers_52xx[i];
+		/* Old MPC5200 rev A CPUs do not support the high bits */
+		if (div->fdr & 0xc0 && pvr == 0x80822011)
+			continue;
+		if (div->divider >= divider)
+			break;
+	}
+
+	return div ? (int)div->fdr : -EINVAL;
+}
+
+static void mpc_i2c_setclock_52xx(struct device_node *node,
+				  struct mpc_i2c *i2c,
+				  u32 clock, u32 prescaler)
+{
+	int fdr = mpc52xx_i2c_get_fdr(node, clock, prescaler);
+
+	if (fdr < 0)
+		fdr = 0x3f; /* backward compatibility */
+	writeb(fdr & 0xff, i2c->base + MPC_I2C_FDR);
+	dev_info(i2c->dev, "clock %d Hz (fdr=%d)\n", clock, fdr);
+}
+#else /* !CONFIG_PPC_52xx */
+static void mpc_i2c_setclock_52xx(struct device_node *node,
+				  struct mpc_i2c *i2c,
+				  u32 clock, u32 prescaler)
+{
+}
+#endif /* CONFIG_PPC_52xx*/
+
+#ifdef CONFIG_FSL_SOC
+static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] = {
+	{160, 0x0120}, {192, 0x0121}, {224, 0x0122}, {256, 0x0123},
+	{288, 0x0100}, {320, 0x0101}, {352, 0x0601}, {384, 0x0102},
+	{416, 0x0602}, {448, 0x0126}, {480, 0x0103}, {512, 0x0127},
+	{544, 0x0b03}, {576, 0x0104}, {608, 0x1603}, {640, 0x0105},
+	{672, 0x2003}, {704, 0x0b05}, {736, 0x2b03}, {768, 0x0106},
+	{800, 0x3603}, {832, 0x0b06}, {896, 0x012a}, {960, 0x0107},
+	{1024, 0x012b}, {1088, 0x1607}, {1152, 0x0108}, {1216, 0x2b07},
+	{1280, 0x0109}, {1408, 0x1609}, {1536, 0x010a}, {1664, 0x160a},
+	{1792, 0x012e}, {1920, 0x010b}, {2048, 0x012f}, {2176, 0x2b0b},
+	{2304, 0x010c}, {2560, 0x010d}, {2816, 0x2b0d}, {3072, 0x010e},
+	{3328, 0x2b0e}, {3584, 0x0132}, {3840, 0x010f}, {4096, 0x0133},
+	{4608, 0x0110}, {5120, 0x0111}, {6144, 0x0112}, {7168, 0x0136},
+	{7680, 0x0113}, {8192, 0x0137}, {9216, 0x0114}, {10240, 0x0115},
+	{12288, 0x0116}, {14336, 0x013a}, {15360, 0x0117}, {16384, 0x013b},
+	{18432, 0x0118}, {20480, 0x0119}, {24576, 0x011a}, {28672, 0x013e},
+	{30720, 0x011b}, {32768, 0x013f}, {36864, 0x011c}, {40960, 0x011d},
+	{49152, 0x011e}, {61440, 0x011f}
+};
+
+u32 mpc_i2c_get_sec_cfg_8xxx(void)
+{
+	struct device_node *node = NULL;
+	u32 __iomem *reg;
+	u32 val = 0;
+
+	node = of_find_node_by_name(NULL, "global-utilities");
+	if (node) {
+		const u32 *prop = of_get_property(node, "reg", NULL);
+		if (prop) {
+			/*
+			 * Map and check POR Device Status Register 2
+			 * (PORDEVSR2) at 0xE0014
+			 */
+			reg = ioremap(get_immrbase() + *prop + 0x14, 0x4);
+			if (!reg)
+				printk(KERN_ERR
+				       "Error: couldn't map PORDEVSR2\n");
+			else
+				val = in_be32(reg) & 0x00000080; /* sec-cfg */
+			iounmap(reg);
+		}
+	}
+	if (node)
+		of_node_put(node);
+
+	return val;
+}
+
+int mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock, u32 prescaler)
+{
+	const struct mpc_i2c_divider *div = NULL;
+	u32 divider;
+	int i;
+
+	if (!clock)
+		return -EINVAL;
+
+	/* Determine proper divider value */
+	if (of_device_is_compatible(node, "fsl,mpc8544-i2c"))
+		prescaler = mpc_i2c_get_sec_cfg_8xxx() ? 3 : 2;
+	if (!prescaler)
+		prescaler = 1;
+
+	divider = fsl_get_sys_freq() / clock / prescaler;
+
+	pr_debug("I2C: src_clock=%d clock=%d divider=%d\n",
+		 fsl_get_sys_freq(), clock, divider);
+
+	/*
+	 * We want to choose an FDR/DFSR that generates an I2C bus speed that
+	 * is equal to or lower than the requested speed.
+	 */
+	for (i = 0; i < ARRAY_SIZE(mpc_i2c_dividers_8xxx); i++) {
+		div = &mpc_i2c_dividers_8xxx[i];
+		if (div->divider >= divider)
+			break;
+	}
+
+	return div ? (int)div->fdr : -EINVAL;
+}
+
+static void mpc_i2c_setclock_8xxx(struct device_node *node,
+				  struct mpc_i2c *i2c,
+				  u32 clock, u32 prescaler)
+{
+	int fdr = mpc_i2c_get_fdr_8xxx(node, clock, prescaler);
+
+	if (fdr < 0)
+		fdr = 0x1031; /* backward compatibility */
+	writeb(fdr & 0xff, i2c->base + MPC_I2C_FDR);
+	writeb((fdr >> 8) & 0xff, i2c->base + MPC_I2C_DFSRR);
+	dev_info(i2c->dev, "clock %d Hz (dfsrr=%d fdr=%d)\n",
+		 clock, fdr >> 8, fdr & 0xff);
+}
+
+#else /* !CONFIG_FSL_SOC */
+static void mpc_i2c_setclock_8xxx(struct device_node *node,
+				  struct mpc_i2c *i2c,
+				  u32 clock, u32 prescaler)
 {
-	/* Set clock and filters */
-	if (i2c->flags & FSL_I2C_DEV_SEPARATE_DFSRR) {
-		writeb(0x31, i2c->base + MPC_I2C_FDR);
-		writeb(0x10, i2c->base + MPC_I2C_DFSRR);
-	} else if (i2c->flags & FSL_I2C_DEV_CLOCK_5200)
-		writeb(0x3f, i2c->base + MPC_I2C_FDR);
-	else
-		writel(0x1031, i2c->base + MPC_I2C_FDR);
 }
+#endif /* CONFIG_FSL_SOC */
 
 static void mpc_i2c_start(struct mpc_i2c *i2c)
 {
@@ -315,8 +492,11 @@
 static int __devinit fsl_i2c_probe(struct of_device *op,
 				   const struct of_device_id *match)
 {
-	int result = 0;
 	struct mpc_i2c *i2c;
+	const u32 *prop;
+	u32 clock = 0;
+	int result = 0;
+	int plen;
 
 	i2c = kzalloc(sizeof(*i2c), GFP_KERNEL);
 	if (!i2c)
@@ -324,13 +504,6 @@
 
 	i2c->dev = &op->dev; /* for debug and error output */
 
-	if (of_get_property(op->node, "dfsrr", NULL))
-		i2c->flags |= FSL_I2C_DEV_SEPARATE_DFSRR;
-
-	if (of_device_is_compatible(op->node, "fsl,mpc5200-i2c") ||
-			of_device_is_compatible(op->node, "mpc5200-i2c"))
-		i2c->flags |= FSL_I2C_DEV_CLOCK_5200;
-
 	init_waitqueue_head(&i2c->queue);
 
 	i2c->base = of_iomap(op->node, 0);
@@ -350,7 +523,22 @@
 		}
 	}
 
-	mpc_i2c_setclock(i2c);
+	if (!of_get_property(op->node, "fsl,preserve-clocking", NULL)) {
+		prop = of_get_property(op->node, "clock-frequency", &plen);
+		if (prop && plen == sizeof(u32))
+			clock = *prop;
+
+		if (match->data) {
+			struct mpc_i2c_match_data *data =
+				(struct mpc_i2c_match_data *)match->data;
+			data->setclock(op->node, i2c, clock, data->prescaler);
+		} else {
+			/* Backwards compatibility */
+			if (of_get_property(op->node, "dfsrr", NULL))
+				mpc_i2c_setclock_8xxx(op->node, i2c,
+						      clock, 0);
+		}
+	}
 
 	dev_set_drvdata(&op->dev, i2c);
 
@@ -395,9 +583,43 @@
 };
 
 static const struct of_device_id mpc_i2c_of_match[] = {
-	{.compatible = "fsl-i2c",},
+	{.compatible = "mpc5200-i2c",
+	 .data = &(struct mpc_i2c_match_data) {
+			.setclock = mpc_i2c_setclock_52xx,
+		},
+	},
+	{.compatible = "fsl,mpc5200b-i2c",
+	 .data = &(struct mpc_i2c_match_data) {
+			.setclock = mpc_i2c_setclock_52xx,
+		},
+	},
+	{.compatible = "fsl,mpc5200-i2c",
+	 .data = &(struct mpc_i2c_match_data) {
+			.setclock = mpc_i2c_setclock_52xx,
+		},
+	},
+	{.compatible = "fsl,mpc8313-i2c",
+	 .data = &(struct mpc_i2c_match_data) {
+			.setclock = mpc_i2c_setclock_8xxx,
+		},
+	},
+	{.compatible = "fsl,mpc8543-i2c",
+	 .data = &(struct mpc_i2c_match_data) {
+			.setclock = mpc_i2c_setclock_8xxx,
+			.prescaler = 2,
+		},
+	},
+	{.compatible = "fsl,mpc8544-i2c",
+	 .data = &(struct mpc_i2c_match_data) {
+			.setclock = mpc_i2c_setclock_8xxx,
+			.prescaler = 3,
+		},
+	/* Backward compatibility */
+	},
+	{.compatible = "fsl-i2c", },
 	{},
 };
+
 MODULE_DEVICE_TABLE(of, mpc_i2c_of_match);
 
 

Re: [PATCH v3 3/5] i2c: i2c-mpc: make I2C bus speed configurable

[Grant Likely]

On Tue, Apr 7, 2009 at 1:20 AM, Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org> wrote:
> This patch makes the I2C bus speed configurable by using the I2C node
> property "clock-frequency". If the property is not defined, the old
> fixed clock settings will be used for backward comptibility.
>
> The generic I2C clock properties, especially the CPU-specific source
> clock pre-scaler are defined via the OF match table:
>
>  static const struct of_device_id mpc_i2c_of_match[] = {
>        ...
>        {.compatible = "fsl,mpc8543-i2c",
>         .data = &(struct fsl_i2c_match_data) {
>                        .setclock = mpc_i2c_setclock_8xxx,
>                        .prescaler = 2,
>                },
>        },
>
> The "data" field defines the relevant I2C setclock function and the
> relevant pre-scaler for the I2C source clock frequency.
>
> It uses arch-specific tables and functions to determine resonable
> Freqency Divider Register (fdr) values for MPC83xx, MPC85xx, MPC86xx,
> MPC5200 and MPC5200B.
>
> The i2c->flags field and the corresponding FSL_I2C_DEV_* definitions
> have been removed as they are obsolete.
>
> Signed-off-by: Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org>

I haven't tested it, but it looks good and I trust Wolfgang.

Acked-by: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>

> ---
>  drivers/i2c/busses/i2c-mpc.c |  262 +++++++++++++++++++++++++++++++++++++++----
>  1 file changed, 242 insertions(+), 20 deletions(-)
>
> Index: linux-2.6-galak/drivers/i2c/busses/i2c-mpc.c
> ===================================================================
> --- linux-2.6-galak.orig/drivers/i2c/busses/i2c-mpc.c   2009-04-07 10:09:14.012720756 +0200
> +++ linux-2.6-galak/drivers/i2c/busses/i2c-mpc.c        2009-04-07 10:09:14.581719146 +0200
> @@ -26,6 +26,9 @@
>  #include <linux/interrupt.h>
>  #include <linux/delay.h>
>
> +#include <asm/mpc52xx.h>
> +#include <sysdev/fsl_soc.h>
> +
>  #define DRV_NAME "mpc-i2c"
>
>  #define MPC_I2C_FDR   0x04
> @@ -56,7 +59,18 @@
>        wait_queue_head_t queue;
>        struct i2c_adapter adap;
>        int irq;
> -       u32 flags;
> +};
> +
> +struct mpc_i2c_divider {
> +       u16 divider;
> +       u16 fdr;        /* including dfsrr */
> +};
> +
> +struct mpc_i2c_match_data {
> +       void (*setclock)(struct device_node *node,
> +                        struct mpc_i2c *i2c,
> +                        u32 clock, u32 prescaler);
> +       u32 prescaler;
>  };
>
>  static inline void writeccr(struct mpc_i2c *i2c, u32 x)
> @@ -150,17 +164,180 @@
>        return 0;
>  }
>
> -static void mpc_i2c_setclock(struct mpc_i2c *i2c)
> +#ifdef CONFIG_PPC_52xx
> +static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
> +       {20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23},
> +       {28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02},
> +       {36, 0x26}, {40, 0x27}, {44, 0x04}, {48, 0x28},
> +       {52, 0x63}, {56, 0x29}, {60, 0x41}, {64, 0x2a},
> +       {68, 0x07}, {72, 0x2b}, {80, 0x2c}, {88, 0x09},
> +       {96, 0x2d}, {104, 0x0a}, {112, 0x2e}, {120, 0x81},
> +       {128, 0x2f}, {136, 0x47}, {144, 0x0c}, {160, 0x30},
> +       {176, 0x49}, {192, 0x31}, {208, 0x4a}, {224, 0x32},
> +       {240, 0x0f}, {256, 0x33}, {272, 0x87}, {288, 0x10},
> +       {320, 0x34}, {352, 0x89}, {384, 0x35}, {416, 0x8a},
> +       {448, 0x36}, {480, 0x13}, {512, 0x37}, {576, 0x14},
> +       {640, 0x38}, {768, 0x39}, {896, 0x3a}, {960, 0x17},
> +       {1024, 0x3b}, {1152, 0x18}, {1280, 0x3c}, {1536, 0x3d},
> +       {1792, 0x3e}, {1920, 0x1b}, {2048, 0x3f}, {2304, 0x1c},
> +       {2560, 0x1d}, {3072, 0x1e}, {3584, 0x7e}, {3840, 0x1f},
> +       {4096, 0x7f}, {4608, 0x5c}, {5120, 0x5d}, {6144, 0x5e},
> +       {7168, 0xbe}, {7680, 0x5f}, {8192, 0xbf}, {9216, 0x9c},
> +       {10240, 0x9d}, {12288, 0x9e}, {15360, 0x9f}
> +};
> +
> +int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock, int prescaler)
> +{
> +       const struct mpc52xx_i2c_divider *div = NULL;
> +       unsigned int pvr = mfspr(SPRN_PVR);
> +       u32 divider;
> +       int i;
> +
> +       if (!clock)
> +               return -EINVAL;
> +
> +       /* Determine divider value */
> +       divider = mpc52xx_find_ipb_freq(node) / clock;
> +
> +       /*
> +        * We want to choose an FDR/DFSR that generates an I2C bus speed that
> +        * is equal to or lower than the requested speed.
> +        */
> +       for (i = 0; i < ARRAY_SIZE(mpc52xx_i2c_dividers); i++) {
> +               div = &mpc_i2c_dividers_52xx[i];
> +               /* Old MPC5200 rev A CPUs do not support the high bits */
> +               if (div->fdr & 0xc0 && pvr == 0x80822011)
> +                       continue;
> +               if (div->divider >= divider)
> +                       break;
> +       }
> +
> +       return div ? (int)div->fdr : -EINVAL;
> +}
> +
> +static void mpc_i2c_setclock_52xx(struct device_node *node,
> +                                 struct mpc_i2c *i2c,
> +                                 u32 clock, u32 prescaler)
> +{
> +       int fdr = mpc52xx_i2c_get_fdr(node, clock, prescaler);
> +
> +       if (fdr < 0)
> +               fdr = 0x3f; /* backward compatibility */
> +       writeb(fdr & 0xff, i2c->base + MPC_I2C_FDR);
> +       dev_info(i2c->dev, "clock %d Hz (fdr=%d)\n", clock, fdr);
> +}
> +#else /* !CONFIG_PPC_52xx */
> +static void mpc_i2c_setclock_52xx(struct device_node *node,
> +                                 struct mpc_i2c *i2c,
> +                                 u32 clock, u32 prescaler)
> +{
> +}
> +#endif /* CONFIG_PPC_52xx*/
> +
> +#ifdef CONFIG_FSL_SOC
> +static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] = {
> +       {160, 0x0120}, {192, 0x0121}, {224, 0x0122}, {256, 0x0123},
> +       {288, 0x0100}, {320, 0x0101}, {352, 0x0601}, {384, 0x0102},
> +       {416, 0x0602}, {448, 0x0126}, {480, 0x0103}, {512, 0x0127},
> +       {544, 0x0b03}, {576, 0x0104}, {608, 0x1603}, {640, 0x0105},
> +       {672, 0x2003}, {704, 0x0b05}, {736, 0x2b03}, {768, 0x0106},
> +       {800, 0x3603}, {832, 0x0b06}, {896, 0x012a}, {960, 0x0107},
> +       {1024, 0x012b}, {1088, 0x1607}, {1152, 0x0108}, {1216, 0x2b07},
> +       {1280, 0x0109}, {1408, 0x1609}, {1536, 0x010a}, {1664, 0x160a},
> +       {1792, 0x012e}, {1920, 0x010b}, {2048, 0x012f}, {2176, 0x2b0b},
> +       {2304, 0x010c}, {2560, 0x010d}, {2816, 0x2b0d}, {3072, 0x010e},
> +       {3328, 0x2b0e}, {3584, 0x0132}, {3840, 0x010f}, {4096, 0x0133},
> +       {4608, 0x0110}, {5120, 0x0111}, {6144, 0x0112}, {7168, 0x0136},
> +       {7680, 0x0113}, {8192, 0x0137}, {9216, 0x0114}, {10240, 0x0115},
> +       {12288, 0x0116}, {14336, 0x013a}, {15360, 0x0117}, {16384, 0x013b},
> +       {18432, 0x0118}, {20480, 0x0119}, {24576, 0x011a}, {28672, 0x013e},
> +       {30720, 0x011b}, {32768, 0x013f}, {36864, 0x011c}, {40960, 0x011d},
> +       {49152, 0x011e}, {61440, 0x011f}
> +};
> +
> +u32 mpc_i2c_get_sec_cfg_8xxx(void)
> +{
> +       struct device_node *node = NULL;
> +       u32 __iomem *reg;
> +       u32 val = 0;
> +
> +       node = of_find_node_by_name(NULL, "global-utilities");
> +       if (node) {
> +               const u32 *prop = of_get_property(node, "reg", NULL);
> +               if (prop) {
> +                       /*
> +                        * Map and check POR Device Status Register 2
> +                        * (PORDEVSR2) at 0xE0014
> +                        */
> +                       reg = ioremap(get_immrbase() + *prop + 0x14, 0x4);
> +                       if (!reg)
> +                               printk(KERN_ERR
> +                                      "Error: couldn't map PORDEVSR2\n");
> +                       else
> +                               val = in_be32(reg) & 0x00000080; /* sec-cfg */
> +                       iounmap(reg);
> +               }
> +       }
> +       if (node)
> +               of_node_put(node);
> +
> +       return val;
> +}
> +
> +int mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock, u32 prescaler)
> +{
> +       const struct mpc_i2c_divider *div = NULL;
> +       u32 divider;
> +       int i;
> +
> +       if (!clock)
> +               return -EINVAL;
> +
> +       /* Determine proper divider value */
> +       if (of_device_is_compatible(node, "fsl,mpc8544-i2c"))
> +               prescaler = mpc_i2c_get_sec_cfg_8xxx() ? 3 : 2;
> +       if (!prescaler)
> +               prescaler = 1;
> +
> +       divider = fsl_get_sys_freq() / clock / prescaler;
> +
> +       pr_debug("I2C: src_clock=%d clock=%d divider=%d\n",
> +                fsl_get_sys_freq(), clock, divider);
> +
> +       /*
> +        * We want to choose an FDR/DFSR that generates an I2C bus speed that
> +        * is equal to or lower than the requested speed.
> +        */
> +       for (i = 0; i < ARRAY_SIZE(mpc_i2c_dividers_8xxx); i++) {
> +               div = &mpc_i2c_dividers_8xxx[i];
> +               if (div->divider >= divider)
> +                       break;
> +       }
> +
> +       return div ? (int)div->fdr : -EINVAL;
> +}
> +
> +static void mpc_i2c_setclock_8xxx(struct device_node *node,
> +                                 struct mpc_i2c *i2c,
> +                                 u32 clock, u32 prescaler)
> +{
> +       int fdr = mpc_i2c_get_fdr_8xxx(node, clock, prescaler);
> +
> +       if (fdr < 0)
> +               fdr = 0x1031; /* backward compatibility */
> +       writeb(fdr & 0xff, i2c->base + MPC_I2C_FDR);
> +       writeb((fdr >> 8) & 0xff, i2c->base + MPC_I2C_DFSRR);
> +       dev_info(i2c->dev, "clock %d Hz (dfsrr=%d fdr=%d)\n",
> +                clock, fdr >> 8, fdr & 0xff);
> +}
> +
> +#else /* !CONFIG_FSL_SOC */
> +static void mpc_i2c_setclock_8xxx(struct device_node *node,
> +                                 struct mpc_i2c *i2c,
> +                                 u32 clock, u32 prescaler)
>  {
> -       /* Set clock and filters */
> -       if (i2c->flags & FSL_I2C_DEV_SEPARATE_DFSRR) {
> -               writeb(0x31, i2c->base + MPC_I2C_FDR);
> -               writeb(0x10, i2c->base + MPC_I2C_DFSRR);
> -       } else if (i2c->flags & FSL_I2C_DEV_CLOCK_5200)
> -               writeb(0x3f, i2c->base + MPC_I2C_FDR);
> -       else
> -               writel(0x1031, i2c->base + MPC_I2C_FDR);
>  }
> +#endif /* CONFIG_FSL_SOC */
>
>  static void mpc_i2c_start(struct mpc_i2c *i2c)
>  {
> @@ -315,8 +492,11 @@
>  static int __devinit fsl_i2c_probe(struct of_device *op,
>                                   const struct of_device_id *match)
>  {
> -       int result = 0;
>        struct mpc_i2c *i2c;
> +       const u32 *prop;
> +       u32 clock = 0;
> +       int result = 0;
> +       int plen;
>
>        i2c = kzalloc(sizeof(*i2c), GFP_KERNEL);
>        if (!i2c)
> @@ -324,13 +504,6 @@
>
>        i2c->dev = &op->dev; /* for debug and error output */
>
> -       if (of_get_property(op->node, "dfsrr", NULL))
> -               i2c->flags |= FSL_I2C_DEV_SEPARATE_DFSRR;
> -
> -       if (of_device_is_compatible(op->node, "fsl,mpc5200-i2c") ||
> -                       of_device_is_compatible(op->node, "mpc5200-i2c"))
> -               i2c->flags |= FSL_I2C_DEV_CLOCK_5200;
> -
>        init_waitqueue_head(&i2c->queue);
>
>        i2c->base = of_iomap(op->node, 0);
> @@ -350,7 +523,22 @@
>                }
>        }
>
> -       mpc_i2c_setclock(i2c);
> +       if (!of_get_property(op->node, "fsl,preserve-clocking", NULL)) {
> +               prop = of_get_property(op->node, "clock-frequency", &plen);
> +               if (prop && plen == sizeof(u32))
> +                       clock = *prop;
> +
> +               if (match->data) {
> +                       struct mpc_i2c_match_data *data =
> +                               (struct mpc_i2c_match_data *)match->data;
> +                       data->setclock(op->node, i2c, clock, data->prescaler);
> +               } else {
> +                       /* Backwards compatibility */
> +                       if (of_get_property(op->node, "dfsrr", NULL))
> +                               mpc_i2c_setclock_8xxx(op->node, i2c,
> +                                                     clock, 0);
> +               }
> +       }
>
>        dev_set_drvdata(&op->dev, i2c);
>
> @@ -395,9 +583,43 @@
>  };
>
>  static const struct of_device_id mpc_i2c_of_match[] = {
> -       {.compatible = "fsl-i2c",},
> +       {.compatible = "mpc5200-i2c",
> +        .data = &(struct mpc_i2c_match_data) {
> +                       .setclock = mpc_i2c_setclock_52xx,
> +               },
> +       },
> +       {.compatible = "fsl,mpc5200b-i2c",
> +        .data = &(struct mpc_i2c_match_data) {
> +                       .setclock = mpc_i2c_setclock_52xx,
> +               },
> +       },
> +       {.compatible = "fsl,mpc5200-i2c",
> +        .data = &(struct mpc_i2c_match_data) {
> +                       .setclock = mpc_i2c_setclock_52xx,
> +               },
> +       },
> +       {.compatible = "fsl,mpc8313-i2c",
> +        .data = &(struct mpc_i2c_match_data) {
> +                       .setclock = mpc_i2c_setclock_8xxx,
> +               },
> +       },
> +       {.compatible = "fsl,mpc8543-i2c",
> +        .data = &(struct mpc_i2c_match_data) {
> +                       .setclock = mpc_i2c_setclock_8xxx,
> +                       .prescaler = 2,
> +               },
> +       },
> +       {.compatible = "fsl,mpc8544-i2c",
> +        .data = &(struct mpc_i2c_match_data) {
> +                       .setclock = mpc_i2c_setclock_8xxx,
> +                       .prescaler = 3,
> +               },
> +       /* Backward compatibility */
> +       },
> +       {.compatible = "fsl-i2c", },
>        {},
>  };
> +
>  MODULE_DEVICE_TABLE(of, mpc_i2c_of_match);
>
>
>
>



-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

Re: [PATCH v3 3/5] i2c: i2c-mpc: make I2C bus speed configurable

[Tabi Timur-B04825]

Wolfgang,

I know it's been 3 1/2 years since you wrote this code, but I think I
found a bug.

On Tue, Apr 7, 2009 at 3:20 AM, Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org> wrote:
> This patch makes the I2C bus speed configurable by using the I2C node
> property "clock-frequency". If the property is not defined, the old
> fixed clock settings will be used for backward comptibility.
>
> The generic I2C clock properties, especially the CPU-specific source
> clock pre-scaler are defined via the OF match table:
>
>   static const struct of_device_id mpc_i2c_of_match[] = {
>         ...
>         {.compatible = "fsl,mpc8543-i2c",
>          .data = &(struct fsl_i2c_match_data) {
>                         .setclock = mpc_i2c_setclock_8xxx,
>                         .prescaler = 2,
>                 },
>         },
>
> The "data" field defines the relevant I2C setclock function and the
> relevant pre-scaler for the I2C source clock frequency.
>
> It uses arch-specific tables and functions to determine resonable
> Freqency Divider Register (fdr) values for MPC83xx, MPC85xx, MPC86xx,
> MPC5200 and MPC5200B.
>
> The i2c->flags field and the corresponding FSL_I2C_DEV_* definitions
> have been removed as they are obsolete.
>
> Signed-off-by: Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org>

...

> +u32 mpc_i2c_get_sec_cfg_8xxx(void)
> +{
> +       struct device_node *node = NULL;
> +       u32 __iomem *reg;
> +       u32 val = 0;
> +
> +       node = of_find_node_by_name(NULL, "global-utilities");
> +       if (node) {
> +               const u32 *prop = of_get_property(node, "reg", NULL);
> +               if (prop) {
> +                       /*
> +                        * Map and check POR Device Status Register 2
> +                        * (PORDEVSR2) at 0xE0014
> +                        */
> +                       reg = ioremap(get_immrbase() + *prop + 0x14, 0x4);
> +                       if (!reg)
> +                               printk(KERN_ERR
> +                                      "Error: couldn't map PORDEVSR2\n");
> +                       else
> +                               val = in_be32(reg) & 0x00000080; /* sec-cfg */

I'm looking at the MPC8544 reference manual, and PORDEVSR2[SEC_CFG] is
in position 26, which means that this line should be "& 0x20", not "&
0x80".

Can you check this for me and let me know if I'm right?

> +                       iounmap(reg);
> +               }
> +       }
> +       if (node)
> +               of_node_put(node);
> +
> +       return val;
> +}

-- 
Timur Tabi
Linux kernel developer at Freescale

Re: [PATCH v3 3/5] i2c: i2c-mpc: make I2C bus speed configurable

[Timur Tabi]

Wolfgang,

I know it's been 3 1/2 years since you wrote this code, but I think I
found a bug.

On Tue, Apr 7, 2009 at 3:20 AM, Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org> wrote:
> This patch makes the I2C bus speed configurable by using the I2C node
> property "clock-frequency". If the property is not defined, the old
> fixed clock settings will be used for backward comptibility.
>
> The generic I2C clock properties, especially the CPU-specific source
> clock pre-scaler are defined via the OF match table:
>
>   static const struct of_device_id mpc_i2c_of_match[] = {
>         ...
>         {.compatible = "fsl,mpc8543-i2c",
>          .data = &(struct fsl_i2c_match_data) {
>                         .setclock = mpc_i2c_setclock_8xxx,
>                         .prescaler = 2,
>                 },
>         },
>
> The "data" field defines the relevant I2C setclock function and the
> relevant pre-scaler for the I2C source clock frequency.
>
> It uses arch-specific tables and functions to determine resonable
> Freqency Divider Register (fdr) values for MPC83xx, MPC85xx, MPC86xx,
> MPC5200 and MPC5200B.
>
> The i2c->flags field and the corresponding FSL_I2C_DEV_* definitions
> have been removed as they are obsolete.
>
> Signed-off-by: Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org>

...

> +u32 mpc_i2c_get_sec_cfg_8xxx(void)
> +{
> +       struct device_node *node = NULL;
> +       u32 __iomem *reg;
> +       u32 val = 0;
> +
> +       node = of_find_node_by_name(NULL, "global-utilities");
> +       if (node) {
> +               const u32 *prop = of_get_property(node, "reg", NULL);
> +               if (prop) {
> +                       /*
> +                        * Map and check POR Device Status Register 2
> +                        * (PORDEVSR2) at 0xE0014
> +                        */
> +                       reg = ioremap(get_immrbase() + *prop + 0x14, 0x4);
> +                       if (!reg)
> +                               printk(KERN_ERR
> +                                      "Error: couldn't map PORDEVSR2\n");
> +                       else
> +                               val = in_be32(reg) & 0x00000080; /* sec-cfg */

I'm looking at the MPC8544 reference manual, and PORDEVSR2[SEC_CFG] is
in position 26, which means that this line should be "& 0x20", not "&
0x80".

Can you check this for me and let me know if I'm right?

> +                       iounmap(reg);
> +               }
> +       }
> +       if (node)
> +               of_node_put(node);
> +
> +       return val;
> +}

-- 
Timur Tabi
Linux kernel developer at Freescale

Re: [PATCH v3 3/5] i2c: i2c-mpc: make I2C bus speed configurable

[Wolfram Sang]

[-- Attachment #1: Type: text/plain, Size: 2858 bytes --]

On Wed, Nov 07, 2012 at 10:40:47AM -0600, Timur Tabi wrote:
> Wolfgang,
> 
> I know it's been 3 1/2 years since you wrote this code, but I think I
> found a bug.
> 
> On Tue, Apr 7, 2009 at 3:20 AM, Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org> wrote:
> > This patch makes the I2C bus speed configurable by using the I2C node
> > property "clock-frequency". If the property is not defined, the old
> > fixed clock settings will be used for backward comptibility.
> >
> > The generic I2C clock properties, especially the CPU-specific source
> > clock pre-scaler are defined via the OF match table:
> >
> >   static const struct of_device_id mpc_i2c_of_match[] = {
> >         ...
> >         {.compatible = "fsl,mpc8543-i2c",
> >          .data = &(struct fsl_i2c_match_data) {
> >                         .setclock = mpc_i2c_setclock_8xxx,
> >                         .prescaler = 2,
> >                 },
> >         },
> >
> > The "data" field defines the relevant I2C setclock function and the
> > relevant pre-scaler for the I2C source clock frequency.
> >
> > It uses arch-specific tables and functions to determine resonable
> > Freqency Divider Register (fdr) values for MPC83xx, MPC85xx, MPC86xx,
> > MPC5200 and MPC5200B.
> >
> > The i2c->flags field and the corresponding FSL_I2C_DEV_* definitions
> > have been removed as they are obsolete.
> >
> > Signed-off-by: Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org>
> 
> ...
> 
> > +u32 mpc_i2c_get_sec_cfg_8xxx(void)
> > +{
> > +       struct device_node *node = NULL;
> > +       u32 __iomem *reg;
> > +       u32 val = 0;
> > +
> > +       node = of_find_node_by_name(NULL, "global-utilities");
> > +       if (node) {
> > +               const u32 *prop = of_get_property(node, "reg", NULL);
> > +               if (prop) {
> > +                       /*
> > +                        * Map and check POR Device Status Register 2
> > +                        * (PORDEVSR2) at 0xE0014
> > +                        */
> > +                       reg = ioremap(get_immrbase() + *prop + 0x14, 0x4);
> > +                       if (!reg)
> > +                               printk(KERN_ERR
> > +                                      "Error: couldn't map PORDEVSR2\n");
> > +                       else
> > +                               val = in_be32(reg) & 0x00000080; /* sec-cfg */
> 
> I'm looking at the MPC8544 reference manual, and PORDEVSR2[SEC_CFG] is
> in position 26, which means that this line should be "& 0x20", not "&
> 0x80".
> 
> Can you check this for me and let me know if I'm right?

Ping. Somebody wants to send a patch?

-- 
Pengutronix e.K.                           | Wolfram Sang                |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

[-- Attachment #2: Digital signature --]
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Re: [PATCH v3 3/5] i2c: i2c-mpc: make I2C bus speed configurable

[Timur Tabi]

Wolfram Sang wrote:
> Ping. Somebody wants to send a patch?

I already have a patch that fixes it, I just want confirmation that I'm
right first.

-- 
Timur Tabi
Linux kernel developer at Freescale

[PATCH v3 4/5] powerpc: i2c-mpc: document new FSL I2C bindings and cleanup

[Wolfgang Grandegger]

[-- Attachment #1: i2c-mpc-dts-bindings.patch --]
[-- Type: text/plain, Size: 3193 bytes --]

This patch documents the new bindings for the MPC I2C bus driver.
Furthermore, it removes obsolete FSL device related definitions
for I2C.
It should go through the appropriate PowerPC maintainer(s) hands.

Signed-off-by: Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org>
---
 Documentation/powerpc/dts-bindings/fsl/i2c.txt |   46 ++++++++++++++++---------
 include/linux/fsl_devices.h                    |    4 --
 2 files changed, 31 insertions(+), 19 deletions(-)

Index: linux-2.6-galak/Documentation/powerpc/dts-bindings/fsl/i2c.txt
===================================================================
--- linux-2.6-galak.orig/Documentation/powerpc/dts-bindings/fsl/i2c.txt	2009-04-07 10:09:08.185721241 +0200
+++ linux-2.6-galak/Documentation/powerpc/dts-bindings/fsl/i2c.txt	2009-04-07 10:09:15.413719535 +0200
@@ -7,8 +7,10 @@
 
 Recommended properties :
 
- - compatible : Should be "fsl-i2c" for parts compatible with
-   Freescale I2C specifications.
+ - compatible : compatibility list with 2 entries, the first should
+   be "fsl,CHIP-i2c" where CHIP is the name of a compatible processor,
+   e.g. mpc8313, mpc8543, mpc8544, mpc5200 or mpc5200b. The second one
+   should be "fsl-i2c".
  - interrupts : <a b> where a is the interrupt number and b is a
    field that represents an encoding of the sense and level
    information for the interrupt.  This should be encoded based on
@@ -16,17 +18,31 @@
    controller you have.
  - interrupt-parent : the phandle for the interrupt controller that
    services interrupts for this device.
- - dfsrr : boolean; if defined, indicates that this I2C device has
-   a digital filter sampling rate register
- - fsl5200-clocking : boolean; if defined, indicated that this device
-   uses the FSL 5200 clocking mechanism.
-
-Example :
-	i2c@3000 {
-		interrupt-parent = <40000>;
-		interrupts = <1b 3>;
-		reg = <3000 18>;
-		device_type = "i2c";
-		compatible  = "fsl-i2c";
-		dfsrr;
+ - fsl,preserve-clocking : boolean; if defined, the clock settings
+   from the bootloader are preserved (not touched).
+ - clock-frequency : desired I2C bus clock frequency in Hz.
+
+Examples :
+
+	i2c@3d00 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
+		cell-index = <0>;
+		reg = <0x3d00 0x40>;
+		interrupts = <2 15 0>;
+		interrupt-parent = <&mpc5200_pic>;
+		fsl,preserve-clocking;
 	};
+
+	i2c@3100 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		cell-index = <1>;
+		compatible = "fsl,mpc8544-i2c", "fsl-i2c";
+		reg = <0x3100 0x100>;
+		interrupts = <43 2>;
+		interrupt-parent = <&mpic>;
+		clock-frequency = <400000>;
+	};
+
Index: linux-2.6-galak/include/linux/fsl_devices.h
===================================================================
--- linux-2.6-galak.orig/include/linux/fsl_devices.h	2009-04-07 10:09:08.185721241 +0200
+++ linux-2.6-galak/include/linux/fsl_devices.h	2009-04-07 10:09:15.414719119 +0200
@@ -43,10 +43,6 @@
  *
  */
 
-/* Flags related to I2C device features */
-#define FSL_I2C_DEV_SEPARATE_DFSRR	0x00000001
-#define FSL_I2C_DEV_CLOCK_5200		0x00000002
-
 enum fsl_usb2_operating_modes {
 	FSL_USB2_MPH_HOST,
 	FSL_USB2_DR_HOST,

Re: [PATCH v3 4/5] powerpc: i2c-mpc: document new FSL I2C bindings and cleanup

[Grant Likely]

On Tue, Apr 7, 2009 at 1:20 AM, Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org> wrote:
> This patch documents the new bindings for the MPC I2C bus driver.
> Furthermore, it removes obsolete FSL device related definitions
> for I2C.
> It should go through the appropriate PowerPC maintainer(s) hands.
>
> Signed-off-by: Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org>

Acked-by: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>

> ---
>  Documentation/powerpc/dts-bindings/fsl/i2c.txt |   46 ++++++++++++++++---------
>  include/linux/fsl_devices.h                    |    4 --
>  2 files changed, 31 insertions(+), 19 deletions(-)
>
> Index: linux-2.6-galak/Documentation/powerpc/dts-bindings/fsl/i2c.txt
> ===================================================================
> --- linux-2.6-galak.orig/Documentation/powerpc/dts-bindings/fsl/i2c.txt 2009-04-07 10:09:08.185721241 +0200
> +++ linux-2.6-galak/Documentation/powerpc/dts-bindings/fsl/i2c.txt      2009-04-07 10:09:15.413719535 +0200
> @@ -7,8 +7,10 @@
>
>  Recommended properties :
>
> - - compatible : Should be "fsl-i2c" for parts compatible with
> -   Freescale I2C specifications.
> + - compatible : compatibility list with 2 entries, the first should
> +   be "fsl,CHIP-i2c" where CHIP is the name of a compatible processor,
> +   e.g. mpc8313, mpc8543, mpc8544, mpc5200 or mpc5200b. The second one
> +   should be "fsl-i2c".
>  - interrupts : <a b> where a is the interrupt number and b is a
>    field that represents an encoding of the sense and level
>    information for the interrupt.  This should be encoded based on
> @@ -16,17 +18,31 @@
>    controller you have.
>  - interrupt-parent : the phandle for the interrupt controller that
>    services interrupts for this device.
> - - dfsrr : boolean; if defined, indicates that this I2C device has
> -   a digital filter sampling rate register
> - - fsl5200-clocking : boolean; if defined, indicated that this device
> -   uses the FSL 5200 clocking mechanism.
> -
> -Example :
> -       i2c@3000 {
> -               interrupt-parent = <40000>;
> -               interrupts = <1b 3>;
> -               reg = <3000 18>;
> -               device_type = "i2c";
> -               compatible  = "fsl-i2c";
> -               dfsrr;
> + - fsl,preserve-clocking : boolean; if defined, the clock settings
> +   from the bootloader are preserved (not touched).
> + - clock-frequency : desired I2C bus clock frequency in Hz.
> +
> +Examples :
> +
> +       i2c@3d00 {
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +               compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
> +               cell-index = <0>;
> +               reg = <0x3d00 0x40>;
> +               interrupts = <2 15 0>;
> +               interrupt-parent = <&mpc5200_pic>;
> +               fsl,preserve-clocking;
>        };
> +
> +       i2c@3100 {
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +               cell-index = <1>;
> +               compatible = "fsl,mpc8544-i2c", "fsl-i2c";
> +               reg = <0x3100 0x100>;
> +               interrupts = <43 2>;
> +               interrupt-parent = <&mpic>;
> +               clock-frequency = <400000>;
> +       };
> +
> Index: linux-2.6-galak/include/linux/fsl_devices.h
> ===================================================================
> --- linux-2.6-galak.orig/include/linux/fsl_devices.h    2009-04-07 10:09:08.185721241 +0200
> +++ linux-2.6-galak/include/linux/fsl_devices.h 2009-04-07 10:09:15.414719119 +0200
> @@ -43,10 +43,6 @@
>  *
>  */
>
> -/* Flags related to I2C device features */
> -#define FSL_I2C_DEV_SEPARATE_DFSRR     0x00000001
> -#define FSL_I2C_DEV_CLOCK_5200         0x00000002
> -
>  enum fsl_usb2_operating_modes {
>        FSL_USB2_MPH_HOST,
>        FSL_USB2_DR_HOST,
>
>



-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

Re: [PATCH v3 4/5] powerpc: i2c-mpc: document new FSL I2C bindings and cleanup

[Kumar Gala]

On Apr 7, 2009, at 3:20 AM, Wolfgang Grandegger wrote:

> This patch documents the new bindings for the MPC I2C bus driver.
> Furthermore, it removes obsolete FSL device related definitions
> for I2C.
> It should go through the appropriate PowerPC maintainer(s) hands.
>
> Signed-off-by: Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org>
> ---
> Documentation/powerpc/dts-bindings/fsl/i2c.txt |   46 +++++++++++++++ 
> +---------
> include/linux/fsl_devices.h                    |    4 --
> 2 files changed, 31 insertions(+), 19 deletions(-)

applied to merge

- k

[PATCH v3 5/5] powerpc/85xx: i2c-mpc: use new I2C bindings for the Socates board

[Wolfgang Grandegger]

[-- Attachment #1: i2c-mpc-socrates-dts.patch --]
[-- Type: text/plain, Size: 1223 bytes --]

Preserve I2C clock settings for the Socrates MPC8544 board.

Signed-off-by: Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org>
---
 arch/powerpc/boot/dts/socrates.dts |    8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Index: linux-2.6-galak/arch/powerpc/boot/dts/socrates.dts
===================================================================
--- linux-2.6-galak.orig/arch/powerpc/boot/dts/socrates.dts	2009-04-07 10:09:07.161718915 +0200
+++ linux-2.6-galak/arch/powerpc/boot/dts/socrates.dts	2009-04-07 10:09:16.207719258 +0200
@@ -79,11 +79,11 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			cell-index = <0>;
-			compatible = "fsl-i2c";
+			compatible = "fsl,mpc8544-i2c", "fsl-i2c";
 			reg = <0x3000 0x100>;
 			interrupts = <43 2>;
 			interrupt-parent = <&mpic>;
-			dfsrr;
+			fsl,preserve-clocking;
 
 			dtt@28 {
 				compatible = "winbond,w83782d";
@@ -111,11 +111,11 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			cell-index = <1>;
-			compatible = "fsl-i2c";
+			compatible = "fsl,mpc8544-i2c", "fsl-i2c";
 			reg = <0x3100 0x100>;
 			interrupts = <43 2>;
 			interrupt-parent = <&mpic>;
-			dfsrr;
+			fsl,preserve-clocking;
 		};
 
 		enet0: ethernet@24000 {

Re: [PATCH v3 5/5] powerpc/85xx: i2c-mpc: use new I2C bindings for the Socates board

[Grant Likely]

On Tue, Apr 7, 2009 at 1:20 AM, Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org> wrote:
> Preserve I2C clock settings for the Socrates MPC8544 board.

I had thought that the preserve-clocking property was intended for
older boards that don't currently have any method of getting the clock
setting out of u-boot.  Since Socrates is a new board, U-Boot should
probably be made to fill in the real clock rate setting.

g.

>
> Signed-off-by: Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org>
> ---
>  arch/powerpc/boot/dts/socrates.dts |    8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> Index: linux-2.6-galak/arch/powerpc/boot/dts/socrates.dts
> ===================================================================
> --- linux-2.6-galak.orig/arch/powerpc/boot/dts/socrates.dts     2009-04-07 10:09:07.161718915 +0200
> +++ linux-2.6-galak/arch/powerpc/boot/dts/socrates.dts  2009-04-07 10:09:16.207719258 +0200
> @@ -79,11 +79,11 @@
>                        #address-cells = <1>;
>                        #size-cells = <0>;
>                        cell-index = <0>;
> -                       compatible = "fsl-i2c";
> +                       compatible = "fsl,mpc8544-i2c", "fsl-i2c";
>                        reg = <0x3000 0x100>;
>                        interrupts = <43 2>;
>                        interrupt-parent = <&mpic>;
> -                       dfsrr;
> +                       fsl,preserve-clocking;
>
>                        dtt@28 {
>                                compatible = "winbond,w83782d";
> @@ -111,11 +111,11 @@
>                        #address-cells = <1>;
>                        #size-cells = <0>;
>                        cell-index = <1>;
> -                       compatible = "fsl-i2c";
> +                       compatible = "fsl,mpc8544-i2c", "fsl-i2c";
>                        reg = <0x3100 0x100>;
>                        interrupts = <43 2>;
>                        interrupt-parent = <&mpic>;
> -                       dfsrr;
> +                       fsl,preserve-clocking;
>                };
>
>                enet0: ethernet@24000 {
>
>



-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

Re: [PATCH v3 5/5] powerpc/85xx: i2c-mpc: use new I2C bindings for the Socates board

[Wolfgang Grandegger]

Grant Likely wrote:
> On Tue, Apr 7, 2009 at 1:20 AM, Wolfgang Grandegger <wg@grandegger.com> wrote:
>> Preserve I2C clock settings for the Socrates MPC8544 board.
> 
> I had thought that the preserve-clocking property was intended for
> older boards that don't currently have any method of getting the clock
> setting out of u-boot.  Since Socrates is a new board, U-Boot should
> probably be made to fill in the real clock rate setting.

I'm not sure if I understand what you mean. If an old version of U-Boot
on an old board sets the I2C clock, it can be used (inherited) by Linux
using the property "preserve-clocking".

It is actually the customers choice to set the I2C clock in U-Boot and
re-use it by Linux.

Wolfgang.

Re: [PATCH v3 5/5] powerpc/85xx: i2c-mpc: use new I2C bindings for the Socates board

[Grant Likely]

On Wed, Apr 8, 2009 at 12:16 AM, Wolfgang Grandegger <wg@grandegger.com> wrote:
> Grant Likely wrote:
>> On Tue, Apr 7, 2009 at 1:20 AM, Wolfgang Grandegger <wg@grandegger.com> wrote:
>>> Preserve I2C clock settings for the Socrates MPC8544 board.
>>
>> I had thought that the preserve-clocking property was intended for
>> older boards that don't currently have any method of getting the clock
>> setting out of u-boot.  Since Socrates is a new board, U-Boot should
>> probably be made to fill in the real clock rate setting.
>
> I'm not sure if I understand what you mean. If an old version of U-Boot
> on an old board sets the I2C clock, it can be used (inherited) by Linux
> using the property "preserve-clocking".
>
> It is actually the customers choice to set the I2C clock in U-Boot and
> re-use it by Linux.

Setting it in the register != recording the value in the device tree.
I'm saying that since Socrates is a new board it should not use the
preserve-clocking dirty trick (and it is a dirty trick) because the
correct clocking data can be passed via the device tree.

g.


-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

Re: [PATCH v3 5/5] powerpc/85xx: i2c-mpc: use new I2C bindings for the Socates board

[Wolfgang Grandegger]

Grant Likely wrote:
> On Wed, Apr 8, 2009 at 12:16 AM, Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org> wrote:
>> Grant Likely wrote:
>>> On Tue, Apr 7, 2009 at 1:20 AM, Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org> wrote:
>>>> Preserve I2C clock settings for the Socrates MPC8544 board.
>>> I had thought that the preserve-clocking property was intended for
>>> older boards that don't currently have any method of getting the clock
>>> setting out of u-boot.  Since Socrates is a new board, U-Boot should
>>> probably be made to fill in the real clock rate setting.
>> I'm not sure if I understand what you mean. If an old version of U-Boot
>> on an old board sets the I2C clock, it can be used (inherited) by Linux
>> using the property "preserve-clocking".
>>
>> It is actually the customers choice to set the I2C clock in U-Boot and
>> re-use it by Linux.
> 
> Setting it in the register != recording the value in the device tree.
> I'm saying that since Socrates is a new board it should not use the
> preserve-clocking dirty trick (and it is a dirty trick) because the
> correct clocking data can be passed via the device tree.

Why should an old board then use it. "fsl, preserve-clocking" is a new
feature, like using "clock-frequency" and you have the choice to
explicitly set the clocking via device tree or inherit it from the boot
loader. So far, a fixed FDR/DFRSS value (0x1031) was written to the
registers by Linux.

Wolfgang.

Re: [PATCH v3 5/5] powerpc/85xx: i2c-mpc: use new I2C bindings for the Socates board

[Kumar Gala]

On Apr 8, 2009, at 1:27 PM, Wolfgang Grandegger wrote:

> Grant Likely wrote:
>> On Wed, Apr 8, 2009 at 12:16 AM, Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org 
>> > wrote:
>>> Grant Likely wrote:
>>>> On Tue, Apr 7, 2009 at 1:20 AM, Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org 
>>>> > wrote:
>>>>> Preserve I2C clock settings for the Socrates MPC8544 board.
>>>> I had thought that the preserve-clocking property was intended for
>>>> older boards that don't currently have any method of getting the  
>>>> clock
>>>> setting out of u-boot.  Since Socrates is a new board, U-Boot  
>>>> should
>>>> probably be made to fill in the real clock rate setting.
>>> I'm not sure if I understand what you mean. If an old version of U- 
>>> Boot
>>> on an old board sets the I2C clock, it can be used (inherited) by  
>>> Linux
>>> using the property "preserve-clocking".
>>>
>>> It is actually the customers choice to set the I2C clock in U-Boot  
>>> and
>>> re-use it by Linux.
>>
>> Setting it in the register != recording the value in the device tree.
>> I'm saying that since Socrates is a new board it should not use the
>> preserve-clocking dirty trick (and it is a dirty trick) because the
>> correct clocking data can be passed via the device tree.
>
> Why should an old board then use it. "fsl, preserve-clocking" is a new
> feature, like using "clock-frequency" and you have the choice to
> explicitly set the clocking via device tree or inherit it from the  
> boot
> loader. So far, a fixed FDR/DFRSS value (0x1031) was written to the
> registers by Linux.

I think Grant's point is socrates is a new board with a new u-boot.   
That u-boot should be able to set the clock-frequency property in  
i2c.  One assumes if you a clock-frequency property you wouldn't use  
"fsl,preserve-clocking".  (However -- its feasible they are mutually  
exclusive).

- k

Re: [PATCH v3 5/5] powerpc/85xx: i2c-mpc: use new I2C bindings for the Socates board

[Wolfgang Grandegger]

Kumar Gala wrote:
> 
> On Apr 8, 2009, at 1:27 PM, Wolfgang Grandegger wrote:
> 
>> Grant Likely wrote:
>>> On Wed, Apr 8, 2009 at 12:16 AM, Wolfgang Grandegger
>>> <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org> wrote:
>>>> Grant Likely wrote:
>>>>> On Tue, Apr 7, 2009 at 1:20 AM, Wolfgang Grandegger
>>>>> <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org> wrote:
>>>>>> Preserve I2C clock settings for the Socrates MPC8544 board.
>>>>> I had thought that the preserve-clocking property was intended for
>>>>> older boards that don't currently have any method of getting the clock
>>>>> setting out of u-boot.  Since Socrates is a new board, U-Boot should
>>>>> probably be made to fill in the real clock rate setting.
>>>> I'm not sure if I understand what you mean. If an old version of U-Boot
>>>> on an old board sets the I2C clock, it can be used (inherited) by Linux
>>>> using the property "preserve-clocking".
>>>>
>>>> It is actually the customers choice to set the I2C clock in U-Boot and
>>>> re-use it by Linux.
>>>
>>> Setting it in the register != recording the value in the device tree.
>>> I'm saying that since Socrates is a new board it should not use the
>>> preserve-clocking dirty trick (and it is a dirty trick) because the
>>> correct clocking data can be passed via the device tree.
>>
>> Why should an old board then use it. "fsl, preserve-clocking" is a new
>> feature, like using "clock-frequency" and you have the choice to
>> explicitly set the clocking via device tree or inherit it from the boot
>> loader. So far, a fixed FDR/DFRSS value (0x1031) was written to the
>> registers by Linux.
> 
> I think Grant's point is socrates is a new board with a new u-boot. 
> That u-boot should be able to set the clock-frequency property in i2c. 
> One assumes if you a clock-frequency property you wouldn't use
> "fsl,preserve-clocking".  (However -- its feasible they are mutually
> exclusive).

OK, now it makes more sense to me even if I never thought that way. My
intention was to allow Linux to use a *different* frequency as the
bootloader by specifying the "clock-frequency" property. This would not
be possible with a fixup by the bootloader.

Wolfgang.

Re: [PATCH v3 0/5] i2c: i2c-mpc: make I2C bus speed configurable

[Kumar Gala]

On Apr 7, 2009, at 3:20 AM, Wolfgang Grandegger wrote:

> This patch series makes the I2C bus speed configurable by using the
> I2C node property "clock-frequency". If the property is not defined,
> the old fixed clock settings will be used for backward compatibility.
> The property "fsl,preserve-clocking" allows to inherit the settings
> from the bootloader. Furthermore, it does some cleanup and uses the
> new bindings for the Socrates board:
>
>  i2c: i2c-mpc: various coding style fixes
>  i2c: i2c-mpc: use dev based printout function
>  i2c: i2c-mpc: make I2C bus speed configurable

It looks like Ben picked up these patches.

>  powerpc: i2c-mpc: document new FSL I2C bindings and cleanup
>  powerpc/85xx: i2c-mpc: use new I2C bindings for the Socates board

I would have preferred these two go via me, but it looks like the  
board one got picked up by Ben.  I'll deal with the doc/binding update.
>
> Ben, could you please consider this patch series for inclusion into
> 2.6.30.

- k

Re: [PATCH v3 0/5] i2c: i2c-mpc: make I2C bus speed configurable

[Grant Likely]

On Tue, Apr 7, 2009 at 10:11 PM, Kumar Gala <galak-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org> wrote:
>
> On Apr 7, 2009, at 3:20 AM, Wolfgang Grandegger wrote:
>
>> This patch series makes the I2C bus speed configurable by using the
>> I2C node property "clock-frequency". If the property is not defined,
>> the old fixed clock settings will be used for backward compatibility.
>> The property "fsl,preserve-clocking" allows to inherit the settings
>> from the bootloader. Furthermore, it does some cleanup and uses the
>> new bindings for the Socrates board:
>>
>>  i2c: i2c-mpc: various coding style fixes
>>  i2c: i2c-mpc: use dev based printout function
>>  i2c: i2c-mpc: make I2C bus speed configurable
>
> It looks like Ben picked up these patches.
>
>>  powerpc: i2c-mpc: document new FSL I2C bindings and cleanup
>>  powerpc/85xx: i2c-mpc: use new I2C bindings for the Socates board
>
> I would have preferred these two go via me, but it looks like the board one
> got picked up by Ben.  I'll deal with the doc/binding update.

hrummm.  As I mentioned in my reply, I'm not convinced that the board
one is the right thing in this case.  I would have preferred it to be
deferred.

g.

-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

Re: [PATCH v3 0/5] i2c: i2c-mpc: make I2C bus speed configurable

[Kumar Gala]

On Apr 8, 2009, at 12:16 AM, Grant Likely wrote:

> On Tue, Apr 7, 2009 at 10:11 PM, Kumar Gala  
> <galak@kernel.crashing.org> wrote:
>>
>> On Apr 7, 2009, at 3:20 AM, Wolfgang Grandegger wrote:
>>
>>> This patch series makes the I2C bus speed configurable by using the
>>> I2C node property "clock-frequency". If the property is not defined,
>>> the old fixed clock settings will be used for backward  
>>> compatibility.
>>> The property "fsl,preserve-clocking" allows to inherit the settings
>>> from the bootloader. Furthermore, it does some cleanup and uses the
>>> new bindings for the Socrates board:
>>>
>>>  i2c: i2c-mpc: various coding style fixes
>>>  i2c: i2c-mpc: use dev based printout function
>>>  i2c: i2c-mpc: make I2C bus speed configurable
>>
>> It looks like Ben picked up these patches.
>>
>>>  powerpc: i2c-mpc: document new FSL I2C bindings and cleanup
>>>  powerpc/85xx: i2c-mpc: use new I2C bindings for the Socates board
>>
>> I would have preferred these two go via me, but it looks like the  
>> board one
>> got picked up by Ben.  I'll deal with the doc/binding update.
>
> hrummm.  As I mentioned in my reply, I'm not convinced that the board
> one is the right thing in this case.  I would have preferred it to be
> deferred.

which part?  I missed this whole thread as I had it forwarding to my  
devicetree-discuss folder which I don't normally look at.

- k

Re: [PATCH v3 0/5] i2c: i2c-mpc: make I2C bus speed configurable

[Grant Likely]

On Tue, Apr 7, 2009 at 10:22 PM, Kumar Gala <galak@kernel.crashing.org> wrote:
>
> On Apr 8, 2009, at 12:16 AM, Grant Likely wrote:
>
>> On Tue, Apr 7, 2009 at 10:11 PM, Kumar Gala <galak@kernel.crashing.org>
>> wrote:
>>>
>>> On Apr 7, 2009, at 3:20 AM, Wolfgang Grandegger wrote:
>>>
>>>> This patch series makes the I2C bus speed configurable by using the
>>>> I2C node property "clock-frequency". If the property is not defined,
>>>> the old fixed clock settings will be used for backward compatibility.
>>>> The property "fsl,preserve-clocking" allows to inherit the settings
>>>> from the bootloader. Furthermore, it does some cleanup and uses the
>>>> new bindings for the Socrates board:
>>>>
>>>>  i2c: i2c-mpc: various coding style fixes
>>>>  i2c: i2c-mpc: use dev based printout function
>>>>  i2c: i2c-mpc: make I2C bus speed configurable
>>>
>>> It looks like Ben picked up these patches.
>>>
>>>>  powerpc: i2c-mpc: document new FSL I2C bindings and cleanup
>>>>  powerpc/85xx: i2c-mpc: use new I2C bindings for the Socates board
>>>
>>> I would have preferred these two go via me, but it looks like the board
>>> one
>>> got picked up by Ben.  I'll deal with the doc/binding update.
>>
>> hrummm.  As I mentioned in my reply, I'm not convinced that the board
>> one is the right thing in this case.  I would have preferred it to be
>> deferred.
>
> which part?  I missed this whole thread as I had it forwarding to my
> devicetree-discuss folder which I don't normally look at.

Here you go:

On Tue, Apr 7, 2009 at 8:43 AM, Grant Likely <grant.likely@secretlab.ca> wrote:
> On Tue, Apr 7, 2009 at 1:20 AM, Wolfgang Grandegger <wg@grandegger.com> wrote:
>> Preserve I2C clock settings for the Socrates MPC8544 board.
>
> I had thought that the preserve-clocking property was intended for
> older boards that don't currently have any method of getting the clock
> setting out of u-boot.  Since Socrates is a new board, U-Boot should
> probably be made to fill in the real clock rate setting.
>
> g.

-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

Re: [PATCH v3 0/5] i2c: i2c-mpc: make I2C bus speed configurable

[Wolfgang Grandegger]

Kumar Gala wrote:
> 
> On Apr 8, 2009, at 12:16 AM, Grant Likely wrote:
> 
>> On Tue, Apr 7, 2009 at 10:11 PM, Kumar Gala
>> <galak-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org> wrote:
>>>
>>> On Apr 7, 2009, at 3:20 AM, Wolfgang Grandegger wrote:
>>>
>>>> This patch series makes the I2C bus speed configurable by using the
>>>> I2C node property "clock-frequency". If the property is not defined,
>>>> the old fixed clock settings will be used for backward compatibility.
>>>> The property "fsl,preserve-clocking" allows to inherit the settings
>>>> from the bootloader. Furthermore, it does some cleanup and uses the
>>>> new bindings for the Socrates board:
>>>>
>>>>  i2c: i2c-mpc: various coding style fixes
>>>>  i2c: i2c-mpc: use dev based printout function
>>>>  i2c: i2c-mpc: make I2C bus speed configurable
>>>
>>> It looks like Ben picked up these patches.

Ah, I just saw the pull request.

>>>>  powerpc: i2c-mpc: document new FSL I2C bindings and cleanup
>>>>  powerpc/85xx: i2c-mpc: use new I2C bindings for the Socates board
>>>
>>> I would have preferred these two go via me, but it looks like the
>>> board one
>>> got picked up by Ben.  I'll deal with the doc/binding update.

That was my intention, at least.

>> hrummm.  As I mentioned in my reply, I'm not convinced that the board
>> one is the right thing in this case.  I would have preferred it to be
>> deferred.
> 
> which part?  I missed this whole thread as I had it forwarding to my
> devicetree-discuss folder which I don't normally look at.

I hate these cross-postings as well. I just answered to Grant's mail.

Wolfgang.

Re: [PATCH v3 0/5] i2c: i2c-mpc: make I2C bus speed configurable

[Scott Wood]

On Wed, Apr 08, 2009 at 12:22:29AM -0500, Kumar Gala wrote:
> >hrummm.  As I mentioned in my reply, I'm not convinced that the board
> >one is the right thing in this case.  I would have preferred it to be
> >deferred.
> 
> which part?  I missed this whole thread as I had it forwarding to my  
> devicetree-discuss folder which I don't normally look at.

Can you reorder your filters to check for more frequently read lists
first?

-Scott

Re: [PATCH v3 0/5] i2c: i2c-mpc: make I2C bus speed configurable

[Kumar Gala]

On Apr 8, 2009, at 12:03 PM, Scott Wood wrote:

> On Wed, Apr 08, 2009 at 12:22:29AM -0500, Kumar Gala wrote:
>>> hrummm.  As I mentioned in my reply, I'm not convinced that the  
>>> board
>>> one is the right thing in this case.  I would have preferred it to  
>>> be
>>> deferred.
>>
>> which part?  I missed this whole thread as I had it forwarding to my
>> devicetree-discuss folder which I don't normally look at.
>
> Can you reorder your filters to check for more frequently read lists
> first?

Yeah I did.

- k

Re: [PATCH v3 0/5] i2c: i2c-mpc: make I2C bus speed configurable

[Kumar Gala]

On Apr 8, 2009, at 12:11 AM, Kumar Gala wrote:

>
> On Apr 7, 2009, at 3:20 AM, Wolfgang Grandegger wrote:
>
>> This patch series makes the I2C bus speed configurable by using the
>> I2C node property "clock-frequency". If the property is not defined,
>> the old fixed clock settings will be used for backward compatibility.
>> The property "fsl,preserve-clocking" allows to inherit the settings
>> from the bootloader. Furthermore, it does some cleanup and uses the
>> new bindings for the Socrates board:
>>
>> i2c: i2c-mpc: various coding style fixes
>> i2c: i2c-mpc: use dev based printout function
>> i2c: i2c-mpc: make I2C bus speed configurable
>
> It looks like Ben picked up these patches.
>
>> powerpc: i2c-mpc: document new FSL I2C bindings and cleanup
>> powerpc/85xx: i2c-mpc: use new I2C bindings for the Socates board
>
> I would have preferred these two go via me, but it looks like the  
> board one got picked up by Ben.  I'll deal with the doc/binding  
> update.
>>
>> Ben, could you please consider this patch series for inclusion into
>> 2.6.30

So I'm a bit concerned with the output we now get:

mpc-i2c fffe03000.i2c: clock 0 Hz (dfsrr=16 fdr=49)

why 0? is that right?

- k

Re: [PATCH v3 0/5] i2c: i2c-mpc: make I2C bus speed configurable

[Wolfgang Grandegger]

Kumar Gala wrote:
> 
> On Apr 8, 2009, at 12:11 AM, Kumar Gala wrote:
> 
>>
>> On Apr 7, 2009, at 3:20 AM, Wolfgang Grandegger wrote:
>>
>>> This patch series makes the I2C bus speed configurable by using the
>>> I2C node property "clock-frequency". If the property is not defined,
>>> the old fixed clock settings will be used for backward compatibility.
>>> The property "fsl,preserve-clocking" allows to inherit the settings
>>> from the bootloader. Furthermore, it does some cleanup and uses the
>>> new bindings for the Socrates board:
>>>
>>> i2c: i2c-mpc: various coding style fixes
>>> i2c: i2c-mpc: use dev based printout function
>>> i2c: i2c-mpc: make I2C bus speed configurable
>>
>> It looks like Ben picked up these patches.
>>
>>> powerpc: i2c-mpc: document new FSL I2C bindings and cleanup
>>> powerpc/85xx: i2c-mpc: use new I2C bindings for the Socates board
>>
>> I would have preferred these two go via me, but it looks like the
>> board one got picked up by Ben.  I'll deal with the doc/binding update.
>>>
>>> Ben, could you please consider this patch series for inclusion into
>>> 2.6.30
> 
> So I'm a bit concerned with the output we now get:
> 
> mpc-i2c fffe03000.i2c: clock 0 Hz (dfsrr=16 fdr=49)
> 
> why 0? is that right?

This is the backward compatibility mode using hard-coded FDR values. The
output is missleading, I agree.

Wolfgang.

Re: [PATCH v3 0/5] i2c: i2c-mpc: make I2C bus speed configurable

[Kumar Gala]

On Apr 8, 2009, at 2:25 AM, Wolfgang Grandegger wrote:

>> So I'm a bit concerned with the output we now get:
>>
>> mpc-i2c fffe03000.i2c: clock 0 Hz (dfsrr=16 fdr=49)
>>
>> why 0? is that right?
>
> This is the backward compatibility mode using hard-coded FDR values.  
> The
> output is missleading, I agree.
>
> Wolfgang.

Can the output be fixed.  0 Hz seemed bad to me.

- k

Re: [PATCH v3 0/5] i2c: i2c-mpc: make I2C bus speed configurable

[Wolfgang Grandegger]

Kumar Gala wrote:
> 
> On Apr 8, 2009, at 2:25 AM, Wolfgang Grandegger wrote:
> 
>>> So I'm a bit concerned with the output we now get:
>>>
>>> mpc-i2c fffe03000.i2c: clock 0 Hz (dfsrr=16 fdr=49)
>>>
>>> why 0? is that right?
>>
>> This is the backward compatibility mode using hard-coded FDR values. The
>> output is missleading, I agree.
>>
>> Wolfgang.
> 
> Can the output be fixed.  0 Hz seemed bad to me.

Of course. No info message will be printed for the legacy case
like it was with the old driver version. I just realized a bug in the
MPC52xx part. Will send patches tomorrow, after some more thorough testing.

Wolfgang.

Re: [PATCH v3 0/5] i2c: i2c-mpc: make I2C bus speed configurable

[Wolfgang Grandegger]

Wolfgang Grandegger wrote:
> Kumar Gala wrote:
>> On Apr 8, 2009, at 2:25 AM, Wolfgang Grandegger wrote:
>>
>>>> So I'm a bit concerned with the output we now get:
>>>>
>>>> mpc-i2c fffe03000.i2c: clock 0 Hz (dfsrr=16 fdr=49)
>>>>
>>>> why 0? is that right?
>>> This is the backward compatibility mode using hard-coded FDR values. The
>>> output is missleading, I agree.
>>>
>>> Wolfgang.
>> Can the output be fixed.  0 Hz seemed bad to me.
> 
> Of course. No info message will be printed for the legacy case
> like it was with the old driver version. I just realized a bug in the
> MPC52xx part. Will send patches tomorrow, after some more thorough testing.

The patch below fixes both issues. Ben, could you please apply it. Sorry for
the inconvenience caused.

Thanks,

Wolfgang.



[PATCH] i2c: i2c-mpc: bug fix for MPC52xx clock setting and printout

The clock setting did not work for the MPC52xx due to a stupid bug.
Furthermore, the dev info output "clock=0" for old device trees was
misleading. This patch fixes both issues.

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
---
 drivers/i2c/busses/i2c-mpc.c |   34 ++++++++++++++++++++--------------
 1 file changed, 20 insertions(+), 14 deletions(-)

Index: linux-2.6-galak/drivers/i2c/busses/i2c-mpc.c
===================================================================
--- linux-2.6-galak.orig/drivers/i2c/busses/i2c-mpc.c	2009-04-08 21:51:31.771719368 +0200
+++ linux-2.6-galak/drivers/i2c/busses/i2c-mpc.c	2009-04-09 11:18:45.812969033 +0200
@@ -164,7 +164,7 @@
 	return 0;
 }
 
-#ifdef CONFIG_PPC_52xx
+#ifdef CONFIG_PPC_MPC52xx
 static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
 	{20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23},
 	{28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02},
@@ -188,7 +188,7 @@
 
 int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock, int prescaler)
 {
-	const struct mpc52xx_i2c_divider *div = NULL;
+	const struct mpc_i2c_divider *div = NULL;
 	unsigned int pvr = mfspr(SPRN_PVR);
 	u32 divider;
 	int i;
@@ -203,7 +203,7 @@
 	 * We want to choose an FDR/DFSR that generates an I2C bus speed that
 	 * is equal to or lower than the requested speed.
 	 */
-	for (i = 0; i < ARRAY_SIZE(mpc52xx_i2c_dividers); i++) {
+	for (i = 0; i < ARRAY_SIZE(mpc_i2c_dividers_52xx); i++) {
 		div = &mpc_i2c_dividers_52xx[i];
 		/* Old MPC5200 rev A CPUs do not support the high bits */
 		if (div->fdr & 0xc0 && pvr == 0x80822011)
@@ -219,20 +219,23 @@
 				  struct mpc_i2c *i2c,
 				  u32 clock, u32 prescaler)
 {
-	int fdr = mpc52xx_i2c_get_fdr(node, clock, prescaler);
+	int ret, fdr;
+
+	ret = mpc_i2c_get_fdr_52xx(node, clock, prescaler);
+	fdr = (ret >= 0) ? ret : 0x3f; /* backward compatibility */
 
-	if (fdr < 0)
-		fdr = 0x3f; /* backward compatibility */
 	writeb(fdr & 0xff, i2c->base + MPC_I2C_FDR);
-	dev_info(i2c->dev, "clock %d Hz (fdr=%d)\n", clock, fdr);
+
+	if (ret >= 0)
+		dev_info(i2c->dev, "clock %d Hz (fdr=%d)\n", clock, fdr);
 }
-#else /* !CONFIG_PPC_52xx */
+#else /* !CONFIG_PPC_MPC52xx */
 static void mpc_i2c_setclock_52xx(struct device_node *node,
 				  struct mpc_i2c *i2c,
 				  u32 clock, u32 prescaler)
 {
 }
-#endif /* CONFIG_PPC_52xx*/
+#endif /* CONFIG_PPC_MPC52xx*/
 
 #ifdef CONFIG_FSL_SOC
 static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] = {
@@ -321,14 +324,17 @@
 				  struct mpc_i2c *i2c,
 				  u32 clock, u32 prescaler)
 {
-	int fdr = mpc_i2c_get_fdr_8xxx(node, clock, prescaler);
+	int ret, fdr;
+
+	ret = mpc_i2c_get_fdr_8xxx(node, clock, prescaler);
+	fdr = (ret >= 0) ? ret : 0x1031; /* backward compatibility */
 
-	if (fdr < 0)
-		fdr = 0x1031; /* backward compatibility */
 	writeb(fdr & 0xff, i2c->base + MPC_I2C_FDR);
 	writeb((fdr >> 8) & 0xff, i2c->base + MPC_I2C_DFSRR);
-	dev_info(i2c->dev, "clock %d Hz (dfsrr=%d fdr=%d)\n",
-		 clock, fdr >> 8, fdr & 0xff);
+
+	if (ret >= 0)
+		dev_info(i2c->dev, "clock %d Hz (dfsrr=%d fdr=%d)\n",
+			 clock, fdr >> 8, fdr & 0xff);
 }
 
 #else /* !CONFIG_FSL_SOC */

Re: [PATCH v3 0/5] i2c: i2c-mpc: make I2C bus speed configurable

[Wolfgang Grandegger]

Hi Ben,

Wolfgang Grandegger wrote:
> Wolfgang Grandegger wrote:
>> Kumar Gala wrote:
>>> On Apr 8, 2009, at 2:25 AM, Wolfgang Grandegger wrote:
>>>
>>>>> So I'm a bit concerned with the output we now get:
>>>>>
>>>>> mpc-i2c fffe03000.i2c: clock 0 Hz (dfsrr=16 fdr=49)
>>>>>
>>>>> why 0? is that right?
>>>> This is the backward compatibility mode using hard-coded FDR values. The
>>>> output is missleading, I agree.
>>>>
>>>> Wolfgang.
>>> Can the output be fixed.  0 Hz seemed bad to me.
>> Of course. No info message will be printed for the legacy case
>> like it was with the old driver version. I just realized a bug in the
>> MPC52xx part. Will send patches tomorrow, after some more thorough testing.
> 
> The patch below fixes both issues. Ben, could you please apply it. Sorry for
> the inconvenience caused.
> 
> Thanks,
> 
> Wolfgang.
> 
> 
> 
> [PATCH] i2c: i2c-mpc: bug fix for MPC52xx clock setting and printout
> 
> The clock setting did not work for the MPC52xx due to a stupid bug.
> Furthermore, the dev info output "clock=0" for old device trees was
> misleading. This patch fixes both issues.
> 
> Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>

Could you please apply this bug-fix for the MPC driver for 2.6.30.

  http://marc.info/?l=linux-i2c&m=123927120910293&w=2

Thanks,

Wolfgang.

Re: [PATCH v3 0/5] i2c: i2c-mpc: make I2C bus speed configurable

[Grant Likely]

On Mon, Apr 20, 2009 at 3:01 AM, Wolfgang Grandegger <wg@grandegger.com> wrote:
> Hi Ben,
>
> Wolfgang Grandegger wrote:
>> Wolfgang Grandegger wrote:
>>> Kumar Gala wrote:
>>>> On Apr 8, 2009, at 2:25 AM, Wolfgang Grandegger wrote:
>>>>
>>>>>> So I'm a bit concerned with the output we now get:
>>>>>>
>>>>>> mpc-i2c fffe03000.i2c: clock 0 Hz (dfsrr=16 fdr=49)
>>>>>>
>>>>>> why 0? is that right?
>>>>> This is the backward compatibility mode using hard-coded FDR values. The
>>>>> output is missleading, I agree.
>>>>>
>>>>> Wolfgang.
>>>> Can the output be fixed.  0 Hz seemed bad to me.
>>> Of course. No info message will be printed for the legacy case
>>> like it was with the old driver version. I just realized a bug in the
>>> MPC52xx part. Will send patches tomorrow, after some more thorough testing.
>>
>> The patch below fixes both issues. Ben, could you please apply it. Sorry for
>> the inconvenience caused.
>>
>> Thanks,
>>
>> Wolfgang.
>>
>>
>>
>> [PATCH] i2c: i2c-mpc: bug fix for MPC52xx clock setting and printout
>>
>> The clock setting did not work for the MPC52xx due to a stupid bug.
>> Furthermore, the dev info output "clock=0" for old device trees was
>> misleading. This patch fixes both issues.
>>
>> Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
>
> Could you please apply this bug-fix for the MPC driver for 2.6.30.

Acked-by: Grant Likely <grant.likely@secretlab.ca>

>
>  http://marc.info/?l=linux-i2c&m=123927120910293&w=2
>
> Thanks,
>
> Wolfgang.
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
>



-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.