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* Re: [PATCH v8 02/12] dt-bindings: document devicetree bindings for mux-controllers and mux-gpio
From: Peter Rosin @ 2017-01-27 18:57 UTC (permalink / raw)
  To: Rob Herring
  Cc: linux-kernel, Wolfram Sang, Mark Rutland, Jonathan Cameron,
	Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
	Jonathan Corbet, Andrew Morton, linux-i2c, devicetree, linux-iio,
	linux-doc
In-Reply-To: <20170127174919.b7yliip6e7zofrbn@rob-hp-laptop>

On 2017-01-27 18:49, Rob Herring wrote:
> On Wed, Jan 18, 2017 at 04:57:05PM +0100, Peter Rosin wrote:
>> Allow specifying that a single multiplexer controller can be used to control
>> several parallel multiplexers, thus enabling sharing of the multiplexer
>> controller by different consumers.
>>
>> Add a binding for a first mux controller in the form of a GPIO based mux
>> controlled.
>>
>> Acked-by: Jonathan Cameron <jic23@kernel.org>
>> Signed-off-by: Peter Rosin <peda@axentia.se>
>> ---
>>  .../devicetree/bindings/mux/mux-controller.txt     | 127 +++++++++++++++++++++
>>  Documentation/devicetree/bindings/mux/mux-gpio.txt |  68 +++++++++++
>>  MAINTAINERS                                        |   5 +
>>  3 files changed, 200 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/mux/mux-controller.txt
>>  create mode 100644 Documentation/devicetree/bindings/mux/mux-gpio.txt
> 
> A few nits. With those fixed:
> 
> Acked-by: Rob Herring <robh@kernel.org>
> 
>>
>> diff --git a/Documentation/devicetree/bindings/mux/mux-controller.txt b/Documentation/devicetree/bindings/mux/mux-controller.txt
>> new file mode 100644
>> index 000000000000..42b2177e5ae1
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/mux/mux-controller.txt
>> @@ -0,0 +1,127 @@
>> +Common multiplexer controller bindings
>> +======================================
>> +
>> +A multiplexer (or mux) controller will have one, or several, consumer devices
>> +that uses the mux controller. Thus, a mux controller can possibly control
>> +several parallel multiplexers. Presumably there will be at least one
>> +multiplexer needed by each consumer, but a single mux controller can of course
>> +control several multiplexers for a single consumer.
>> +
>> +A mux controller provides a number of states to its consumers, and the state
>> +space is a simple zero-based enumeration. I.e. 0-1 for a 2-way multiplexer,
>> +0-7 for an 8-way multiplexer, etc.
>> +
>> +
>> +Consumers
>> +---------
>> +
>> +Mux controller consumers should specify a list of mux controllers that they
>> +want to use with a property containing a 'mux-ctrl-list':
>> +
>> +	mux-ctrl-list ::= <single-mux-ctrl> [mux-ctrl-list]
>> +	single-mux-ctrl ::= <mux-ctrl-phandle> [mux-ctrl-specifier]
>> +	mux-ctrl-phandle : phandle to mux controller node
>> +	mux-ctrl-specifier : array of #mux-control-cells specifying the
>> +			     given mux controller (controller specific)
>> +
>> +Mux controller properties should be named "mux-controls". The exact meaning of
>> +each mux controller property must be documented in the device tree binding for
>> +each consumer. An optional property "mux-control-names" may contain a list of
>> +strings to label each of the mux controllers listed in the "mux-controls"
>> +property.
>> +
>> +Drivers for devices that use more than a single mux controller can use the
>> +"mux-control-names" property to map the name of the requested mux controller
>> +to an index into the list given by the "mux-controls" property.
>> +
>> +mux-ctrl-specifier typically encodes the chip-relative mux controller number.
>> +If the mux controller chip only provides a single mux controller, the
>> +mux-ctrl-specifier can typically be left out.
>> +
>> +Example:
>> +
>> +	/* One consumer of a 2-way mux controller (one GPIO-line) */
>> +	mux: mux-controller {
>> +		compatible = "mux-gpio";
>> +		#mux-control-cells = <0>;
>> +
>> +		mux-gpios = <&pioA 0 GPIO_ACTIVE_HIGH>;
>> +	};
>> +
>> +	adc-mux {
>> +		compatible = "io-channel-mux";
>> +		io-channels = <&adc 0>;
>> +		io-channel-names = "parent";
>> +		mux-controls = <&mux>;
>> +		mux-control-names = "adc";
>> +
>> +		channels = "sync", "in";
>> +	};
>> +
>> +Note that in the example above, specifying the "mux-control-names" is redundant
>> +because there is only one mux controller in the list.
>> +
>> +	/*
>> +	 * Two consumers (one for an ADC line and one for an i2c bus) of
>> +	 * parallel 4-way multiplexers controlled by the same two GPIO-lines.
>> +	 */
>> +	mux: mux-controller {
>> +		compatible = "mux-gpio";
>> +		#mux-control-cells = <0>;
>> +
>> +		mux-gpios = <&pioA 0 GPIO_ACTIVE_HIGH>,
>> +			    <&pioA 1 GPIO_ACTIVE_HIGH>;
>> +	};
>> +
>> +	adc-mux {
>> +		compatible = "io-channel-mux";
>> +		io-channels = <&adc 0>;
>> +		io-channel-names = "parent";
>> +		mux-controls = <&mux>;
>> +
>> +		channels = "sync-1", "in", "out", "sync-2";
>> +	};
>> +
>> +	i2c-mux {
>> +		compatible = "i2c-mux-simple,mux-locked";
>> +		i2c-parent = <&i2c1>;
>> +		mux-controls = <&mux>;
>> +
>> +		#address-cells = <1>;
>> +		#size-cells = <0>;
>> +
>> +		i2c@0 {
>> +			reg = <0>;
>> +			#address-cells = <1>;
>> +			#size-cells = <0>;
>> +
>> +			ssd1307: oled@3c {
>> +				/* ... */
>> +			};
>> +		};
>> +
>> +		i2c@3 {
>> +			reg = <3>;
>> +			#address-cells = <1>;
>> +			#size-cells = <0>;
>> +
>> +			pca9555: pca9555@20 {
>> +				/* ... */
>> +			};
>> +		};
>> +	};
>> +
>> +
>> +Mux controller nodes
>> +--------------------
>> +
>> +Mux controller nodes must specify the number of cells used for the
>> +specifier using the '#mux-control-cells' property.
>> +
>> +An example mux controller might look like this:
>> +
>> +	mux: adg792a@50 {
> 
> mux-controller@50

Right, adding that to my queue.

>> +		compatible = "adi,adg792a";
>> +		reg = <0x50>;
>> +		#mux-control-cells = <1>;
>> +	};
>> diff --git a/Documentation/devicetree/bindings/mux/mux-gpio.txt b/Documentation/devicetree/bindings/mux/mux-gpio.txt
>> new file mode 100644
>> index 000000000000..8f6bda6f9d78
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/mux/mux-gpio.txt
>> @@ -0,0 +1,68 @@
>> +GPIO-based multiplexer controller bindings
>> +
>> +Define what GPIO pins are used to control a multiplexer. Or several
>> +multiplexers, if the same pins control more than one multiplexer.
>> +
>> +Required properties:
>> +- compatible : "mux-gpio"
> 
> Just to be consistent with other gpio compatibles: gpio-mux

Sure, I'll also rename mux-gpio.txt to gpio-mux.txt and mux-adg792a.txt
to adi,adg792a.txt so that the file names match the compatible string.

>> +- mux-gpios : list of gpios used to control the multiplexer, least
>> +	      significant bit first.
>> +- #mux-control-cells : <0>
>> +* Standard mux-controller bindings as decribed in mux-controller.txt
>> +
>> +Optional properties:
>> +- idle-state : if present, the state the mux will have when idle.
> 
> Why is this gpio specific. Can be a common controller property?

The binding isn't appropriate for e.g. adg792a and it will not be
appropriate for any mux chip with more than one mux controller. But
sure, there could be a generic binding for all chips with a single
mux controller...

So, do you still think idle-state should be a generic binding?

Cheers,
peda

^ permalink raw reply

* Re: [PATCH v8 05/12] dt-bindings: iio: io-channel-mux: document io-channel-mux bindings
From: Rob Herring @ 2017-01-27 19:12 UTC (permalink / raw)
  To: Peter Rosin
  Cc: linux-kernel, Wolfram Sang, Mark Rutland, Jonathan Cameron,
	Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
	Jonathan Corbet, Andrew Morton, linux-i2c, devicetree, linux-iio,
	linux-doc
In-Reply-To: <1484755035-25927-6-git-send-email-peda@axentia.se>

On Wed, Jan 18, 2017 at 04:57:08PM +0100, Peter Rosin wrote:
> Describe how a multiplexer can be used to select which signal is fed to
> an io-channel.
> 
> Acked-by: Jonathan Cameron <jic23@kernel.org>
> Signed-off-by: Peter Rosin <peda@axentia.se>
> ---
>  .../bindings/iio/multiplexer/io-channel-mux.txt    | 39 ++++++++++++++++++++++
>  MAINTAINERS                                        |  6 ++++
>  2 files changed, 45 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/iio/multiplexer/io-channel-mux.txt

Acked-by: Rob Herring <robh@kernel.org>

^ permalink raw reply

* Re: [PATCH v8 07/12] dt-bindings: i2c: i2c-mux-simple: document i2c-mux-simple bindings
From: Rob Herring @ 2017-01-27 19:39 UTC (permalink / raw)
  To: Peter Rosin
  Cc: linux-kernel, Wolfram Sang, Mark Rutland, Jonathan Cameron,
	Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
	Jonathan Corbet, Andrew Morton, linux-i2c, devicetree, linux-iio,
	linux-doc
In-Reply-To: <1484755035-25927-8-git-send-email-peda@axentia.se>

On Wed, Jan 18, 2017 at 04:57:10PM +0100, Peter Rosin wrote:
> Describe how a generic multiplexer controller is used to mux an i2c bus.
> 
> Acked-by: Jonathan Cameron <jic23@kernel.org>
> Signed-off-by: Peter Rosin <peda@axentia.se>
> ---
>  .../devicetree/bindings/i2c/i2c-mux-simple.txt     | 81 ++++++++++++++++++++++
>  1 file changed, 81 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/i2c/i2c-mux-simple.txt
> 
> diff --git a/Documentation/devicetree/bindings/i2c/i2c-mux-simple.txt b/Documentation/devicetree/bindings/i2c/i2c-mux-simple.txt
> new file mode 100644
> index 000000000000..253d5027843b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/i2c/i2c-mux-simple.txt
> @@ -0,0 +1,81 @@
> +Simple I2C Bus Mux
> +
> +This binding describes an I2C bus multiplexer that uses a mux controller
> +from the mux subsystem to route the I2C signals.
> +
> +                                  .-----.  .-----.
> +                                  | dev |  | dev |
> +    .------------.                '-----'  '-----'
> +    | SoC        |                   |        |
> +    |            |          .--------+--------'
> +    |   .------. |  .------+    child bus A, on MUX value set to 0
> +    |   | I2C  |-|--| Mux  |
> +    |   '------' |  '--+---+    child bus B, on MUX value set to 1
> +    |   .------. |     |    '----------+--------+--------.
> +    |   | MUX- | |     |               |        |        |
> +    |   | Ctrl |-|-----+            .-----.  .-----.  .-----.
> +    |   '------' |                  | dev |  | dev |  | dev |
> +    '------------'                  '-----'  '-----'  '-----'
> +
> +Required properties:
> +- compatible: i2c-mux-simple,mux-locked or i2c-mux-simple,parent-locked

Not a fan of using "simple" nor the ','. Perhaps lock type should be 
separate property.

I'm not sure I get the mux vs. parent locked fully. How do I determine 
what type I have? We already have bindings for several types of i2c 
muxes. How does the locking annotation fit into those?

Rob

^ permalink raw reply

* Re: [PATCH v8 09/12] dt-bindings: mux-adg792a: document devicetree bindings for ADG792A/G mux
From: Rob Herring @ 2017-01-27 19:50 UTC (permalink / raw)
  To: Peter Rosin
  Cc: linux-kernel, Wolfram Sang, Mark Rutland, Jonathan Cameron,
	Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
	Jonathan Corbet, Andrew Morton, linux-i2c, devicetree, linux-iio,
	linux-doc
In-Reply-To: <1484755035-25927-10-git-send-email-peda@axentia.se>

On Wed, Jan 18, 2017 at 04:57:12PM +0100, Peter Rosin wrote:
> Analog Devices ADG792A/G is a triple 4:1 mux.
> 
> Acked-by: Jonathan Cameron <jic23@kernel.org>
> Signed-off-by: Peter Rosin <peda@axentia.se>
> ---
>  .../devicetree/bindings/mux/mux-adg792a.txt        | 79 ++++++++++++++++++++++
>  1 file changed, 79 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mux/mux-adg792a.txt
> 
> diff --git a/Documentation/devicetree/bindings/mux/mux-adg792a.txt b/Documentation/devicetree/bindings/mux/mux-adg792a.txt
> new file mode 100644
> index 000000000000..0b26dd11f070
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mux/mux-adg792a.txt
> @@ -0,0 +1,79 @@
> +Bindings for Analog Devices ADG792A/G Triple 4:1 Multiplexers
> +
> +Required properties:
> +- compatible : "adi,adg792a" or "adi,adg792g"
> +- #mux-control-cells : <0> if parallel, or <1> if not.
> +* Standard mux-controller bindings as decribed in mux-controller.txt
> +
> +Optional properties for ADG792G:
> +- gpio-controller : if present, #gpio-cells below is required.
> +- #gpio-cells : should be <2>
> +			  - First cell is the GPO line number, i.e. 0 or 1
> +			  - Second cell is used to specify active high (0)
> +			    or active low (1)
> +
> +Optional properties:
> +- adi,parallel : if present, the three muxes are bound together with a single
> +  mux controller, controlling all three muxes in parallel.

Can't this be implied by #mux-control-cells == 0?

> +- adi,idle-state : if present, array of 2-tuples with mux controller number
> +  and state that mux controllers will have when idle. States 0 through 3
> +  correspond to signals A through D in the datasheet.
> +- adi,idle-high-impedance : if present, array of mux controller numbers that
> +  should be in the disconnected high-impedance state when idle.

Perhaps combine these 2 to a common idle-state with the index being the 
mux controller number and a value of -1 (or 4) being hi-Z.

> +
> +Mux controller states 0 through 3 correspond to signals A through D in the
> +datasheet. If a mux controller is mentioned in neither adi,idle-state nor
> +adi,idle-high-impedance it is left in its previously selected state when idle.
> +
> +Example:
> +
> +	/*
> +	 * Three independent mux controllers (of which one is used).
> +	 * Mux 0 is disconnected when idle, mux 1 idles with signal C
> +	 * and mux 2 idles with signal A.
> +	 */
> +	&i2c0 {
> +		mux: adg792a@50 {

mux-controller@50

> +			compatible = "adi,adg792a";
> +			reg = <0x50>;
> +			#mux-control-cells = <1>;
> +
> +			adi,idle-high-impedance = <0>;
> +			adi,idle-state = <1 2>, <2 0>;
> +		};
> +	};
> +
> +	adc-mux {
> +		compatible = "io-channel-mux";
> +		io-channels = <&adc 0>;
> +		io-channel-names = "parent";
> +
> +		mux-controls = <&mux 1>;
> +
> +		channels = "sync-1", "", "out";
> +	};
> +
> +
> +	/*
> +	 * Three parallel muxes with one mux controller, useful e.g. if
> +	 * the adc is differential, thus needing two signals to be muxed
> +	 * simultaneously for correct operation.
> +	 */
> +	&i2c0 {
> +		pmux: adg792a@50 {
> +			compatible = "adi,adg792a";
> +			reg = <0x50>;
> +			#mux-control-cells = <0>;
> +			adi,parallel;
> +		};
> +	};
> +
> +	diff-adc-mux {
> +		compatible = "io-channel-mux";
> +		io-channels = <&adc 0>;
> +		io-channel-names = "parent";
> +
> +		mux-controls = <&pmux>;
> +
> +		channels = "sync-1", "", "out";
> +	};
> -- 
> 2.1.4
> 
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

^ permalink raw reply

* Re: [PATCH v8 09/12] dt-bindings: mux-adg792a: document devicetree bindings for ADG792A/G mux
From: Peter Rosin @ 2017-01-27 22:09 UTC (permalink / raw)
  To: Rob Herring
  Cc: linux-kernel, Wolfram Sang, Mark Rutland, Jonathan Cameron,
	Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
	Jonathan Corbet, Andrew Morton, linux-i2c, devicetree, linux-iio,
	linux-doc
In-Reply-To: <20170127195054.wupmfkiw6kaoc7jx@rob-hp-laptop>

On 2017-01-27 20:50, Rob Herring wrote:
> On Wed, Jan 18, 2017 at 04:57:12PM +0100, Peter Rosin wrote:
>> Analog Devices ADG792A/G is a triple 4:1 mux.
>>
>> Acked-by: Jonathan Cameron <jic23@kernel.org>
>> Signed-off-by: Peter Rosin <peda@axentia.se>
>> ---
>>  .../devicetree/bindings/mux/mux-adg792a.txt        | 79 ++++++++++++++++++++++
>>  1 file changed, 79 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/mux/mux-adg792a.txt
>>
>> diff --git a/Documentation/devicetree/bindings/mux/mux-adg792a.txt b/Documentation/devicetree/bindings/mux/mux-adg792a.txt
>> new file mode 100644
>> index 000000000000..0b26dd11f070
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/mux/mux-adg792a.txt
>> @@ -0,0 +1,79 @@
>> +Bindings for Analog Devices ADG792A/G Triple 4:1 Multiplexers
>> +
>> +Required properties:
>> +- compatible : "adi,adg792a" or "adi,adg792g"
>> +- #mux-control-cells : <0> if parallel, or <1> if not.
>> +* Standard mux-controller bindings as decribed in mux-controller.txt
>> +
>> +Optional properties for ADG792G:
>> +- gpio-controller : if present, #gpio-cells below is required.
>> +- #gpio-cells : should be <2>
>> +			  - First cell is the GPO line number, i.e. 0 or 1
>> +			  - Second cell is used to specify active high (0)
>> +			    or active low (1)
>> +
>> +Optional properties:
>> +- adi,parallel : if present, the three muxes are bound together with a single
>> +  mux controller, controlling all three muxes in parallel.
> 
> Can't this be implied by #mux-control-cells == 0?

Right, good point! I'll drop adi,parallel.

>> +- adi,idle-state : if present, array of 2-tuples with mux controller number
>> +  and state that mux controllers will have when idle. States 0 through 3
>> +  correspond to signals A through D in the datasheet.
>> +- adi,idle-high-impedance : if present, array of mux controller numbers that
>> +  should be in the disconnected high-impedance state when idle.
> 
> Perhaps combine these 2 to a common idle-state with the index being the 
> mux controller number and a value of -1 (or 4) being hi-Z.

At one point [1] I had a straight array for the mux controllers with state 4
being hi-Z and state 5 being the default "leave mux as-is on release", but
Jonathan didn't like magic numbers. Can you please read the follow-ups to the
referenced mail for some background, and then pick out the most suitable color
for me to paint with? :-)

[1] https://lkml.org/lkml/2016/11/30/110

>> +
>> +Mux controller states 0 through 3 correspond to signals A through D in the
>> +datasheet. If a mux controller is mentioned in neither adi,idle-state nor
>> +adi,idle-high-impedance it is left in its previously selected state when idle.
>> +
>> +Example:
>> +
>> +	/*
>> +	 * Three independent mux controllers (of which one is used).
>> +	 * Mux 0 is disconnected when idle, mux 1 idles with signal C
>> +	 * and mux 2 idles with signal A.
>> +	 */
>> +	&i2c0 {
>> +		mux: adg792a@50 {
> 
> mux-controller@50

Yep. Hmm, where have I seen that before? :-)

Cheers,
peda

>> +			compatible = "adi,adg792a";
>> +			reg = <0x50>;
>> +			#mux-control-cells = <1>;
>> +
>> +			adi,idle-high-impedance = <0>;
>> +			adi,idle-state = <1 2>, <2 0>;
>> +		};
>> +	};
>> +
>> +	adc-mux {
>> +		compatible = "io-channel-mux";
>> +		io-channels = <&adc 0>;
>> +		io-channel-names = "parent";
>> +
>> +		mux-controls = <&mux 1>;
>> +
>> +		channels = "sync-1", "", "out";
>> +	};
>> +
>> +
>> +	/*
>> +	 * Three parallel muxes with one mux controller, useful e.g. if
>> +	 * the adc is differential, thus needing two signals to be muxed
>> +	 * simultaneously for correct operation.
>> +	 */
>> +	&i2c0 {
>> +		pmux: adg792a@50 {
>> +			compatible = "adi,adg792a";
>> +			reg = <0x50>;
>> +			#mux-control-cells = <0>;
>> +			adi,parallel;
>> +		};
>> +	};
>> +
>> +	diff-adc-mux {
>> +		compatible = "io-channel-mux";
>> +		io-channels = <&adc 0>;
>> +		io-channel-names = "parent";
>> +
>> +		mux-controls = <&pmux>;
>> +
>> +		channels = "sync-1", "", "out";
>> +	};
>> -- 
>> 2.1.4
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe devicetree" in
>> the body of a message to majordomo@vger.kernel.org
>> More majordomo info at  http://vger.kernel.org/majordomo-info.html

^ permalink raw reply

* Re: [PATCH v2 1/2] dt-bindings: Add Tegra186 BPMP I2C binding
From: Thierry Reding @ 2017-01-27 22:19 UTC (permalink / raw)
  To: Wolfram Sang, Rob Herring
  Cc: Stephen Warren, Alexandre Courbot, Jon Hunter,
	linux-i2c-u79uwXL29TY76Z2rM5mHXA,
	linux-tegra-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20170127083939.20393-2-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

[-- Attachment #1: Type: text/plain, Size: 3072 bytes --]

On Fri, Jan 27, 2017 at 09:39:38AM +0100, Thierry Reding wrote:
> From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> 
> In Tegra186, the BPMP (Boot and Power Management Processor) owns certain
> HW devices, such as the I2C controller for the power management I2C bus.
> Software running on other CPUs must perform IPC to the BPMP in order to
> execute transactions on that I2C bus. This binding describes an I2C bus
> that is accessed in such a fashion.
> 
> Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> Reviewed-by: Simon Glass <sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
> Signed-off-by: Tom Warren <twarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> Acked-by: Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> ---
>  .../bindings/i2c/nvidia,tegra186-bpmp-i2c.txt      | 42 ++++++++++++++++++++++
>  1 file changed, 42 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/i2c/nvidia,tegra186-bpmp-i2c.txt

Rob, sorry for not Cc'ing you earlier on this, but I had thought this
binding had already been reviewed and acked since it is merged in
U-Boot.

Wolfram was concerned in particular about the nvidia,bpmp-bus-id
property below.

Can you give this a quick look, please?

Thanks,
Thierry

> diff --git a/Documentation/devicetree/bindings/i2c/nvidia,tegra186-bpmp-i2c.txt b/Documentation/devicetree/bindings/i2c/nvidia,tegra186-bpmp-i2c.txt
> new file mode 100644
> index 000000000000..ab240e10debc
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/i2c/nvidia,tegra186-bpmp-i2c.txt
> @@ -0,0 +1,42 @@
> +NVIDIA Tegra186 BPMP I2C controller
> +
> +In Tegra186, the BPMP (Boot and Power Management Processor) owns certain HW
> +devices, such as the I2C controller for the power management I2C bus. Software
> +running on other CPUs must perform IPC to the BPMP in order to execute
> +transactions on that I2C bus. This binding describes an I2C bus that is
> +accessed in such a fashion.
> +
> +The BPMP I2C node must be located directly inside the main BPMP node. See
> +../firmware/nvidia,tegra186-bpmp.txt for details of the BPMP binding.
> +
> +This node represents an I2C controller. See ../i2c/i2c.txt for details of the
> +core I2C binding.
> +
> +Required properties:
> +- compatible:
> +    Array of strings.
> +    One of:
> +    - "nvidia,tegra186-bpmp-i2c".
> +- #address-cells: Address cells for I2C device address.
> +    Single-cell integer.
> +    Must be <1>.
> +- #size-cells:
> +    Single-cell integer.
> +    Must be <0>.
> +- nvidia,bpmp-bus-id:
> +    Single-cell integer.
> +    Indicates the I2C bus number this DT node represent, as defined by the
> +    BPMP firmware.
> +
> +Example:
> +
> +bpmp {
> +	...
> +
> +	i2c {
> +		compatible = "nvidia,tegra186-bpmp-i2c";
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		nvidia,bpmp-bus-id = <5>;
> +	};
> +};
> -- 
> 2.11.0
> 

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^ permalink raw reply

* Re: [PATCH v2 1/2] dt-bindings: Add Tegra186 BPMP I2C binding
From: Rob Herring @ 2017-01-27 22:52 UTC (permalink / raw)
  To: Thierry Reding
  Cc: Wolfram Sang, Stephen Warren, Alexandre Courbot, Jon Hunter,
	linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
In-Reply-To: <20170127221857.GA15715-+E7KM1FDEuO2P7RxrfNFTMXXUOn6P5/W@public.gmane.org>

On Fri, Jan 27, 2017 at 4:19 PM, Thierry Reding
<thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> On Fri, Jan 27, 2017 at 09:39:38AM +0100, Thierry Reding wrote:
>> From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>>
>> In Tegra186, the BPMP (Boot and Power Management Processor) owns certain
>> HW devices, such as the I2C controller for the power management I2C bus.
>> Software running on other CPUs must perform IPC to the BPMP in order to
>> execute transactions on that I2C bus. This binding describes an I2C bus
>> that is accessed in such a fashion.
>>
>> Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>> Reviewed-by: Simon Glass <sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
>> Signed-off-by: Tom Warren <twarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>> Acked-by: Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>> Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>> ---
>>  .../bindings/i2c/nvidia,tegra186-bpmp-i2c.txt      | 42 ++++++++++++++++++++++
>>  1 file changed, 42 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/i2c/nvidia,tegra186-bpmp-i2c.txt
>
> Rob, sorry for not Cc'ing you earlier on this, but I had thought this
> binding had already been reviewed and acked since it is merged in
> U-Boot.

Ha! Good one. :(

>
> Wolfram was concerned in particular about the nvidia,bpmp-bus-id
> property below.
>
> Can you give this a quick look, please?
>
> Thanks,
> Thierry
>
>> diff --git a/Documentation/devicetree/bindings/i2c/nvidia,tegra186-bpmp-i2c.txt b/Documentation/devicetree/bindings/i2c/nvidia,tegra186-bpmp-i2c.txt
>> new file mode 100644
>> index 000000000000..ab240e10debc
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/i2c/nvidia,tegra186-bpmp-i2c.txt
>> @@ -0,0 +1,42 @@
>> +NVIDIA Tegra186 BPMP I2C controller
>> +
>> +In Tegra186, the BPMP (Boot and Power Management Processor) owns certain HW
>> +devices, such as the I2C controller for the power management I2C bus. Software
>> +running on other CPUs must perform IPC to the BPMP in order to execute
>> +transactions on that I2C bus. This binding describes an I2C bus that is
>> +accessed in such a fashion.
>> +
>> +The BPMP I2C node must be located directly inside the main BPMP node. See
>> +../firmware/nvidia,tegra186-bpmp.txt for details of the BPMP binding.
>> +
>> +This node represents an I2C controller. See ../i2c/i2c.txt for details of the
>> +core I2C binding.
>> +
>> +Required properties:
>> +- compatible:
>> +    Array of strings.
>> +    One of:
>> +    - "nvidia,tegra186-bpmp-i2c".
>> +- #address-cells: Address cells for I2C device address.
>> +    Single-cell integer.
>> +    Must be <1>.
>> +- #size-cells:
>> +    Single-cell integer.
>> +    Must be <0>.
>> +- nvidia,bpmp-bus-id:
>> +    Single-cell integer.
>> +    Indicates the I2C bus number this DT node represent, as defined by the
>> +    BPMP firmware.

This seems okay to me given it's a pretty specific use and dictated by
the firmware. If there were multiple, then perhaps we should use reg,
but that may collide with other BPMP child nodes.

Rob

^ permalink raw reply

* Re: [PATCH v2 1/2] dt-bindings: Add Tegra186 BPMP I2C binding
From: Stephen Warren @ 2017-01-28  5:42 UTC (permalink / raw)
  To: Thierry Reding
  Cc: Wolfram Sang, Rob Herring, Alexandre Courbot, Jon Hunter,
	linux-i2c, linux-tegra
In-Reply-To: <20170127221857.GA15715@mithrandir.ba.sec>

On 01/27/2017 03:19 PM, Thierry Reding wrote:
> On Fri, Jan 27, 2017 at 09:39:38AM +0100, Thierry Reding wrote:
>> From: Stephen Warren <swarren@nvidia.com>
>>
>> In Tegra186, the BPMP (Boot and Power Management Processor) owns certain
>> HW devices, such as the I2C controller for the power management I2C bus.
>> Software running on other CPUs must perform IPC to the BPMP in order to
>> execute transactions on that I2C bus. This binding describes an I2C bus
>> that is accessed in such a fashion.
>>
>> Signed-off-by: Stephen Warren <swarren@nvidia.com>
>> Reviewed-by: Simon Glass <sjg@chromium.org>
>> Signed-off-by: Tom Warren <twarren@nvidia.com>
>> Acked-by: Jon Hunter <jonathanh@nvidia.com>
>> Signed-off-by: Thierry Reding <treding@nvidia.com>
>> ---
>>  .../bindings/i2c/nvidia,tegra186-bpmp-i2c.txt      | 42 ++++++++++++++++++++++
>>  1 file changed, 42 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/i2c/nvidia,tegra186-bpmp-i2c.txt
>
> Rob, sorry for not Cc'ing you earlier on this, but I had thought this
> binding had already been reviewed and acked since it is merged in
> U-Boot.

I'm pretty sure all the DT binding patches for Tegra186 that I submitted 
were ack'd by Rob. They were certainly all posted to relevant Linux 
lists and discussed and ack'd by someone before I pushed them into 
U-Boot. Probably 2nd quarter last year, or maybe 3rd.

^ permalink raw reply

* Re: [PATCH] i2c: piix4: Fix request_region size
From: Jean Delvare @ 2017-01-28  8:36 UTC (permalink / raw)
  To: Ricardo Ribalda Delgado, Andy Shevchenko, Wolfram Sang, linux-i2c,
	linux-kernel
In-Reply-To: <20170127145930.13055-1-ricardo.ribalda@gmail.com>

Hi Ricardo,

On ven., 2017-01-27 at 15:59 +0100, Ricardo Ribalda Delgado wrote:
> Since '701dc207bf55 ("i2c: piix4: Avoid race conditions with IMC")'
> we
> are using the SMBSLVCNT register at offset 0x8. We need to request
> it.
> 
> Fixes: 701dc207bf55 ("i2c: piix4: Avoid race conditions with IMC")
> Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
> ---
> Please note, not tested on hardware.
>  drivers/i2c/busses/i2c-piix4.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-
> piix4.c
> index e34d82e79b98..73cc6799cc59 100644
> --- a/drivers/i2c/busses/i2c-piix4.c
> +++ b/drivers/i2c/busses/i2c-piix4.c
> @@ -58,7 +58,7 @@
>  #define SMBSLVDAT	(0xC + piix4_smba)
>  
>  /* count for request_region */
> -#define SMBIOSIZE	8
> +#define SMBIOSIZE	9
> 

Are you certain that all supported devices have this extra register?

>  
>  /* PCI Address Constants */
>  #define SMBBA		0x090

-- 
Jean Delvare
SUSE L3 Support

^ permalink raw reply

* Re: [PATCH] i2c: piix4: Fix request_region size
From: Wolfram Sang @ 2017-01-28 11:00 UTC (permalink / raw)
  To: Jean Delvare
  Cc: Ricardo Ribalda Delgado, Andy Shevchenko, linux-i2c, linux-kernel
In-Reply-To: <1485592582.4916.1.camel@suse.de>

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> >  /* count for request_region */
> > -#define SMBIOSIZE	8
> > +#define SMBIOSIZE	9
> > 
> 
> Are you certain that all supported devices have this extra register?

Isn't it better to have a potentially unused register mapped than a
potentially used register unmapped?


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^ permalink raw reply

* Re: [PATCH] i2c: piix4: Fix request_region size
From: Jean Delvare @ 2017-01-28 11:13 UTC (permalink / raw)
  To: Wolfram Sang
  Cc: Ricardo Ribalda Delgado, Andy Shevchenko, linux-i2c, linux-kernel
In-Reply-To: <20170128110021.GA1604@katana>

Hi Wolfram,

On Sat, 28 Jan 2017 12:00:21 +0100, Wolfram Sang wrote:
> 
> > >  /* count for request_region */
> > > -#define SMBIOSIZE	8
> > > +#define SMBIOSIZE	9
> > 
> > Are you certain that all supported devices have this extra register?
> 
> Isn't it better to have a potentially unused register mapped than a
> potentially used register unmapped?

My concern is that the region request could fail due to a conflict with
another device, if the physical I/O region is only 8 and we try to
request 9.

-- 
Jean Delvare
SUSE L3 Support

^ permalink raw reply

* Re: [PATCH v8 09/12] dt-bindings: mux-adg792a: document devicetree bindings for ADG792A/G mux
From: Jonathan Cameron @ 2017-01-28 11:40 UTC (permalink / raw)
  To: Peter Rosin, Rob Herring
  Cc: linux-kernel, Wolfram Sang, Mark Rutland, Hartmut Knaack,
	Lars-Peter Clausen, Peter Meerwald-Stadler, Jonathan Corbet,
	Andrew Morton, linux-i2c, devicetree, linux-iio, linux-doc
In-Reply-To: <383638ef-1bb2-224f-0fd0-4818395a2306@axentia.se>

On 27/01/17 22:09, Peter Rosin wrote:
> On 2017-01-27 20:50, Rob Herring wrote:
>> On Wed, Jan 18, 2017 at 04:57:12PM +0100, Peter Rosin wrote:
>>> Analog Devices ADG792A/G is a triple 4:1 mux.
>>>
>>> Acked-by: Jonathan Cameron <jic23@kernel.org>
>>> Signed-off-by: Peter Rosin <peda@axentia.se>
>>> ---
>>>  .../devicetree/bindings/mux/mux-adg792a.txt        | 79 ++++++++++++++++++++++
>>>  1 file changed, 79 insertions(+)
>>>  create mode 100644 Documentation/devicetree/bindings/mux/mux-adg792a.txt
>>>
>>> diff --git a/Documentation/devicetree/bindings/mux/mux-adg792a.txt b/Documentation/devicetree/bindings/mux/mux-adg792a.txt
>>> new file mode 100644
>>> index 000000000000..0b26dd11f070
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/mux/mux-adg792a.txt
>>> @@ -0,0 +1,79 @@
>>> +Bindings for Analog Devices ADG792A/G Triple 4:1 Multiplexers
>>> +
>>> +Required properties:
>>> +- compatible : "adi,adg792a" or "adi,adg792g"
>>> +- #mux-control-cells : <0> if parallel, or <1> if not.
>>> +* Standard mux-controller bindings as decribed in mux-controller.txt
>>> +
>>> +Optional properties for ADG792G:
>>> +- gpio-controller : if present, #gpio-cells below is required.
>>> +- #gpio-cells : should be <2>
>>> +			  - First cell is the GPO line number, i.e. 0 or 1
>>> +			  - Second cell is used to specify active high (0)
>>> +			    or active low (1)
>>> +
>>> +Optional properties:
>>> +- adi,parallel : if present, the three muxes are bound together with a single
>>> +  mux controller, controlling all three muxes in parallel.
>>
>> Can't this be implied by #mux-control-cells == 0?
> 
> Right, good point! I'll drop adi,parallel.
> 
>>> +- adi,idle-state : if present, array of 2-tuples with mux controller number
>>> +  and state that mux controllers will have when idle. States 0 through 3
>>> +  correspond to signals A through D in the datasheet.
>>> +- adi,idle-high-impedance : if present, array of mux controller numbers that
>>> +  should be in the disconnected high-impedance state when idle.
>>
>> Perhaps combine these 2 to a common idle-state with the index being the 
>> mux controller number and a value of -1 (or 4) being hi-Z.
> 
> At one point [1] I had a straight array for the mux controllers with state 4
> being hi-Z and state 5 being the default "leave mux as-is on release", but
> Jonathan didn't like magic numbers. Can you please read the follow-ups to the
> referenced mail for some background, and then pick out the most suitable color
> for me to paint with? :-)
Hohum.  Given it can be cleanly represented as two properties rather than a single
property with a single magic value alongside the obvious ones I asked Peter
to split it.

Not all that fussed though as I don't have to maintain this ;)
*ducks*

Jonathan
> 
> [1] https://lkml.org/lkml/2016/11/30/110
> 
>>> +
>>> +Mux controller states 0 through 3 correspond to signals A through D in the
>>> +datasheet. If a mux controller is mentioned in neither adi,idle-state nor
>>> +adi,idle-high-impedance it is left in its previously selected state when idle.
>>> +
>>> +Example:
>>> +
>>> +	/*
>>> +	 * Three independent mux controllers (of which one is used).
>>> +	 * Mux 0 is disconnected when idle, mux 1 idles with signal C
>>> +	 * and mux 2 idles with signal A.
>>> +	 */
>>> +	&i2c0 {
>>> +		mux: adg792a@50 {
>>
>> mux-controller@50
> 
> Yep. Hmm, where have I seen that before? :-)
> 
> Cheers,
> peda
> 
>>> +			compatible = "adi,adg792a";
>>> +			reg = <0x50>;
>>> +			#mux-control-cells = <1>;
>>> +
>>> +			adi,idle-high-impedance = <0>;
>>> +			adi,idle-state = <1 2>, <2 0>;
>>> +		};
>>> +	};
>>> +
>>> +	adc-mux {
>>> +		compatible = "io-channel-mux";
>>> +		io-channels = <&adc 0>;
>>> +		io-channel-names = "parent";
>>> +
>>> +		mux-controls = <&mux 1>;
>>> +
>>> +		channels = "sync-1", "", "out";
>>> +	};
>>> +
>>> +
>>> +	/*
>>> +	 * Three parallel muxes with one mux controller, useful e.g. if
>>> +	 * the adc is differential, thus needing two signals to be muxed
>>> +	 * simultaneously for correct operation.
>>> +	 */
>>> +	&i2c0 {
>>> +		pmux: adg792a@50 {
>>> +			compatible = "adi,adg792a";
>>> +			reg = <0x50>;
>>> +			#mux-control-cells = <0>;
>>> +			adi,parallel;
>>> +		};
>>> +	};
>>> +
>>> +	diff-adc-mux {
>>> +		compatible = "io-channel-mux";
>>> +		io-channels = <&adc 0>;
>>> +		io-channel-names = "parent";
>>> +
>>> +		mux-controls = <&pmux>;
>>> +
>>> +		channels = "sync-1", "", "out";
>>> +	};
>>> -- 
>>> 2.1.4
>>>
>>> --
>>> To unsubscribe from this list: send the line "unsubscribe devicetree" in
>>> the body of a message to majordomo@vger.kernel.org
>>> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 

^ permalink raw reply

* Re: [PATCH v2 11/13] drm/i915: Add intel_uncore_suspend / resume functions
From: Hans de Goede @ 2017-01-28 16:05 UTC (permalink / raw)
  To: Ville Syrjälä
  Cc: Wolfram Sang, russianneuromancer @ ya . ru, intel-gfx, linux-i2c,
	Jarkko Nikula, dri-devel, H . Peter Anvin, Daniel Vetter,
	Thomas Gleixner, Andy Shevchenko, Mika Westerberg, Len Brown
In-Reply-To: <20170127134516.GR31595@intel.com>

Hi,

On 01/27/2017 02:45 PM, Ville Syrjälä wrote:
> On Mon, Jan 23, 2017 at 10:09:56PM +0100, Hans de Goede wrote:
>> Rename intel_uncore_early_sanitize to intel_uncore_resume, dropping the
>> (always true) restore_forcewake argument and add a new intel_uncore_resume
>> function to replace the intel_uncore_forcewake_reset(dev_priv, false)
>> calls done from the suspend / runtime_suspend functions and make
>> intel_uncore_forcewake_reset private.
>>
>> This is a preparation patch for adding PMIC bus access notifier support.
>>
>> BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=155241
>> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
>> Tested-by: tagorereddy <tagore.chandan@gmail.com>
>> ---
>> Changes in v2:
>> -Spelling: P-Unit, PMIC
>> ---
>>  drivers/gpu/drm/i915/i915_drv.c     |  6 +++---
>>  drivers/gpu/drm/i915/i915_drv.h     |  6 ++----
>>  drivers/gpu/drm/i915/intel_uncore.c | 18 +++++++++++-------
>>  3 files changed, 16 insertions(+), 14 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
>> index aefab9a..5a62d7a 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.c
>> +++ b/drivers/gpu/drm/i915/i915_drv.c
>> @@ -1445,7 +1445,7 @@ static int i915_drm_suspend(struct drm_device *dev)
>>  	opregion_target_state = suspend_to_idle(dev_priv) ? PCI_D1 : PCI_D3cold;
>>  	intel_opregion_notify_adapter(dev_priv, opregion_target_state);
>>
>> -	intel_uncore_forcewake_reset(dev_priv, false);
>> +	intel_uncore_suspend(dev_priv);
>>  	intel_opregion_unregister(dev_priv);
>>
>>  	intel_fbdev_set_suspend(dev, FBINFO_STATE_SUSPENDED, true);
>> @@ -1690,7 +1690,7 @@ static int i915_drm_resume_early(struct drm_device *dev)
>>  		DRM_ERROR("Resume prepare failed: %d, continuing anyway\n",
>>  			  ret);
>>
>> -	intel_uncore_early_sanitize(dev_priv, true);
>> +	intel_uncore_resume(dev_priv);
>>
>>  	if (IS_GEN9_LP(dev_priv)) {
>>  		if (!dev_priv->suspended_to_idle)
>> @@ -2344,7 +2344,7 @@ static int intel_runtime_suspend(struct device *kdev)
>>  		return ret;
>>  	}
>>
>> -	intel_uncore_forcewake_reset(dev_priv, false);
>> +	intel_uncore_suspend(dev_priv);
>
> Doing one from early_resume and the other from the normal suspend makes
> my brain hurt a little.

Ack, note that this patch does not introduce this, it just renames things
a bit, the sequence of things is not changed.

> If we do that I think we should at least name
> the functions appropriately.

Ok, so you want me to rename intel_uncore_resume to intel_uncore_resume_early
I assume ?

>>
>>  	enable_rpm_wakeref_asserts(dev_priv);
>>  	WARN_ON_ONCE(atomic_read(&dev_priv->pm.wakeref_count));
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>> index e9b4ece..c717329 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -2976,14 +2976,12 @@ int intel_irq_install(struct drm_i915_private *dev_priv);
>>  void intel_irq_uninstall(struct drm_i915_private *dev_priv);
>>
>>  extern void intel_uncore_sanitize(struct drm_i915_private *dev_priv);
>> -extern void intel_uncore_early_sanitize(struct drm_i915_private *dev_priv,
>> -					bool restore_forcewake);
>>  extern void intel_uncore_init(struct drm_i915_private *dev_priv);
>>  extern bool intel_uncore_unclaimed_mmio(struct drm_i915_private *dev_priv);
>>  extern bool intel_uncore_arm_unclaimed_mmio_detection(struct drm_i915_private *dev_priv);
>>  extern void intel_uncore_fini(struct drm_i915_private *dev_priv);
>> -extern void intel_uncore_forcewake_reset(struct drm_i915_private *dev_priv,
>> -					 bool restore);
>> +extern void intel_uncore_suspend(struct drm_i915_private *dev_priv);
>> +extern void intel_uncore_resume(struct drm_i915_private *dev_priv);
>>  const char *intel_uncore_forcewake_domain_to_str(const enum forcewake_domain_id id);
>>  void intel_uncore_forcewake_get(struct drm_i915_private *dev_priv,
>>  				enum forcewake_domains domains);
>> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
>> index abe0888..3767307 100644
>> --- a/drivers/gpu/drm/i915/intel_uncore.c
>> +++ b/drivers/gpu/drm/i915/intel_uncore.c
>> @@ -250,7 +250,7 @@ intel_uncore_fw_release_timer(struct hrtimer *timer)
>>  	return HRTIMER_NORESTART;
>>  }
>>
>> -void intel_uncore_forcewake_reset(struct drm_i915_private *dev_priv,
>> +static void __intel_uncore_forcewake_reset(struct drm_i915_private *dev_priv,
>>  				  bool restore)
>
> Maybe leave out this rename to keep the diff a little easier to parse.

Ack will do for v3.

>
>>  {
>>  	unsigned long irqflags;
>> @@ -424,13 +424,17 @@ static void __intel_uncore_early_sanitize(struct drm_i915_private *dev_priv,
>>  	if (IS_BXT_REVID(dev_priv, 0, BXT_REVID_B_LAST))
>>  		info->has_decoupled_mmio = false;
>>
>> -	intel_uncore_forcewake_reset(dev_priv, restore_forcewake);
>> +	__intel_uncore_forcewake_reset(dev_priv, restore_forcewake);
>>  }
>>
>> -void intel_uncore_early_sanitize(struct drm_i915_private *dev_priv,
>> -				 bool restore_forcewake)
>> +void intel_uncore_suspend(struct drm_i915_private *dev_priv)
>>  {
>> -	__intel_uncore_early_sanitize(dev_priv, restore_forcewake);
>> +	__intel_uncore_forcewake_reset(dev_priv, false);
>> +}
>> +
>> +void intel_uncore_resume(struct drm_i915_private *dev_priv)
>> +{
>> +	__intel_uncore_early_sanitize(dev_priv, true);
>>  	i915_check_and_clear_faults(dev_priv);
>>  }
>>
>> @@ -1463,7 +1467,7 @@ void intel_uncore_fini(struct drm_i915_private *dev_priv)
>>  {
>>  	/* Paranoia: make sure we have disabled everything before we exit. */
>>  	intel_uncore_sanitize(dev_priv);
>> -	intel_uncore_forcewake_reset(dev_priv, false);
>> +	__intel_uncore_forcewake_reset(dev_priv, false);
>>  }
>>
>>  #define GEN_RANGE(l, h) GENMASK((h) - 1, (l) - 1)
>> @@ -1679,7 +1683,7 @@ static int gen6_reset_engines(struct drm_i915_private *dev_priv,
>>
>>  	ret = gen6_hw_domain_reset(dev_priv, hw_mask);
>>
>> -	intel_uncore_forcewake_reset(dev_priv, true);
>> +	__intel_uncore_forcewake_reset(dev_priv, true);
>>
>>  	return ret;
>>  }
>> --
>> 2.9.3
>

Regards,

Hans
_______________________________________________
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^ permalink raw reply

* Re: [PATCH v2 13/13] drm/i915: Acquire P-Unit access when modifying P-Unit settings
From: Hans de Goede @ 2017-01-28 16:25 UTC (permalink / raw)
  To: Ville Syrjälä
  Cc: Wolfram Sang, Takashi Iwai, russianneuromancer @ ya . ru,
	intel-gfx, linux-i2c, Jarkko Nikula, dri-devel, H . Peter Anvin,
	Daniel Vetter, Thomas Gleixner, Andy Shevchenko, Mika Westerberg,
	Len Brown
In-Reply-To: <20170127135147.GS31595@intel.com>

Hi,

On 01/27/2017 02:51 PM, Ville Syrjälä wrote:
> On Mon, Jan 23, 2017 at 10:09:58PM +0100, Hans de Goede wrote:
>> Make sure the P-Unit or the PMIC i2c bus is not in use when we send a
>> request to the P-Unit by calling iosf_mbi_punit_acquire() / _release()
>> around P-Unit write accesses.
>
> Can't we just stuff the calls into the actual punit write function
> rather than sprinkling them all over the place?

punit access is acquired across sections like this:

         iosf_mbi_punit_acquire();

         val = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ);
         val &= ~DSPFREQGUAR_MASK;
         val |= (cmd << DSPFREQGUAR_SHIFT);
         vlv_punit_write(dev_priv, PUNIT_REG_DSPFREQ, val);
         if (wait_for((vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ) &
                       DSPFREQSTAT_MASK) == (cmd << DSPFREQSTAT_SHIFT),
                      50)) {
                 DRM_ERROR("timed out waiting for CDclk change\n");
         }
         iosf_mbi_punit_release();

Where we want to wait for the requested change to have taken
effect before releasing the punit.

>
> + a comment would be nice why it's there.

I will add comments to the acquire calls.

> Do we need a kconfig select/depends on the iosf_mbi thing? Or some
> ifdefs?

No, the iosf_mbi header defines empty inline versions of
iosf_mbi_punit_acquire / _release if IOSF_MBI is disabled,
this does mean that iosf_mbi must be builtin if the i915
driver is. I'll add:

	depends on DRM_I915=IOSF_MBI || IOSF_MBI=y

To the i915 Kconfig to enforce this.

Regards,

Hans


>
>>
>> BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=155241
>> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
>> Tested-by: tagorereddy <tagore.chandan@gmail.com>
>> ---
>> Changes in v2:
>> -Spelling: P-Unit, PMIC
>> -Adjust for iosf_mbi_punit_lock/_unlock to _acquire/_release rename
>> ---
>>  drivers/gpu/drm/i915/intel_display.c    | 6 ++++++
>>  drivers/gpu/drm/i915/intel_pm.c         | 9 +++++++++
>>  drivers/gpu/drm/i915/intel_runtime_pm.c | 9 +++++++++
>>  3 files changed, 24 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>> index 5604701..13e5152 100644
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -47,6 +47,7 @@
>>  #include <drm/drm_rect.h>
>>  #include <linux/dma_remapping.h>
>>  #include <linux/reservation.h>
>> +#include <asm/iosf_mbi.h>
>>
>>  static bool is_mmio_work(struct intel_flip_work *work)
>>  {
>> @@ -6421,6 +6422,8 @@ static void valleyview_set_cdclk(struct drm_device *dev, int cdclk)
>>  		cmd = 0;
>>
>>  	mutex_lock(&dev_priv->rps.hw_lock);
>> +	iosf_mbi_punit_acquire();
>> +
>>  	val = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ);
>>  	val &= ~DSPFREQGUAR_MASK;
>>  	val |= (cmd << DSPFREQGUAR_SHIFT);
>> @@ -6430,6 +6433,7 @@ static void valleyview_set_cdclk(struct drm_device *dev, int cdclk)
>>  		     50)) {
>>  		DRM_ERROR("timed out waiting for CDclk change\n");
>>  	}
>> +	iosf_mbi_punit_release();
>>  	mutex_unlock(&dev_priv->rps.hw_lock);
>>
>>  	mutex_lock(&dev_priv->sb_lock);
>> @@ -6497,6 +6501,7 @@ static void cherryview_set_cdclk(struct drm_device *dev, int cdclk)
>>  	cmd = DIV_ROUND_CLOSEST(dev_priv->hpll_freq << 1, cdclk) - 1;
>>
>>  	mutex_lock(&dev_priv->rps.hw_lock);
>> +	iosf_mbi_punit_acquire();
>>  	val = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ);
>>  	val &= ~DSPFREQGUAR_MASK_CHV;
>>  	val |= (cmd << DSPFREQGUAR_SHIFT_CHV);
>> @@ -6506,6 +6511,7 @@ static void cherryview_set_cdclk(struct drm_device *dev, int cdclk)
>>  		     50)) {
>>  		DRM_ERROR("timed out waiting for CDclk change\n");
>>  	}
>> +	iosf_mbi_punit_release();
>>  	mutex_unlock(&dev_priv->rps.hw_lock);
>>
>>  	intel_update_cdclk(dev_priv);
>> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
>> index 249623d..adff84a 100644
>> --- a/drivers/gpu/drm/i915/intel_pm.c
>> +++ b/drivers/gpu/drm/i915/intel_pm.c
>> @@ -32,6 +32,7 @@
>>  #include "../../../platform/x86/intel_ips.h"
>>  #include <linux/module.h>
>>  #include <drm/drm_atomic_helper.h>
>> +#include <asm/iosf_mbi.h>
>>
>>  /**
>>   * DOC: RC6
>> @@ -276,6 +277,7 @@ static void chv_set_memory_dvfs(struct drm_i915_private *dev_priv, bool enable)
>>  	u32 val;
>>
>>  	mutex_lock(&dev_priv->rps.hw_lock);
>> +	iosf_mbi_punit_acquire();
>>
>>  	val = vlv_punit_read(dev_priv, PUNIT_REG_DDR_SETUP2);
>>  	if (enable)
>> @@ -290,6 +292,7 @@ static void chv_set_memory_dvfs(struct drm_i915_private *dev_priv, bool enable)
>>  		      FORCE_DDR_FREQ_REQ_ACK) == 0, 3))
>>  		DRM_ERROR("timed out waiting for Punit DDR DVFS request\n");
>>
>> +	iosf_mbi_punit_release();
>>  	mutex_unlock(&dev_priv->rps.hw_lock);
>>  }
>>
>> @@ -298,6 +301,7 @@ static void chv_set_memory_pm5(struct drm_i915_private *dev_priv, bool enable)
>>  	u32 val;
>>
>>  	mutex_lock(&dev_priv->rps.hw_lock);
>> +	iosf_mbi_punit_acquire();
>>
>>  	val = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ);
>>  	if (enable)
>> @@ -306,6 +310,7 @@ static void chv_set_memory_pm5(struct drm_i915_private *dev_priv, bool enable)
>>  		val &= ~DSP_MAXFIFO_PM5_ENABLE;
>>  	vlv_punit_write(dev_priv, PUNIT_REG_DSPFREQ, val);
>>
>> +	iosf_mbi_punit_release();
>>  	mutex_unlock(&dev_priv->rps.hw_lock);
>>  }
>>
>> @@ -4553,6 +4558,7 @@ void vlv_wm_get_hw_state(struct drm_device *dev)
>>
>>  	if (IS_CHERRYVIEW(dev_priv)) {
>>  		mutex_lock(&dev_priv->rps.hw_lock);
>> +		iosf_mbi_punit_acquire();
>>
>>  		val = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ);
>>  		if (val & DSP_MAXFIFO_PM5_ENABLE)
>> @@ -4582,6 +4588,7 @@ void vlv_wm_get_hw_state(struct drm_device *dev)
>>  				wm->level = VLV_WM_LEVEL_DDR_DVFS;
>>  		}
>>
>> +		iosf_mbi_punit_release();
>>  		mutex_unlock(&dev_priv->rps.hw_lock);
>>  	}
>>
>> @@ -4988,7 +4995,9 @@ static void valleyview_set_rps(struct drm_i915_private *dev_priv, u8 val)
>>  	I915_WRITE(GEN6_PMINTRMSK, gen6_rps_pm_mask(dev_priv, val));
>>
>>  	if (val != dev_priv->rps.cur_freq) {
>> +		iosf_mbi_punit_acquire();
>>  		vlv_punit_write(dev_priv, PUNIT_REG_GPU_FREQ_REQ, val);
>> +		iosf_mbi_punit_release();
>>  		if (!IS_CHERRYVIEW(dev_priv))
>>  			gen6_set_rps_thresholds(dev_priv, val);
>>  	}
>> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
>> index c0b7e95..e66bcc8 100644
>> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
>> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
>> @@ -28,6 +28,7 @@
>>
>>  #include <linux/pm_runtime.h>
>>  #include <linux/vgaarb.h>
>> +#include <asm/iosf_mbi.h>
>>
>>  #include "i915_drv.h"
>>  #include "intel_drv.h"
>> @@ -1027,6 +1028,8 @@ static void vlv_set_power_well(struct drm_i915_private *dev_priv,
>>  	if (COND)
>>  		goto out;
>>
>> +	iosf_mbi_punit_acquire();
>> +
>>  	ctrl = vlv_punit_read(dev_priv, PUNIT_REG_PWRGT_CTRL);
>>  	ctrl &= ~mask;
>>  	ctrl |= state;
>> @@ -1037,6 +1040,8 @@ static void vlv_set_power_well(struct drm_i915_private *dev_priv,
>>  			  state,
>>  			  vlv_punit_read(dev_priv, PUNIT_REG_PWRGT_CTRL));
>>
>> +	iosf_mbi_punit_release();
>> +
>>  #undef COND
>>
>>  out:
>> @@ -1643,6 +1648,8 @@ static void chv_set_pipe_power_well(struct drm_i915_private *dev_priv,
>>  	if (COND)
>>  		goto out;
>>
>> +	iosf_mbi_punit_acquire();
>> +
>>  	ctrl = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ);
>>  	ctrl &= ~DP_SSC_MASK(pipe);
>>  	ctrl |= enable ? DP_SSC_PWR_ON(pipe) : DP_SSC_PWR_GATE(pipe);
>> @@ -1653,6 +1660,8 @@ static void chv_set_pipe_power_well(struct drm_i915_private *dev_priv,
>>  			  state,
>>  			  vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ));
>>
>> +	iosf_mbi_punit_release();
>> +
>>  #undef COND
>>
>>  out:
>> --
>> 2.9.3
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply

* Re: [PATCH v4 1/3] iio: distance: srf08: add trivial DT binding
From: Jonathan Cameron @ 2017-01-28 16:39 UTC (permalink / raw)
  To: Andreas Klinger, knaack.h-Mmb7MZpHnFY,
	lars-Qo5EllUWu/uELgA04lAiVw, pmeerw-jW+XmwGofnusTnJN9+BGXg,
	linux-iio-u79uwXL29TY76Z2rM5mHXA,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA, ktsai-GubuWUlQtMwciDkP5Hr2oA,
	wsa-z923LK4zBo2bacvFa/9K2g, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
	pawel.moll-5wv7dgnIgG8, mark.rutland-5wv7dgnIgG8,
	ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg,
	galak-sgV2jX0FEOL9JmXXK+q4OQ, trivial-DgEjT+Ai2ygdnm+yROfE0A,
	mranostay-Re5JQEeQqe8AvxtiuMwx3w,
	linux-i2c-u79uwXL29TY76Z2rM5mHXA,
	devicetree-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20170125190648.GA9260@andreas>

On 25/01/17 19:06, Andreas Klinger wrote:
>  - Add DT binding for devantech,srf08
>  - Add vendor devantech to vendor list
> 
> Signed-off-by: Andreas Klinger <ak-n176/SwNRljddJNmlsFzeA@public.gmane.org>
> Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Applied to the togreg branch of iio.git.  Will be first
pushed out as testing for the autobuilders to play with it.

Thanks,

Jonathan
> ---
>  Documentation/devicetree/bindings/i2c/trivial-devices.txt | 1 +
>  Documentation/devicetree/bindings/vendor-prefixes.txt     | 1 +
>  2 files changed, 2 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/i2c/trivial-devices.txt b/Documentation/devicetree/bindings/i2c/trivial-devices.txt
> index 539874490492..86c6930c3c91 100644
> --- a/Documentation/devicetree/bindings/i2c/trivial-devices.txt
> +++ b/Documentation/devicetree/bindings/i2c/trivial-devices.txt
> @@ -36,6 +36,7 @@ dallas,ds1775		Tiny Digital Thermometer and Thermostat
>  dallas,ds3232		Extremely Accurate I²C RTC with Integrated Crystal and SRAM
>  dallas,ds4510		CPU Supervisor with Nonvolatile Memory and Programmable I/O
>  dallas,ds75		Digital Thermometer and Thermostat
> +devantech,srf08		Devantech SRF08 ultrasonic ranger
>  dlg,da9053		DA9053: flexible system level PMIC with multicore support
>  dlg,da9063		DA9063: system PMIC for quad-core application processors
>  epson,rx8010		I2C-BUS INTERFACE REAL TIME CLOCK MODULE
> diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
> index 4696bb5c2198..80325e602403 100644
> --- a/Documentation/devicetree/bindings/vendor-prefixes.txt
> +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
> @@ -65,6 +65,7 @@ dallas	Maxim Integrated Products (formerly Dallas Semiconductor)
>  davicom	DAVICOM Semiconductor, Inc.
>  delta	Delta Electronics, Inc.
>  denx	Denx Software Engineering
> +devantech	Devantech, Ltd.
>  digi	Digi International Inc.
>  digilent	Diglent, Inc.
>  dlg	Dialog Semiconductor
> 

^ permalink raw reply

* Re: [PATCH v4 2/3] iio: distance: srf08: add IIO driver for us ranger
From: Jonathan Cameron @ 2017-01-28 16:39 UTC (permalink / raw)
  To: Andreas Klinger, knaack.h, lars, pmeerw, linux-iio, linux-kernel,
	ktsai, wsa, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
	galak, trivial, mranostay, linux-i2c, devicetree
In-Reply-To: <20170125190719.GA9274@andreas>

On 25/01/17 19:07, Andreas Klinger wrote:
> This is the IIO driver for devantech srf08 ultrasonic ranger which can be
> used to measure the distances to an object.
> 
> The sensor supports I2C with some registers.
> 
> Supported Features include:
>  - read the distance in ranging mode in centimeters
>  - output of the driver is directly the read value
>  - together with the scale the driver delivers the distance in meters
>  - only the first echo of the nearest object is delivered
>  - set sensitivity as analog value in the range of 0-31  means setting
>    gain register on device
>  - set range registers; userspace enters max. range in millimeters in
>    43 mm steps
> 
> Features not supported by this driver:
>  - ranging mode in inches or in microseconds
>  - ANN mode
>  - change I2C address through this driver
>  - light sensor
> 
> The driver was added in the directory "proximity" of the iio subsystem and
> the menu in den config is now called "Proximity and distance sensors"
> 
> Signed-off-by: Andreas Klinger <ak@it-klinger.de>
Applied to the togreg bbranch of iio.git and pushed out as testing for the
autobuilders to play with it.

I'm not 100% sure we won't ever come up with better ABI for a the custom
bits but it won't be hard to support what we have here indefinitely so
it should be no problem to support any new ABI as well!

Thanks for your hard work on this.  A nice bit of kit to have support for.

Jonathan
> ---
>  drivers/iio/proximity/Kconfig  |  13 +-
>  drivers/iio/proximity/Makefile |   1 +
>  drivers/iio/proximity/srf08.c  | 398 +++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 411 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/iio/proximity/srf08.c
> 
> diff --git a/drivers/iio/proximity/Kconfig b/drivers/iio/proximity/Kconfig
> index ef4c73db5b53..ab96cb7a0054 100644
> --- a/drivers/iio/proximity/Kconfig
> +++ b/drivers/iio/proximity/Kconfig
> @@ -18,7 +18,7 @@ config AS3935
>  
>  endmenu
>  
> -menu "Proximity sensors"
> +menu "Proximity and distance sensors"
>  
>  config LIDAR_LITE_V2
>  	tristate "PulsedLight LIDAR sensor"
> @@ -45,4 +45,15 @@ config SX9500
>  	  To compile this driver as a module, choose M here: the
>  	  module will be called sx9500.
>  
> +config SRF08
> +	tristate "Devantech SRF08 ultrasonic ranger sensor"
> +	depends on I2C
> +	help
> +	  Say Y here to build a driver for Devantech SRF08 ultrasonic
> +	  ranger sensor. This driver can be used to measure the distance
> +	  of objects.
> +
> +	  To compile this driver as a module, choose M here: the
> +	  module will be called srf08.
> +
>  endmenu
> diff --git a/drivers/iio/proximity/Makefile b/drivers/iio/proximity/Makefile
> index 9aadd9a8ee99..e914c2a5dd49 100644
> --- a/drivers/iio/proximity/Makefile
> +++ b/drivers/iio/proximity/Makefile
> @@ -5,4 +5,5 @@
>  # When adding new entries keep the list in alphabetical order
>  obj-$(CONFIG_AS3935)		+= as3935.o
>  obj-$(CONFIG_LIDAR_LITE_V2)	+= pulsedlight-lidar-lite-v2.o
> +obj-$(CONFIG_SRF08)		+= srf08.o
>  obj-$(CONFIG_SX9500)		+= sx9500.o
> diff --git a/drivers/iio/proximity/srf08.c b/drivers/iio/proximity/srf08.c
> new file mode 100644
> index 000000000000..49316cbf7c60
> --- /dev/null
> +++ b/drivers/iio/proximity/srf08.c
> @@ -0,0 +1,398 @@
> +/*
> + * srf08.c - Support for Devantech SRF08 ultrasonic ranger
> + *
> + * Copyright (c) 2016 Andreas Klinger <ak@it-klinger.de>
> + *
> + * This file is subject to the terms and conditions of version 2 of
> + * the GNU General Public License.  See the file COPYING in the main
> + * directory of this archive for more details.
> + *
> + * For details about the device see:
> + * http://www.robot-electronics.co.uk/htm/srf08tech.html
> + */
> +
> +#include <linux/err.h>
> +#include <linux/i2c.h>
> +#include <linux/delay.h>
> +#include <linux/module.h>
> +#include <linux/bitops.h>
> +#include <linux/iio/iio.h>
> +#include <linux/iio/sysfs.h>
> +
> +/* registers of SRF08 device */
> +#define SRF08_WRITE_COMMAND	0x00	/* Command Register */
> +#define SRF08_WRITE_MAX_GAIN	0x01	/* Max Gain Register: 0 .. 31 */
> +#define SRF08_WRITE_RANGE	0x02	/* Range Register: 0 .. 255 */
> +#define SRF08_READ_SW_REVISION	0x00	/* Software Revision */
> +#define SRF08_READ_LIGHT	0x01	/* Light Sensor during last echo */
> +#define SRF08_READ_ECHO_1_HIGH	0x02	/* Range of first echo received */
> +#define SRF08_READ_ECHO_1_LOW	0x03	/* Range of first echo received */
> +
> +#define SRF08_CMD_RANGING_CM	0x51	/* Ranging Mode - Result in cm */
> +
> +#define SRF08_DEFAULT_GAIN	1025	/* default analogue value of Gain */
> +#define SRF08_DEFAULT_RANGE	6020	/* default value of Range in mm */
> +
> +struct srf08_data {
> +	struct i2c_client	*client;
> +	int			sensitivity;		/* Gain */
> +	int			range_mm;		/* max. Range in mm */
> +	struct mutex		lock;
> +};
> +
> +/*
> + * in the documentation one can read about the "Gain" of the device
> + * which is used here for amplifying the signal and filtering out unwanted
> + * ones.
> + * But with ADC's this term is already used differently and that's why it
> + * is called "Sensitivity" here.
> + */
> +static const int srf08_sensitivity[] = {
> +	 94,  97, 100, 103, 107, 110, 114, 118,
> +	123, 128, 133, 139, 145, 152, 159, 168,
> +	177, 187, 199, 212, 227, 245, 265, 288,
> +	317, 352, 395, 450, 524, 626, 777, 1025 };
> +
> +static int srf08_read_ranging(struct srf08_data *data)
> +{
> +	struct i2c_client *client = data->client;
> +	int ret, i;
> +	int waittime;
> +
> +	mutex_lock(&data->lock);
> +
> +	ret = i2c_smbus_write_byte_data(data->client,
> +			SRF08_WRITE_COMMAND, SRF08_CMD_RANGING_CM);
> +	if (ret < 0) {
> +		dev_err(&client->dev, "write command - err: %d\n", ret);
> +		mutex_unlock(&data->lock);
> +		return ret;
> +	}
> +
> +	/*
> +	 * we read here until a correct version number shows up as
> +	 * suggested by the documentation
> +	 *
> +	 * with an ultrasonic speed of 343 m/s and a roundtrip of it
> +	 * sleep the expected duration and try to read from the device
> +	 * if nothing useful is read try it in a shorter grid
> +	 *
> +	 * polling for not more than 20 ms should be enough
> +	 */
> +	waittime = 1 + data->range_mm / 172;
> +	msleep(waittime);
> +	for (i = 0; i < 4; i++) {
> +		ret = i2c_smbus_read_byte_data(data->client,
> +						SRF08_READ_SW_REVISION);
> +
> +		/* check if a valid version number is read */
> +		if (ret < 255 && ret > 0)
> +			break;
> +		msleep(5);
> +	}
> +
> +	if (ret >= 255 || ret <= 0) {
> +		dev_err(&client->dev, "device not ready\n");
> +		mutex_unlock(&data->lock);
> +		return -EIO;
> +	}
> +
> +	ret = i2c_smbus_read_word_swapped(data->client,
> +						SRF08_READ_ECHO_1_HIGH);
> +	if (ret < 0) {
> +		dev_err(&client->dev, "cannot read distance: ret=%d\n", ret);
> +		mutex_unlock(&data->lock);
> +		return ret;
> +	}
> +
> +	mutex_unlock(&data->lock);
> +
> +	return ret;
> +}
> +
> +static int srf08_read_raw(struct iio_dev *indio_dev,
> +			    struct iio_chan_spec const *channel, int *val,
> +			    int *val2, long mask)
> +{
> +	struct srf08_data *data = iio_priv(indio_dev);
> +	int ret;
> +
> +	if (channel->type != IIO_DISTANCE)
> +		return -EINVAL;
> +
> +	switch (mask) {
> +	case IIO_CHAN_INFO_RAW:
> +		ret = srf08_read_ranging(data);
> +		if (ret < 0)
> +			return ret;
> +		*val = ret;
> +		return IIO_VAL_INT;
> +	case IIO_CHAN_INFO_SCALE:
> +		/* 1 LSB is 1 cm */
> +		*val = 0;
> +		*val2 = 10000;
> +		return IIO_VAL_INT_PLUS_MICRO;
> +	default:
> +		return -EINVAL;
> +	}
> +}
> +
> +static ssize_t srf08_show_range_mm_available(struct device *dev,
> +				struct device_attribute *attr, char *buf)
> +{
> +	return sprintf(buf, "[0.043 0.043 11.008]\n");
> +}
> +
> +static IIO_DEVICE_ATTR(sensor_max_range_available, S_IRUGO,
> +				srf08_show_range_mm_available, NULL, 0);
> +
> +static ssize_t srf08_show_range_mm(struct device *dev,
> +				struct device_attribute *attr, char *buf)
> +{
> +	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
> +	struct srf08_data *data = iio_priv(indio_dev);
> +
> +	return sprintf(buf, "%d.%03d\n", data->range_mm / 1000,
> +						data->range_mm % 1000);
> +}
> +
> +/*
> + * set the range of the sensor to an even multiple of 43 mm
> + * which corresponds to 1 LSB in the register
> + *
> + * register value    corresponding range
> + *         0x00             43 mm
> + *         0x01             86 mm
> + *         0x02            129 mm
> + *         ...
> + *         0xFF          11008 mm
> + */
> +static ssize_t srf08_write_range_mm(struct srf08_data *data, unsigned int val)
> +{
> +	int ret;
> +	struct i2c_client *client = data->client;
> +	unsigned int mod;
> +	u8 regval;
> +
> +	ret = val / 43 - 1;
> +	mod = val % 43;
> +
> +	if (mod || (ret < 0) || (ret > 255))
> +		return -EINVAL;
> +
> +	regval = ret;
> +
> +	mutex_lock(&data->lock);
> +
> +	ret = i2c_smbus_write_byte_data(client, SRF08_WRITE_RANGE, regval);
> +	if (ret < 0) {
> +		dev_err(&client->dev, "write_range - err: %d\n", ret);
> +		mutex_unlock(&data->lock);
> +		return ret;
> +	}
> +
> +	data->range_mm = val;
> +
> +	mutex_unlock(&data->lock);
> +
> +	return 0;
> +}
> +
> +static ssize_t srf08_store_range_mm(struct device *dev,
> +					struct device_attribute *attr,
> +					const char *buf, size_t len)
> +{
> +	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
> +	struct srf08_data *data = iio_priv(indio_dev);
> +	int ret;
> +	int integer, fract;
> +
> +	ret = iio_str_to_fixpoint(buf, 100, &integer, &fract);
> +	if (ret)
> +		return ret;
> +
> +	ret = srf08_write_range_mm(data, integer * 1000 + fract);
> +	if (ret < 0)
> +		return ret;
> +
> +	return len;
> +}
> +
> +static IIO_DEVICE_ATTR(sensor_max_range, S_IRUGO | S_IWUSR,
> +			srf08_show_range_mm, srf08_store_range_mm, 0);
> +
> +static ssize_t srf08_show_sensitivity_available(struct device *dev,
> +				struct device_attribute *attr, char *buf)
> +{
> +	int i, len = 0;
> +
> +	for (i = 0; i < ARRAY_SIZE(srf08_sensitivity); i++)
> +		len += sprintf(buf + len, "%d ", srf08_sensitivity[i]);
> +
> +	len += sprintf(buf + len, "\n");
> +
> +	return len;
> +}
> +
> +static IIO_DEVICE_ATTR(sensor_sensitivity_available, S_IRUGO,
> +				srf08_show_sensitivity_available, NULL, 0);
> +
> +static ssize_t srf08_show_sensitivity(struct device *dev,
> +				struct device_attribute *attr, char *buf)
> +{
> +	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
> +	struct srf08_data *data = iio_priv(indio_dev);
> +	int len;
> +
> +	len = sprintf(buf, "%d\n", data->sensitivity);
> +
> +	return len;
> +}
> +
> +static ssize_t srf08_write_sensitivity(struct srf08_data *data,
> +							unsigned int val)
> +{
> +	struct i2c_client *client = data->client;
> +	int ret, i;
> +	u8 regval;
> +
> +	for (i = 0; i < ARRAY_SIZE(srf08_sensitivity); i++)
> +		if (val == srf08_sensitivity[i]) {
> +			regval = i;
> +			break;
> +		}
> +
> +	if (i >= ARRAY_SIZE(srf08_sensitivity))
> +		return -EINVAL;
> +
> +	mutex_lock(&data->lock);
> +
> +	ret = i2c_smbus_write_byte_data(client,
> +						SRF08_WRITE_MAX_GAIN, regval);
> +	if (ret < 0) {
> +		dev_err(&client->dev, "write_sensitivity - err: %d\n", ret);
> +		mutex_unlock(&data->lock);
> +		return ret;
> +	}
> +
> +	data->sensitivity = val;
> +
> +	mutex_unlock(&data->lock);
> +
> +	return 0;
> +}
> +
> +static ssize_t srf08_store_sensitivity(struct device *dev,
> +						struct device_attribute *attr,
> +						const char *buf, size_t len)
> +{
> +	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
> +	struct srf08_data *data = iio_priv(indio_dev);
> +	int ret;
> +	unsigned int val;
> +
> +	ret = kstrtouint(buf, 10, &val);
> +	if (ret)
> +		return ret;
> +
> +	ret = srf08_write_sensitivity(data, val);
> +	if (ret < 0)
> +		return ret;
> +
> +	return len;
> +}
> +
> +static IIO_DEVICE_ATTR(sensor_sensitivity, S_IRUGO | S_IWUSR,
> +			srf08_show_sensitivity, srf08_store_sensitivity, 0);
> +
> +static struct attribute *srf08_attributes[] = {
> +	&iio_dev_attr_sensor_max_range.dev_attr.attr,
> +	&iio_dev_attr_sensor_max_range_available.dev_attr.attr,
> +	&iio_dev_attr_sensor_sensitivity.dev_attr.attr,
> +	&iio_dev_attr_sensor_sensitivity_available.dev_attr.attr,
> +	NULL,
> +};
> +
> +static const struct attribute_group srf08_attribute_group = {
> +	.attrs = srf08_attributes,
> +};
> +
> +static const struct iio_chan_spec srf08_channels[] = {
> +	{
> +		.type = IIO_DISTANCE,
> +		.info_mask_separate =
> +				BIT(IIO_CHAN_INFO_RAW) |
> +				BIT(IIO_CHAN_INFO_SCALE),
> +	},
> +};
> +
> +static const struct iio_info srf08_info = {
> +	.read_raw = srf08_read_raw,
> +	.attrs = &srf08_attribute_group,
> +	.driver_module = THIS_MODULE,
> +};
> +
> +static int srf08_probe(struct i2c_client *client,
> +					 const struct i2c_device_id *id)
> +{
> +	struct iio_dev *indio_dev;
> +	struct srf08_data *data;
> +	int ret;
> +
> +	if (!i2c_check_functionality(client->adapter,
> +					I2C_FUNC_SMBUS_READ_BYTE_DATA |
> +					I2C_FUNC_SMBUS_WRITE_BYTE_DATA |
> +					I2C_FUNC_SMBUS_READ_WORD_DATA))
> +		return -ENODEV;
> +
> +	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
> +	if (!indio_dev)
> +		return -ENOMEM;
> +
> +	data = iio_priv(indio_dev);
> +	i2c_set_clientdata(client, indio_dev);
> +	data->client = client;
> +
> +	indio_dev->name = "srf08";
> +	indio_dev->dev.parent = &client->dev;
> +	indio_dev->modes = INDIO_DIRECT_MODE;
> +	indio_dev->info = &srf08_info;
> +	indio_dev->channels = srf08_channels;
> +	indio_dev->num_channels = ARRAY_SIZE(srf08_channels);
> +
> +	mutex_init(&data->lock);
> +
> +	/*
> +	 * set default values of device here
> +	 * these register values cannot be read from the hardware
> +	 * therefore set driver specific default values
> +	 */
> +	ret = srf08_write_range_mm(data, SRF08_DEFAULT_RANGE);
> +	if (ret < 0)
> +		return ret;
> +
> +	ret = srf08_write_sensitivity(data, SRF08_DEFAULT_GAIN);
> +	if (ret < 0)
> +		return ret;
> +
> +	return devm_iio_device_register(&client->dev, indio_dev);
> +}
> +
> +static const struct i2c_device_id srf08_id[] = {
> +	{ "srf08", 0 },
> +	{ }
> +};
> +MODULE_DEVICE_TABLE(i2c, srf08_id);
> +
> +static struct i2c_driver srf08_driver = {
> +	.driver = {
> +		.name	= "srf08",
> +	},
> +	.probe = srf08_probe,
> +	.id_table = srf08_id,
> +};
> +module_i2c_driver(srf08_driver);
> +
> +MODULE_AUTHOR("Andreas Klinger <ak@it-klinger.de>");
> +MODULE_DESCRIPTION("Devantech SRF08 ultrasonic ranger driver");
> +MODULE_LICENSE("GPL");
> 

^ permalink raw reply

* Re: [PATCH v4 3/3] iio: distance: srf08: add driver ABI documentation
From: Jonathan Cameron @ 2017-01-28 16:39 UTC (permalink / raw)
  To: Andreas Klinger, knaack.h, lars, pmeerw, linux-iio, linux-kernel,
	ktsai, wsa, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
	galak, trivial, mranostay, linux-i2c, devicetree
In-Reply-To: <20170125190747.GA9285@andreas>

On 25/01/17 19:07, Andreas Klinger wrote:
> Add sysfs-bus-iio-distance-srf08 for individual attributes of the driver,
> especially:
>  - sensitivity which the device documentation calls gain for amplifying the
>    signal
>  - max_range for limiting the maximum distance for expected echos and
>    therefore limiting the time waiting for telegrams
> 
> Signed-off-by: Andreas Klinger <ak@it-klinger.de>
Nice clear docs.  Thanks,

Applied.
> ---
>  .../ABI/testing/sysfs-bus-iio-distance-srf08       | 22 ++++++++++++++++++++++
>  1 file changed, 22 insertions(+)
>  create mode 100644 Documentation/ABI/testing/sysfs-bus-iio-distance-srf08
> 
> diff --git a/Documentation/ABI/testing/sysfs-bus-iio-distance-srf08 b/Documentation/ABI/testing/sysfs-bus-iio-distance-srf08
> new file mode 100644
> index 000000000000..0a1ca1487fa9
> --- /dev/null
> +++ b/Documentation/ABI/testing/sysfs-bus-iio-distance-srf08
> @@ -0,0 +1,22 @@
> +What		/sys/bus/iio/devices/iio:deviceX/sensor_sensitivity
> +Date:		January 2017
> +KernelVersion:	4.11
> +Contact:	linux-iio@vger.kernel.org
> +Description:
> +		Show or set the gain boost of the amp, from 0-31 range.
> +		default 31
> +
> +What		/sys/bus/iio/devices/iio:deviceX/sensor_max_range
> +Date:		January 2017
> +KernelVersion:	4.11
> +Contact:	linux-iio@vger.kernel.org
> +Description:
> +                Show or set the maximum range between the sensor and the
> +		first object echoed in meters. Default value is 6.020.
> +		This setting limits the time the driver is waiting for a
> +		echo.
> +		Showing the range of available values is represented as the
> +		minimum value, the step and the maximum value, all enclosed
> +		in square brackets.
> +		Example:
> +		[0.043 0.043 11.008]
> 

^ permalink raw reply

* Re: [PATCH v2 13/13] drm/i915: Acquire P-Unit access when modifying P-Unit settings
From: Hans de Goede @ 2017-01-28 17:18 UTC (permalink / raw)
  To: Ville Syrjälä
  Cc: Wolfram Sang, russianneuromancer @ ya . ru, intel-gfx, linux-i2c,
	Jarkko Nikula, dri-devel, H . Peter Anvin, Daniel Vetter,
	Thomas Gleixner, Andy Shevchenko, Mika Westerberg, Len Brown
In-Reply-To: <64a4aef7-837f-059c-9be5-4a76602488be@redhat.com>

Hi,

On 01/28/2017 05:25 PM, Hans de Goede wrote:
> Hi,
>
> On 01/27/2017 02:51 PM, Ville Syrjälä wrote:
>> On Mon, Jan 23, 2017 at 10:09:58PM +0100, Hans de Goede wrote:
>>> Make sure the P-Unit or the PMIC i2c bus is not in use when we send a
>>> request to the P-Unit by calling iosf_mbi_punit_acquire() / _release()
>>> around P-Unit write accesses.
>>
>> Can't we just stuff the calls into the actual punit write function
>> rather than sprinkling them all over the place?
>
> punit access is acquired across sections like this:
>
>         iosf_mbi_punit_acquire();
>
>         val = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ);
>         val &= ~DSPFREQGUAR_MASK;
>         val |= (cmd << DSPFREQGUAR_SHIFT);
>         vlv_punit_write(dev_priv, PUNIT_REG_DSPFREQ, val);
>         if (wait_for((vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ) &
>                       DSPFREQSTAT_MASK) == (cmd << DSPFREQSTAT_SHIFT),
>                      50)) {
>                 DRM_ERROR("timed out waiting for CDclk change\n");
>         }
>         iosf_mbi_punit_release();
>
> Where we want to wait for the requested change to have taken
> effect before releasing the punit.
>
>>
>> + a comment would be nice why it's there.
>
> I will add comments to the acquire calls.
>
>> Do we need a kconfig select/depends on the iosf_mbi thing? Or some
>> ifdefs?
>
> No, the iosf_mbi header defines empty inline versions of
> iosf_mbi_punit_acquire / _release if IOSF_MBI is disabled,
> this does mean that iosf_mbi must be builtin if the i915
> driver is. I'll add:
>
>     depends on DRM_I915=IOSF_MBI || IOSF_MBI=y
>
> To the i915 Kconfig to enforce this.

Hmm, ok so that does not work (long cyclic dependency through the
selection of ACPI_VIDEO).

So I've now added this instead:

	# iosf_mbi needs to be builtin if we are builtin
	select IOSF_MBI if DRM_I915=y

Regards,

Hans


>>> BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=155241
>>> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
>>> Tested-by: tagorereddy <tagore.chandan@gmail.com>
>>> ---
>>> Changes in v2:
>>> -Spelling: P-Unit, PMIC
>>> -Adjust for iosf_mbi_punit_lock/_unlock to _acquire/_release rename
>>> ---
>>>  drivers/gpu/drm/i915/intel_display.c    | 6 ++++++
>>>  drivers/gpu/drm/i915/intel_pm.c         | 9 +++++++++
>>>  drivers/gpu/drm/i915/intel_runtime_pm.c | 9 +++++++++
>>>  3 files changed, 24 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>>> index 5604701..13e5152 100644
>>> --- a/drivers/gpu/drm/i915/intel_display.c
>>> +++ b/drivers/gpu/drm/i915/intel_display.c
>>> @@ -47,6 +47,7 @@
>>>  #include <drm/drm_rect.h>
>>>  #include <linux/dma_remapping.h>
>>>  #include <linux/reservation.h>
>>> +#include <asm/iosf_mbi.h>
>>>
>>>  static bool is_mmio_work(struct intel_flip_work *work)
>>>  {
>>> @@ -6421,6 +6422,8 @@ static void valleyview_set_cdclk(struct drm_device *dev, int cdclk)
>>>          cmd = 0;
>>>
>>>      mutex_lock(&dev_priv->rps.hw_lock);
>>> +    iosf_mbi_punit_acquire();
>>> +
>>>      val = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ);
>>>      val &= ~DSPFREQGUAR_MASK;
>>>      val |= (cmd << DSPFREQGUAR_SHIFT);
>>> @@ -6430,6 +6433,7 @@ static void valleyview_set_cdclk(struct drm_device *dev, int cdclk)
>>>               50)) {
>>>          DRM_ERROR("timed out waiting for CDclk change\n");
>>>      }
>>> +    iosf_mbi_punit_release();
>>>      mutex_unlock(&dev_priv->rps.hw_lock);
>>>
>>>      mutex_lock(&dev_priv->sb_lock);
>>> @@ -6497,6 +6501,7 @@ static void cherryview_set_cdclk(struct drm_device *dev, int cdclk)
>>>      cmd = DIV_ROUND_CLOSEST(dev_priv->hpll_freq << 1, cdclk) - 1;
>>>
>>>      mutex_lock(&dev_priv->rps.hw_lock);
>>> +    iosf_mbi_punit_acquire();
>>>      val = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ);
>>>      val &= ~DSPFREQGUAR_MASK_CHV;
>>>      val |= (cmd << DSPFREQGUAR_SHIFT_CHV);
>>> @@ -6506,6 +6511,7 @@ static void cherryview_set_cdclk(struct drm_device *dev, int cdclk)
>>>               50)) {
>>>          DRM_ERROR("timed out waiting for CDclk change\n");
>>>      }
>>> +    iosf_mbi_punit_release();
>>>      mutex_unlock(&dev_priv->rps.hw_lock);
>>>
>>>      intel_update_cdclk(dev_priv);
>>> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
>>> index 249623d..adff84a 100644
>>> --- a/drivers/gpu/drm/i915/intel_pm.c
>>> +++ b/drivers/gpu/drm/i915/intel_pm.c
>>> @@ -32,6 +32,7 @@
>>>  #include "../../../platform/x86/intel_ips.h"
>>>  #include <linux/module.h>
>>>  #include <drm/drm_atomic_helper.h>
>>> +#include <asm/iosf_mbi.h>
>>>
>>>  /**
>>>   * DOC: RC6
>>> @@ -276,6 +277,7 @@ static void chv_set_memory_dvfs(struct drm_i915_private *dev_priv, bool enable)
>>>      u32 val;
>>>
>>>      mutex_lock(&dev_priv->rps.hw_lock);
>>> +    iosf_mbi_punit_acquire();
>>>
>>>      val = vlv_punit_read(dev_priv, PUNIT_REG_DDR_SETUP2);
>>>      if (enable)
>>> @@ -290,6 +292,7 @@ static void chv_set_memory_dvfs(struct drm_i915_private *dev_priv, bool enable)
>>>                FORCE_DDR_FREQ_REQ_ACK) == 0, 3))
>>>          DRM_ERROR("timed out waiting for Punit DDR DVFS request\n");
>>>
>>> +    iosf_mbi_punit_release();
>>>      mutex_unlock(&dev_priv->rps.hw_lock);
>>>  }
>>>
>>> @@ -298,6 +301,7 @@ static void chv_set_memory_pm5(struct drm_i915_private *dev_priv, bool enable)
>>>      u32 val;
>>>
>>>      mutex_lock(&dev_priv->rps.hw_lock);
>>> +    iosf_mbi_punit_acquire();
>>>
>>>      val = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ);
>>>      if (enable)
>>> @@ -306,6 +310,7 @@ static void chv_set_memory_pm5(struct drm_i915_private *dev_priv, bool enable)
>>>          val &= ~DSP_MAXFIFO_PM5_ENABLE;
>>>      vlv_punit_write(dev_priv, PUNIT_REG_DSPFREQ, val);
>>>
>>> +    iosf_mbi_punit_release();
>>>      mutex_unlock(&dev_priv->rps.hw_lock);
>>>  }
>>>
>>> @@ -4553,6 +4558,7 @@ void vlv_wm_get_hw_state(struct drm_device *dev)
>>>
>>>      if (IS_CHERRYVIEW(dev_priv)) {
>>>          mutex_lock(&dev_priv->rps.hw_lock);
>>> +        iosf_mbi_punit_acquire();
>>>
>>>          val = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ);
>>>          if (val & DSP_MAXFIFO_PM5_ENABLE)
>>> @@ -4582,6 +4588,7 @@ void vlv_wm_get_hw_state(struct drm_device *dev)
>>>                  wm->level = VLV_WM_LEVEL_DDR_DVFS;
>>>          }
>>>
>>> +        iosf_mbi_punit_release();
>>>          mutex_unlock(&dev_priv->rps.hw_lock);
>>>      }
>>>
>>> @@ -4988,7 +4995,9 @@ static void valleyview_set_rps(struct drm_i915_private *dev_priv, u8 val)
>>>      I915_WRITE(GEN6_PMINTRMSK, gen6_rps_pm_mask(dev_priv, val));
>>>
>>>      if (val != dev_priv->rps.cur_freq) {
>>> +        iosf_mbi_punit_acquire();
>>>          vlv_punit_write(dev_priv, PUNIT_REG_GPU_FREQ_REQ, val);
>>> +        iosf_mbi_punit_release();
>>>          if (!IS_CHERRYVIEW(dev_priv))
>>>              gen6_set_rps_thresholds(dev_priv, val);
>>>      }
>>> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
>>> index c0b7e95..e66bcc8 100644
>>> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
>>> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
>>> @@ -28,6 +28,7 @@
>>>
>>>  #include <linux/pm_runtime.h>
>>>  #include <linux/vgaarb.h>
>>> +#include <asm/iosf_mbi.h>
>>>
>>>  #include "i915_drv.h"
>>>  #include "intel_drv.h"
>>> @@ -1027,6 +1028,8 @@ static void vlv_set_power_well(struct drm_i915_private *dev_priv,
>>>      if (COND)
>>>          goto out;
>>>
>>> +    iosf_mbi_punit_acquire();
>>> +
>>>      ctrl = vlv_punit_read(dev_priv, PUNIT_REG_PWRGT_CTRL);
>>>      ctrl &= ~mask;
>>>      ctrl |= state;
>>> @@ -1037,6 +1040,8 @@ static void vlv_set_power_well(struct drm_i915_private *dev_priv,
>>>                state,
>>>                vlv_punit_read(dev_priv, PUNIT_REG_PWRGT_CTRL));
>>>
>>> +    iosf_mbi_punit_release();
>>> +
>>>  #undef COND
>>>
>>>  out:
>>> @@ -1643,6 +1648,8 @@ static void chv_set_pipe_power_well(struct drm_i915_private *dev_priv,
>>>      if (COND)
>>>          goto out;
>>>
>>> +    iosf_mbi_punit_acquire();
>>> +
>>>      ctrl = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ);
>>>      ctrl &= ~DP_SSC_MASK(pipe);
>>>      ctrl |= enable ? DP_SSC_PWR_ON(pipe) : DP_SSC_PWR_GATE(pipe);
>>> @@ -1653,6 +1660,8 @@ static void chv_set_pipe_power_well(struct drm_i915_private *dev_priv,
>>>                state,
>>>                vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ));
>>>
>>> +    iosf_mbi_punit_release();
>>> +
>>>  #undef COND
>>>
>>>  out:
>>> --
>>> 2.9.3
>>
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^ permalink raw reply

* Re: [PATCH v2 12/13] drm/i915: Listen for PMIC bus access notifications
From: Hans de Goede @ 2017-01-28 17:39 UTC (permalink / raw)
  To: Ville Syrjälä
  Cc: Wolfram Sang, russianneuromancer @ ya . ru, intel-gfx, linux-i2c,
	Jarkko Nikula, dri-devel, H . Peter Anvin, Daniel Vetter,
	Thomas Gleixner, Andy Shevchenko, Mika Westerberg, Len Brown
In-Reply-To: <20170127135255.GT31595@intel.com>

Hi,

On 01/27/2017 02:52 PM, Ville Syrjälä wrote:
> On Mon, Jan 23, 2017 at 10:09:57PM +0100, Hans de Goede wrote:
>> Listen for PMIC bus access notifications and get FORCEWAKE_ALL while
>> the bus is accessed to avoid needing to do any forcewakes, which need
>> PMIC bus access, while the PMIC bus is busy:
>>
>> This fixes errors like these showing up in dmesg, usually followed
>> by a gfx or system freeze:
>>
>> [drm:fw_domains_get [i915]] *ERROR* render: timed out waiting for forcewake ack request.
>> [drm:fw_domains_get [i915]] *MEDIA* render: timed out waiting for forcewake ack request.
>> i2c_designware 808622C1:06: punit semaphore timed out, resetting
>> i2c_designware 808622C1:06: PUNIT SEM: 2
>> i2c_designware 808622C1:06: couldn't acquire bus ownership
>>
>> Downside of this approach is that it causes wakeups whenever the PMIC
>> bus is accessed. Unfortunately we cannot simply wait for the PMIC bus
>> to go idle when we hit a race, as forcewakes may be done from interrupt
>> handlers where we cannot sleep to wait for the i2c PMIC bus access to
>> finish.
>>
>> Note that the notifications and thus the wakeups will only happen on
>> baytrail / cherrytrail devices using PMICs with a shared i2c bus for
>> P-Unit and host PMIC access (i2c busses with a _SEM method in their
>> APCI node), e.g. an axp288 PMIC.
>>
>> I plan to write some patches for drivers accessing the PMIC bus to
>> limit their bus accesses to a bare minimum (e.g. cache registers, do not
>> update battery level more often then 4 times a minute), to limit the
>> amount of wakeups.
>>
>> BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=155241
>> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
>> Tested-by: tagorereddy <tagore.chandan@gmail.com>
>> ---
>> Changes in v2:
>> -Spelling: P-Unit, PMIC
>> ---
>>  drivers/gpu/drm/i915/i915_drv.h     |  1 +
>>  drivers/gpu/drm/i915/intel_uncore.c | 35 +++++++++++++++++++++++++++++++++++
>>  2 files changed, 36 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>> index c717329..52f7dde 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -721,6 +721,7 @@ struct intel_uncore {
>>  	const struct intel_forcewake_range *fw_domains_table;
>>  	unsigned int fw_domains_table_entries;
>>
>> +	struct notifier_block pmic_bus_access_nb;
>>  	struct intel_uncore_funcs funcs;
>>
>>  	unsigned fifo_count;
>> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
>> index 3767307..175fe02 100644
>> --- a/drivers/gpu/drm/i915/intel_uncore.c
>> +++ b/drivers/gpu/drm/i915/intel_uncore.c
>> @@ -25,6 +25,7 @@
>>  #include "intel_drv.h"
>>  #include "i915_vgpu.h"
>>
>> +#include <asm/iosf_mbi.h>
>>  #include <linux/pm_runtime.h>
>>
>>  #define FORCEWAKE_ACK_TIMEOUT_MS 50
>> @@ -429,12 +430,16 @@ static void __intel_uncore_early_sanitize(struct drm_i915_private *dev_priv,
>>
>>  void intel_uncore_suspend(struct drm_i915_private *dev_priv)
>>  {
>> +	iosf_mbi_unregister_pmic_bus_access_notifier(
>> +		&dev_priv->uncore.pmic_bus_access_nb);
>>  	__intel_uncore_forcewake_reset(dev_priv, false);
>>  }
>>
>>  void intel_uncore_resume(struct drm_i915_private *dev_priv)
>>  {
>>  	__intel_uncore_early_sanitize(dev_priv, true);
>> +	iosf_mbi_register_pmic_bus_access_notifier(
>> +		&dev_priv->uncore.pmic_bus_access_nb);
>>  	i915_check_and_clear_faults(dev_priv);
>>  }
>
> The early/normal/late suspend/resume ordering starts to bother me a
> little more now. I wonder if we're totally safe wrt. the suspend/resume
> order of the devices now.

As I mentioned before I'm not touching the existing ordering. As for the
newly added calls the unregister must be done before calling
intel_uncore_forcewake_reset() to make sure that the
i915_pmic_bus_access_notifier() has put any forcewakes it may hold. Note
this is ensured to happen on unregister as iosf_mbi_unregister_pmic_bus_access_notifier
waits for the bus to be idle before unregistering the notifier
(in a race free manner of course).

Likewise he iosf_mbi_register_pmic_bus_access_notifier() call is
done at the only possible spot, it must be done afer
__intel_uncore_early_sanitize and I added a WARN_ON to get a traceback
and the "timed out waiting for forcewake ack request" errors this patch
fixes are triggered (on suspend/resume) from i915_check_and_clear_faults().

Note tagorereddy was seeing these under different circumstances,
this is just the code-path I hit in my tests.

So we cannot just do a iosf_mbi_punit_acquire around the
i915_check_and_clear_faults() call, there are many other places
where a forcewake is done and we could potentially race.

>
>> @@ -1390,6 +1395,28 @@ static void intel_uncore_fw_domains_init(struct drm_i915_private *dev_priv)
>>  	dev_priv->uncore.fw_domains_table_entries = ARRAY_SIZE((d)); \
>>  }
>>
>> +static int i915_pmic_bus_access_notifier(struct notifier_block *nb,
>> +					 unsigned long action, void *data)
>> +{
>> +	struct drm_i915_private *dev_priv = container_of(nb,
>> +			struct drm_i915_private, uncore.pmic_bus_access_nb);
>> +
>> +	switch (action) {
>> +	case MBI_PMIC_BUS_ACCESS_BEGIN:
>> +		/*
>> +		 * forcewake all to make sure that we don't need to forcewake
>> +		 * any power-planes while the pmic bus is busy.
>> +		 */
>> +		intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
>
> I must say I don't really like this stuff at all. But if it helps I gues
> we should go for it. I'd like to see the comment elaborate a bit more on
> why we think it's is needed.

OK, how about:

                 /*
                  * forcewake all now to make sure that we don't need to do a
                  * forcewake later which on systems where this notifier gets
                  * called requires the punit to access to the shared pmic i2c
                  * bus, which will be busy after this notification, leading to:
                  * "render: timed out waiting for forcewake ack request."
                  * errors.
                  */

?

>
>> +		break;
>> +	case MBI_PMIC_BUS_ACCESS_END:
>> +		intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
>> +		break;
>> +	}
>> +
>> +	return NOTIFY_OK;
>> +}
>> +
>>  void intel_uncore_init(struct drm_i915_private *dev_priv)
>>  {
>>  	i915_check_vgpu(dev_priv);
>> @@ -1399,6 +1426,8 @@ void intel_uncore_init(struct drm_i915_private *dev_priv)
>>  	__intel_uncore_early_sanitize(dev_priv, false);
>>
>>  	dev_priv->uncore.unclaimed_mmio_check = 1;
>> +	dev_priv->uncore.pmic_bus_access_nb.notifier_call =
>> +		i915_pmic_bus_access_notifier;
>>
>>  	switch (INTEL_INFO(dev_priv)->gen) {
>>  	default:
>> @@ -1458,6 +1487,9 @@ void intel_uncore_init(struct drm_i915_private *dev_priv)
>>  		ASSIGN_READ_MMIO_VFUNCS(vgpu);
>>  	}
>>
>> +	iosf_mbi_register_pmic_bus_access_notifier(
>> +		&dev_priv->uncore.pmic_bus_access_nb);
>> +
>>  	i915_check_and_clear_faults(dev_priv);
>>  }
>>  #undef ASSIGN_WRITE_MMIO_VFUNCS
>> @@ -1465,6 +1497,9 @@ void intel_uncore_init(struct drm_i915_private *dev_priv)
>>
>>  void intel_uncore_fini(struct drm_i915_private *dev_priv)
>>  {
>> +	iosf_mbi_unregister_pmic_bus_access_notifier(
>> +		&dev_priv->uncore.pmic_bus_access_nb);
>> +
>>  	/* Paranoia: make sure we have disabled everything before we exit. */
>>  	intel_uncore_sanitize(dev_priv);
>>  	__intel_uncore_forcewake_reset(dev_priv, false);
>> --
>> 2.9.3
>


Regards,

Hans
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^ permalink raw reply

* Re: [PATCH v4] i2c: core: helper function to detect slave mode
From: Wolfram Sang @ 2017-01-28 21:13 UTC (permalink / raw)
  To: Luis Oliveira
  Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
	jarkko.nikula-VuQAYsv1563Yd54FQh9/CA,
	andriy.shevchenko-VuQAYsv1563Yd54FQh9/CA,
	mika.westerberg-VuQAYsv1563Yd54FQh9/CA,
	linux-i2c-u79uwXL29TY76Z2rM5mHXA,
	devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA, vz-ChpfBGZJDbMAvxtiuMwx3w,
	Ramiro.Oliveira-HKixBCOQz3hWk0Htik3J/w,
	Joao.Pinto-HKixBCOQz3hWk0Htik3J/w,
	CARLOS.PALMINHA-HKixBCOQz3hWk0Htik3J/w
In-Reply-To: <c63cd48f7ae24747187f593b27b1b86ae361c436.1485452304.git.lolivei-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>

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On Thu, Jan 26, 2017 at 05:45:32PM +0000, Luis Oliveira wrote:
> This function has the purpose of mode detection by checking the
> device nodes for a reg matching with the I2C_OWN_SLAVE_ADDREESS flag.
> Currently only checks using OF functions (ACPI slave not supported yet).
> 
> Signed-off-by: Luis Oliveira <lolivei-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>
> Suggested-by: Andy Shevchenko <andy.shevchenko-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> Reviewed-by: Andy Shevchenko <andy.shevchenko-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

Applied to for-next, thanks!


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* Re: [v3] i2c: i2c-cros-ec-tunnel: Reduce logging noise
From: Wolfram Sang @ 2017-01-28 21:18 UTC (permalink / raw)
  To: Guenter Roeck; +Cc: dianders, linux-i2c, linux-kernel
In-Reply-To: <1469572441-25026-1-git-send-email-linux@roeck-us.net>

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On Tue, Jul 26, 2016 at 03:34:01PM -0700, Guenter Roeck wrote:
> If an i2c access through i2c-cros-ec-tunnel returns an error, the following
> log message is seen on the console.
> 
> cros-ec-i2c-tunnel ff200000.spi:ec@0:i2c-tunnel:
> 			Error parsing EC i2c message -121
> 
> This can happen a lot if, for example, the i2c-detect command is executed.
> 
> Since it is perfectly normal for an i2c controller to report an error,
> drop the message. Also, report -ENXIO instead of -EREMOTEIO if the access
> error is due to NAK from the device, and return -EIO instead of -EREMOTEIO
> for other errors, as suggested in Documentation/i2c/fault-codes.
> 
> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
> Reviewed-by: Douglas Anderson <dianders@chromium.org>

Applied to for-next, thanks!


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^ permalink raw reply

* Re: [PATCH i2c/for-next] i2c: sh_mobile: document support for r8a7796 (R-Car M3-W)
From: Wolfram Sang @ 2017-01-28 21:23 UTC (permalink / raw)
  To: Simon Horman; +Cc: Wolfram Sang, Magnus Damm, linux-i2c, linux-renesas-soc
In-Reply-To: <1485420451-11752-1-git-send-email-horms+renesas@verge.net.au>

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On Thu, Jan 26, 2017 at 09:47:31AM +0100, Simon Horman wrote:
> Explicitly list per-SoC binding for r8a7796. No driver change
> is required as the initialisation sequence is currently the same
> as for the R-Car Gen3 fallback binding.
> 
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Applied to for-next, thanks!


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* Re: [PATCH v4 2/3] i2c: acpi: Initialize info.type from of_compatible
From: Wolfram Sang @ 2017-01-28 21:38 UTC (permalink / raw)
  To: Dan O'Donovan
  Cc: linux-acpi, Andy Shevchenko, Rafael J . Wysocki, Jarkko Nikula,
	Mika Westerberg, Mark Brown, Len Brown, linux-i2c, linux-spi,
	linux-kernel, Crestez Dan Leonard
In-Reply-To: <1485523815-9629-3-git-send-email-dan@emutex.com>

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On Fri, Jan 27, 2017 at 01:30:14PM +0000, Dan O'Donovan wrote:
> From: Crestez Dan Leonard <leonard.crestez@intel.com>
> 
> When using devicetree i2c_board_info.type is set to the compatible
> string with the vendor prefix removed. For I2C devices described via
> ACPI the i2c_board_info.type string is set to the ACPI device name. When
> using ACPI and DT ids this string ends up something like "PRP0001:00".
> 
> If the of_compatible property is present try to use that instead. This
> makes it easier to instantiate i2c drivers through ACPI with DT ids.
> 
> Signed-off-by: Crestez Dan Leonard <leonard.crestez@intel.com>
> Signed-off-by: Dan O'Donovan <dan@emutex.com>
> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
> Reviewed-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
> Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>

I assume this shall go in as one series via ACPI tree, so:

Acked-by: Wolfram Sang <wsa@the-dreams.de>


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* [PULL REQUEST] i2c for 4.10
From: Wolfram Sang @ 2017-01-28 21:55 UTC (permalink / raw)
  To: Linus Torvalds; +Cc: linux-i2c, linux-kernel

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Linus,

here are two I2C driver bugfixes. The "VLLS mode support" patch should
have been entitled "reconfigure pinctrl after suspend" to make the
bugfix more clear. Sorry, I missed that, yet didn't want to rebase.

Please pull,

   Wolfram


The following changes since commit 7a308bb3016f57e5be11a677d15b821536419d36:

  Linux 4.10-rc5 (2017-01-22 12:54:15 -0800)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git i2c/for-current

for you to fetch changes up to e13fe92bb58cf9b8f709ec18267ffc9e6ffeb016:

  i2c: imx-lpi2c: add VLLS mode support (2017-01-26 00:24:23 +0100)

----------------------------------------------------------------
Gao Pan (1):
      i2c: imx-lpi2c: add VLLS mode support

Mike Looijmans (1):
      i2c: i2c-cadence: Initialize configuration before probing devices


with much appreciated quality assurance from
----------------------------------------------------------------
Vladimir Zapolskiy (1):
      (Rev.) i2c: imx-lpi2c: add VLLS mode support

 drivers/i2c/busses/i2c-cadence.c   |  8 ++++----
 drivers/i2c/busses/i2c-imx-lpi2c.c | 20 ++++++++++++++++++++
 2 files changed, 24 insertions(+), 4 deletions(-)

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* Re: [PATCH v8 07/12] dt-bindings: i2c: i2c-mux-simple: document i2c-mux-simple bindings
From: Peter Rosin @ 2017-01-28 22:42 UTC (permalink / raw)
  To: Rob Herring
  Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA, Wolfram Sang, Mark Rutland,
	Jonathan Cameron, Hartmut Knaack, Lars-Peter Clausen,
	Peter Meerwald-Stadler, Jonathan Corbet, Andrew Morton,
	linux-i2c-u79uwXL29TY76Z2rM5mHXA,
	devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-iio-u79uwXL29TY76Z2rM5mHXA,
	linux-doc-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20170127193917.6xuunrkjkqh4f2v7@rob-hp-laptop>

On 2017-01-27 20:39, Rob Herring wrote:
> On Wed, Jan 18, 2017 at 04:57:10PM +0100, Peter Rosin wrote:
>> Describe how a generic multiplexer controller is used to mux an i2c bus.
>>
>> Acked-by: Jonathan Cameron <jic23-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
>> Signed-off-by: Peter Rosin <peda-koto5C5qi+TLoDKTGw+V6w@public.gmane.org>
>> ---
>>  .../devicetree/bindings/i2c/i2c-mux-simple.txt     | 81 ++++++++++++++++++++++
>>  1 file changed, 81 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/i2c/i2c-mux-simple.txt
>>
>> diff --git a/Documentation/devicetree/bindings/i2c/i2c-mux-simple.txt b/Documentation/devicetree/bindings/i2c/i2c-mux-simple.txt
>> new file mode 100644
>> index 000000000000..253d5027843b
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/i2c/i2c-mux-simple.txt
>> @@ -0,0 +1,81 @@
>> +Simple I2C Bus Mux
>> +
>> +This binding describes an I2C bus multiplexer that uses a mux controller
>> +from the mux subsystem to route the I2C signals.
>> +
>> +                                  .-----.  .-----.
>> +                                  | dev |  | dev |
>> +    .------------.                '-----'  '-----'
>> +    | SoC        |                   |        |
>> +    |            |          .--------+--------'
>> +    |   .------. |  .------+    child bus A, on MUX value set to 0
>> +    |   | I2C  |-|--| Mux  |
>> +    |   '------' |  '--+---+    child bus B, on MUX value set to 1
>> +    |   .------. |     |    '----------+--------+--------.
>> +    |   | MUX- | |     |               |        |        |
>> +    |   | Ctrl |-|-----+            .-----.  .-----.  .-----.
>> +    |   '------' |                  | dev |  | dev |  | dev |
>> +    '------------'                  '-----'  '-----'  '-----'
>> +
>> +Required properties:
>> +- compatible: i2c-mux-simple,mux-locked or i2c-mux-simple,parent-locked
> 
> Not a fan of using "simple" nor the ','. Perhaps lock type should be 
> separate property.

How about just i2c-mux for the compatible? Because i2c-mux-mux (which
follows the naming of previous i2c muxes) looks really stupid. Or
perhaps i2c-mux-generic?

I'm also happy to have the lock type as a separate property. One lock
type, e.g. parent-locked, could be the default and adding a 'mux-locked'
property could change that. Would that be ok?

Or should it be a requirement that one of 'mux-locked'/'parent-locked'
is always present?

> I'm not sure I get the mux vs. parent locked fully. How do I determine 
> what type I have? We already have bindings for several types of i2c 
> muxes. How does the locking annotation fit into those?

We have briefly discussed this before [1] in the context of i2c-mux-gpio
and i2c-mux-pinctrl, when I added the mux-locked/parent-locked distinction
to the i2c-mux infrastructure (it wasn't named mux-locked/parent-locked
way back then though). There is more detail on what the difference is
between the two in Documentation/i2c/i2c-topology.

Side note regarding your remark "use an I2C controlled mux instead"; it
appears that I'm not alone [2] with this kind of requirement...

[1] https://lkml.org/lkml/2016/1/6/437
[2] http://marc.info/?t=147877959100002&r=1&w=2

But, now that I have pondered on this for a year or so, I firmly
believe it was a mistake to have the code in i2c-mux-gpio and
i2c-mux-pinctrl automatically try to deduce if the mux should be
mux-locked or parent-locked. It might be easy to make that call
in some trivial cases, but it is not difficult to dream up
scenarios where it would be extremely hard for the code to get
this decision right. It's just fragile. But now we have code in
those two muxes that has unwanted tentacles into the guts of the
gpio and pinctrl subsystems. Hopefully those unwanted tentacles
can be replaced with something based on device links? However, it
is still not hard to come up with scenarios that will require
manual intervention in order to select the right kind of i2c mux
locking. So, I fear that we have inadequate code trying to make a
decision automatically, and that we at some point down the line
will have some impossible case needing a binding that trumps the
heuristic. Why have a heuristic at all in that case? In short, it
should have been a binding from the start, methinks.

That was a long rant regarding i2c-mux-gpio and i2c-mux-pinctrl.
I obviously think it is bad to have this new i2c mux go in the
same direction as those two drivers. I.e. I think a binding that
specifies the desired locking is preferable to any attempted
heuristic.

Cheers,
peda

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