Re: I3C Mastership RFC

Przemyslaw Gaj
2019-11-14T06:13:51Z

Hi Vitor,

The 11/12/2019 08:41, Boris Brezillon wrote:
>
> Hi Vitor,
>
> On Mon, 11 Nov 2019 12:30:45 +0000
> Vitor Soares <Vitor.Soares@synopsys.com> wrote:
>
> > Hi Boris and Przemek,
> >
> > I have a working version for tests purposes. Yet, I have some basic TODOS
> > to address during the takeover of the bus.
>
> Okay. Would you mind sharing a branch with this material so Przemek and
> I can have a look at it?

So, Vitor, can you share your changes? Can you tell me what you had to
change to make it work? Also, which patch version is this based on?

>
> >
> > I don't know if you are aware but the secondary master feature
> > description was improved for the spec v1.1 and it makes sense to take a
> > look on that.
>
> Unfortunately I don't have access to non-public specs, but I guess
> Przemek has access to it. Any specific details you want to share
> regarding secondary master/mastership handover in v1.1?

Yes, that's it. Regarding secondary master features, the description is
improved, mostly clarified IMO.

>
> >
> > Regarding the current approach (at least last Patch series and what I
> > did) I still don't know if it is the best solution.
>
> That's exactly what we're trying to sort out :-).
>
> > I remember in the beginning of secondary master support I discuss with
> > Boris about USB OTG vs I2C slave mode and now having a better
> > understanding how USB OTG works I think we should address secondary
> > master in a similar way.
>
> I don't remember mentioning OTG. I did mention the USB gadget model
> which I thought was a good approach for the I3C slave feature, but
> AFAICT, OTG is quite different from the I3C mastership handover
> mechanism. Master/slave selection in OTG is based on a pin (ID pin
> IIRC), and AFAIR the device can't change role dynamically (it has to be
> unplugged). Can you be more specific about what you think should be
> taken from the OTG approach?
>
> > At least for me it seems to be more modular and
> > ease to expand.
>
> I keep thinking we won't be able to address both things at the same
> time. As I said many times, I3C slave support sounds orthogonal to the
> I3C mastership handover bits. I know the master acts as a 'slave' when
> it doesn't own the bus, but it's a rather specific slave profile (at
> least if the secondary master only implements the master profile) where
> only MR events can be sent/received. I don't think we should expose it
> as an I3C slave (or gadget if we make an analogy with the USB subsystem)
> in that case.
>
> Can we please focus on I3C mastership handover here, and put I3C slave
> support on the side. BTW, if you have a draft for the I3C slave
> framework, don't hesitate to post it, that's something we can review in
> parallel.
>
> Regards,
>
> Boris

--
--
Regards,
Przemek