[PATCH 0/4] i3c: master: svc: some bug fixes

Clark Wang
2021-07-15T08:23:10Z

Hi,

I am using SVC I3C module recently. I fix some problems and also have a
question.

My question is:
Can I3C bus support pure I2C mode in kernel?
Or in other words, in mixed mode, must there be at least one I3C device on
the I3C bus?

The pure I3C mode works fine. But when only have one I2C device on the
I3C bus, the probe in function i3c_master_bus_init() will go error. Because
there is no one on I3C bus can ACK the I3C message with I3C message speed. Then
it will return error at function i3c_master_rstdaa_locked() because of no ACK
for 0x7e start byte.
When I use the following dtb configuration, the above problem occurs.
&i3c2 {
#address-cells = <3>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i3c2>;
i2c-scl-hz = <400000>;
status = "okay";

lsm6dso_i2c: imu@6a {
compatible = "st,lsm6dso";
reg = <0x6a 0x0 0x50>;
};
};

But I saw a similar configuration example in
/home/nxf47749/work/kernel/i3c/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.txt.
I wonder if that can work normally?

I know the definition in the specification is:
Mixed xxx Bus: I3C Bus topology with both I2C and I3C Devices present
on the I3C Bus...
But I think it is feasible to use pure I2C mode with I3C module.
I am not sure why the use of pure I2C mode is restricted in the software.

If there are errors in my ideas, please correct me in time. Thank you all.

Here are the fixes.

Clark Wang (4):
i3c: master: svc: move module reset behind clk enable
i3c: master: svc: fix atomic issue
i3c: master: svc: add support for slave to stop returning data
i3c: master: svc: set ODSTOP to let I2C device see the STOP signal

drivers/i3c/master/svc-i3c-master.c | 45 +++++++++++++++++++----------
1 file changed, 30 insertions(+), 15 deletions(-)

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2.25.1