RE: [PATCH V2 2/2] i3c: master: Add AMD I3C bus controller driver

Guntupalli, Manikanta
2025-09-14T20:33:30Z

[AMD Official Use Only - AMD Internal Distribution Only]

Hi,

> -----Original Message-----
> From: Alexandre Belloni <alexandre.belloni@bootlin.com>
> Sent: Tuesday, September 2, 2025 1:43 AM
> To: Guntupalli, Manikanta <manikanta.guntupalli@amd.com>
> Cc: git (AMD-Xilinx) <git@amd.com>; Simek, Michal <michal.simek@amd.com>;
> Frank.Li@nxp.com; robh@kernel.org; krzk+dt@kernel.org; conor+dt@kernel.org;
> kees@kernel.org; gustavoars@kernel.org; jarkko.nikula@linux.intel.com; linux-
> i3c@lists.infradead.org; devicetree@vger.kernel.org; linux-kernel@vger.kernel.org;
> linux-hardening@vger.kernel.org; Pandey, Radhey Shyam
> <radhey.shyam.pandey@amd.com>; Goud, Srinivas <srinivas.goud@amd.com>;
> Datta, Shubhrajyoti <shubhrajyoti.datta@amd.com>; manion05gk@gmail.com
> Subject: Re: [PATCH V2 2/2] i3c: master: Add AMD I3C bus controller driver
>
> On 29/08/2025 22:43:27+0530, Manikanta Guntupalli wrote:
> > +static void xi3c_master_reset_fifos(struct xi3c_master *master) {
> > + u32 data;
> > +
> > + /* Reset fifos */
> > + data = readl(master->membase + XI3C_RESET_OFFSET);
> > + data |= XI3C_FIFOS_RST_MASK;
> > + writel(data, master->membase + XI3C_RESET_OFFSET);
> > + udelay(10);
>
> As pointed out by checkpatch:
> usleep_range is preferred over udelay, I guess it would be fine in this function.
In the error path, xi3c_master_reinit() gets called, which in turn calls xi3c_master_reset_fifos(). Since a spinlock is held at that point, we cannot sleep. Therefore, udelay() is used intentionally to avoid sleep.
>
> > + data &= ~XI3C_FIFOS_RST_MASK;
> > + writel(data, master->membase + XI3C_RESET_OFFSET);
> > + udelay(10);
> > +}
> > +
>
> --

Thanks,
Manikanta.