[PATCH 00/17] i3c: mipi-i3c-hci-pci: Add Runtime PM support

[PATCH 00/17] i3c: mipi-i3c-hci-pci: Add Runtime PM support

[Adrian Hunter]

Hi

This patch set adds Runtime PM support to mipi-i3c-hci and
mipi-i3c-hci-pci.

Notably, the master core is enhanced to optionally support
doing the RPM gets/puts needed to ensure a device is runtime
resumed for all bus operations.  That alleviates mipi-i3c-hci
from having to do it, and if the approach is accepted, would
allow other master drivers to drop their RPM gets/puts.

There are a number of small patches making various improvements
for things hit during development.  Plus a bunch of patches
preparing for the main changes which are covered in the last 3
patches.


Adrian Hunter (17):
      i3c: mipi-i3c-hci: Reset RING_OPERATION1 fields during init
      i3c: mipi-i3c-hci: Ensure proper bus clean-up
      i3c: master: Update hot-join flag only on success
      i3c: master: Replace WARN_ON() with dev_err() in i3c_dev_free_ibi_locked()
      i3c: mipi-i3c-hci: Switch DAT bitmap allocation to devm_bitmap_zalloc()
      i3c: mipi-i3c-hci: Switch PIO data allocation to devm_kzalloc()
      i3c: mipi-i3c-hci: Manage DMA deallocation via devres action
      i3c: mipi-i3c-hci: Cache DAT in memory for Runtime PM restore
      i3c: mipi-i3c-hci: Introduce helper to restore DAT
      i3c: mipi-i3c-hci: Extract ring initialization from hci_dma_init()
      i3c: mipi-i3c-hci: Add DMA suspend and resume support
      i3c: mipi-i3c-hci: Refactor PIO register initialization
      i3c: mipi-i3c-hci: Add PIO suspend and resume support
      i3c: mipi-i3c-hci: Factor out software reset into helper
      i3c: master: Introduce optional Runtime PM support
      i3c: mipi-i3c-hci: Add optional Runtime PM support
      i3c: mipi-i3c-hci-pci: Add Runtime PM support

 drivers/i3c/device.c                               |  46 +++++-
 drivers/i3c/internals.h                            |   4 +
 drivers/i3c/master.c                               | 101 +++++++++++-
 drivers/i3c/master/mipi-i3c-hci/core.c             | 171 +++++++++++++++++---
 drivers/i3c/master/mipi-i3c-hci/dat.h              |   2 +-
 drivers/i3c/master/mipi-i3c-hci/dat_v1.c           |  45 ++++--
 drivers/i3c/master/mipi-i3c-hci/dma.c              | 179 +++++++++++++++------
 drivers/i3c/master/mipi-i3c-hci/hci.h              |  11 ++
 drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c |  17 ++
 drivers/i3c/master/mipi-i3c-hci/pio.c              |  63 +++++---
 include/linux/i3c/master.h                         |   4 +
 11 files changed, 530 insertions(+), 113 deletions(-)


Regards
Adrian

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[PATCH 01/17] i3c: mipi-i3c-hci: Reset RING_OPERATION1 fields during init

[Adrian Hunter]

The MIPI I3C HCI specification does not define reset values for
RING_OPERATION1 fields, and some controllers (e.g., Intel) do not clear
them during a software reset.  Ensure the ring pointers are explicitly
set to zero during bus initialization to avoid inconsistent state.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
---
 drivers/i3c/master/mipi-i3c-hci/dma.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/i3c/master/mipi-i3c-hci/dma.c b/drivers/i3c/master/mipi-i3c-hci/dma.c
index 0f6bbe184e85..5515ed740ca4 100644
--- a/drivers/i3c/master/mipi-i3c-hci/dma.c
+++ b/drivers/i3c/master/mipi-i3c-hci/dma.c
@@ -340,6 +340,14 @@ static int hci_dma_init(struct i3c_hci *hci)
 		rh_reg_write(INTR_SIGNAL_ENABLE, regval);
 
 ring_ready:
+		/*
+		 * The MIPI I3C HCI specification does not document reset values for
+		 * RING_OPERATION1 fields and some controllers (e.g. Intel controllers)
+		 * do not reset the values, so ensure the ring pointers are set to zero
+		 * here.
+		 */
+		rh_reg_write(RING_OPERATION1, 0);
+
 		rh_reg_write(RING_CONTROL, RING_CTRL_ENABLE |
 					   RING_CTRL_RUN_STOP);
 	}
-- 
2.51.0


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Re: [PATCH 01/17] i3c: mipi-i3c-hci: Reset RING_OPERATION1 fields during init

[Frank Li]

On Fri, Dec 19, 2025 at 04:45:18PM +0200, Adrian Hunter wrote:
> The MIPI I3C HCI specification does not define reset values for
> RING_OPERATION1 fields, and some controllers (e.g., Intel) do not clear
> them during a software reset.  Ensure the ring pointers are explicitly
> set to zero during bus initialization to avoid inconsistent state.
>
> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
> ---

Reviewed-by: Frank Li <Frank.Li@nxp.com>

>  drivers/i3c/master/mipi-i3c-hci/dma.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
>
> diff --git a/drivers/i3c/master/mipi-i3c-hci/dma.c b/drivers/i3c/master/mipi-i3c-hci/dma.c
> index 0f6bbe184e85..5515ed740ca4 100644
> --- a/drivers/i3c/master/mipi-i3c-hci/dma.c
> +++ b/drivers/i3c/master/mipi-i3c-hci/dma.c
> @@ -340,6 +340,14 @@ static int hci_dma_init(struct i3c_hci *hci)
>  		rh_reg_write(INTR_SIGNAL_ENABLE, regval);
>
>  ring_ready:
> +		/*
> +		 * The MIPI I3C HCI specification does not document reset values for
> +		 * RING_OPERATION1 fields and some controllers (e.g. Intel controllers)
> +		 * do not reset the values, so ensure the ring pointers are set to zero
> +		 * here.
> +		 */
> +		rh_reg_write(RING_OPERATION1, 0);
> +
>  		rh_reg_write(RING_CONTROL, RING_CTRL_ENABLE |
>  					   RING_CTRL_RUN_STOP);
>  	}
> --
> 2.51.0
>
>
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[PATCH 02/17] i3c: mipi-i3c-hci: Ensure proper bus clean-up

[Adrian Hunter]

Wait for the bus to fully disable before proceeding, ensuring that no
operations are still in progress.  Synchronize the IRQ handler only after
interrupt signals have been disabled.  This approach also handles cases
where bus disable might fail, preventing race conditions and ensuring a
consistent shutdown sequence.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
---
 drivers/i3c/master/mipi-i3c-hci/core.c | 32 +++++++++++++++++++++++---
 drivers/i3c/master/mipi-i3c-hci/dma.c  |  7 ++++++
 drivers/i3c/master/mipi-i3c-hci/hci.h  |  1 +
 drivers/i3c/master/mipi-i3c-hci/pio.c  |  2 ++
 4 files changed, 39 insertions(+), 3 deletions(-)

diff --git a/drivers/i3c/master/mipi-i3c-hci/core.c b/drivers/i3c/master/mipi-i3c-hci/core.c
index 6da5daf18166..0d3ec674878d 100644
--- a/drivers/i3c/master/mipi-i3c-hci/core.c
+++ b/drivers/i3c/master/mipi-i3c-hci/core.c
@@ -151,13 +151,39 @@ static int i3c_hci_bus_init(struct i3c_master_controller *m)
 	return 0;
 }
 
+/* Bus disable should never fail, so be generous with the timeout */
+#define BUS_DISABLE_TIMEOUT_US (500 * USEC_PER_MSEC)
+
+static int i3c_hci_bus_disable(struct i3c_hci *hci)
+{
+	u32 regval;
+	int ret;
+
+	reg_clear(HC_CONTROL, HC_CONTROL_BUS_ENABLE);
+
+	/* Ensure controller is disabled */
+	ret = readx_poll_timeout(reg_read, HC_CONTROL, regval,
+				 !(regval & HC_CONTROL_BUS_ENABLE), 0, BUS_DISABLE_TIMEOUT_US);
+	if (ret)
+		dev_err(&hci->master.dev, "%s: Failed to disable bus\n", __func__);
+
+	return ret;
+}
+
+void i3c_hci_sync_irq_inactive(struct i3c_hci *hci)
+{
+	struct platform_device *pdev = to_platform_device(hci->master.dev.parent);
+	int irq = platform_get_irq(pdev, 0);
+
+	reg_write(INTR_SIGNAL_ENABLE, 0x0);
+	synchronize_irq(irq);
+}
+
 static void i3c_hci_bus_cleanup(struct i3c_master_controller *m)
 {
 	struct i3c_hci *hci = to_i3c_hci(m);
-	struct platform_device *pdev = to_platform_device(m->dev.parent);
 
-	reg_clear(HC_CONTROL, HC_CONTROL_BUS_ENABLE);
-	synchronize_irq(platform_get_irq(pdev, 0));
+	i3c_hci_bus_disable(hci);
 	hci->io->cleanup(hci);
 	if (hci->cmd == &mipi_i3c_hci_cmd_v1)
 		mipi_i3c_hci_dat_v1.cleanup(hci);
diff --git a/drivers/i3c/master/mipi-i3c-hci/dma.c b/drivers/i3c/master/mipi-i3c-hci/dma.c
index 5515ed740ca4..54849aa98fad 100644
--- a/drivers/i3c/master/mipi-i3c-hci/dma.c
+++ b/drivers/i3c/master/mipi-i3c-hci/dma.c
@@ -160,6 +160,13 @@ static void hci_dma_cleanup(struct i3c_hci *hci)
 
 		rh_reg_write(INTR_SIGNAL_ENABLE, 0);
 		rh_reg_write(RING_CONTROL, 0);
+	}
+
+	i3c_hci_sync_irq_inactive(hci);
+
+	for (i = 0; i < rings->total; i++) {
+		rh = &rings->headers[i];
+
 		rh_reg_write(CR_SETUP, 0);
 		rh_reg_write(IBI_SETUP, 0);
 
diff --git a/drivers/i3c/master/mipi-i3c-hci/hci.h b/drivers/i3c/master/mipi-i3c-hci/hci.h
index 3f88b67bc5cc..fd08b701d094 100644
--- a/drivers/i3c/master/mipi-i3c-hci/hci.h
+++ b/drivers/i3c/master/mipi-i3c-hci/hci.h
@@ -142,5 +142,6 @@ void mipi_i3c_hci_pio_reset(struct i3c_hci *hci);
 void mipi_i3c_hci_dct_index_reset(struct i3c_hci *hci);
 void amd_set_od_pp_timing(struct i3c_hci *hci);
 void amd_set_resp_buf_thld(struct i3c_hci *hci);
+void i3c_hci_sync_irq_inactive(struct i3c_hci *hci);
 
 #endif
diff --git a/drivers/i3c/master/mipi-i3c-hci/pio.c b/drivers/i3c/master/mipi-i3c-hci/pio.c
index 109c6c5d83d6..90dca56fc0c5 100644
--- a/drivers/i3c/master/mipi-i3c-hci/pio.c
+++ b/drivers/i3c/master/mipi-i3c-hci/pio.c
@@ -211,6 +211,8 @@ static void hci_pio_cleanup(struct i3c_hci *hci)
 
 	pio_reg_write(INTR_SIGNAL_ENABLE, 0x0);
 
+	i3c_hci_sync_irq_inactive(hci);
+
 	if (pio) {
 		dev_dbg(&hci->master.dev, "status = %#x/%#x",
 			pio_reg_read(INTR_STATUS), pio_reg_read(INTR_SIGNAL_ENABLE));
-- 
2.51.0


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Re: [PATCH 02/17] i3c: mipi-i3c-hci: Ensure proper bus clean-up

[Frank Li]

On Fri, Dec 19, 2025 at 04:45:19PM +0200, Adrian Hunter wrote:
> Wait for the bus to fully disable before proceeding, ensuring that no
> operations are still in progress.  Synchronize the IRQ handler only after
> interrupt signals have been disabled.  This approach also handles cases
> where bus disable might fail, preventing race conditions and ensuring a
> consistent shutdown sequence.
>
> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
> ---

Reviewed-by: Frank Li <Frank.Li@nxp.com>

>  drivers/i3c/master/mipi-i3c-hci/core.c | 32 +++++++++++++++++++++++---
>  drivers/i3c/master/mipi-i3c-hci/dma.c  |  7 ++++++
>  drivers/i3c/master/mipi-i3c-hci/hci.h  |  1 +
>  drivers/i3c/master/mipi-i3c-hci/pio.c  |  2 ++
>  4 files changed, 39 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/i3c/master/mipi-i3c-hci/core.c b/drivers/i3c/master/mipi-i3c-hci/core.c
> index 6da5daf18166..0d3ec674878d 100644
> --- a/drivers/i3c/master/mipi-i3c-hci/core.c
> +++ b/drivers/i3c/master/mipi-i3c-hci/core.c
> @@ -151,13 +151,39 @@ static int i3c_hci_bus_init(struct i3c_master_controller *m)
>  	return 0;
>  }
>
> +/* Bus disable should never fail, so be generous with the timeout */
> +#define BUS_DISABLE_TIMEOUT_US (500 * USEC_PER_MSEC)
> +
> +static int i3c_hci_bus_disable(struct i3c_hci *hci)
> +{
> +	u32 regval;
> +	int ret;
> +
> +	reg_clear(HC_CONTROL, HC_CONTROL_BUS_ENABLE);
> +
> +	/* Ensure controller is disabled */
> +	ret = readx_poll_timeout(reg_read, HC_CONTROL, regval,
> +				 !(regval & HC_CONTROL_BUS_ENABLE), 0, BUS_DISABLE_TIMEOUT_US);
> +	if (ret)
> +		dev_err(&hci->master.dev, "%s: Failed to disable bus\n", __func__);
> +
> +	return ret;
> +}
> +
> +void i3c_hci_sync_irq_inactive(struct i3c_hci *hci)
> +{
> +	struct platform_device *pdev = to_platform_device(hci->master.dev.parent);
> +	int irq = platform_get_irq(pdev, 0);
> +
> +	reg_write(INTR_SIGNAL_ENABLE, 0x0);
> +	synchronize_irq(irq);
> +}
> +
>  static void i3c_hci_bus_cleanup(struct i3c_master_controller *m)
>  {
>  	struct i3c_hci *hci = to_i3c_hci(m);
> -	struct platform_device *pdev = to_platform_device(m->dev.parent);
>
> -	reg_clear(HC_CONTROL, HC_CONTROL_BUS_ENABLE);
> -	synchronize_irq(platform_get_irq(pdev, 0));
> +	i3c_hci_bus_disable(hci);
>  	hci->io->cleanup(hci);
>  	if (hci->cmd == &mipi_i3c_hci_cmd_v1)
>  		mipi_i3c_hci_dat_v1.cleanup(hci);
> diff --git a/drivers/i3c/master/mipi-i3c-hci/dma.c b/drivers/i3c/master/mipi-i3c-hci/dma.c
> index 5515ed740ca4..54849aa98fad 100644
> --- a/drivers/i3c/master/mipi-i3c-hci/dma.c
> +++ b/drivers/i3c/master/mipi-i3c-hci/dma.c
> @@ -160,6 +160,13 @@ static void hci_dma_cleanup(struct i3c_hci *hci)
>
>  		rh_reg_write(INTR_SIGNAL_ENABLE, 0);
>  		rh_reg_write(RING_CONTROL, 0);
> +	}
> +
> +	i3c_hci_sync_irq_inactive(hci);
> +
> +	for (i = 0; i < rings->total; i++) {
> +		rh = &rings->headers[i];
> +
>  		rh_reg_write(CR_SETUP, 0);
>  		rh_reg_write(IBI_SETUP, 0);
>
> diff --git a/drivers/i3c/master/mipi-i3c-hci/hci.h b/drivers/i3c/master/mipi-i3c-hci/hci.h
> index 3f88b67bc5cc..fd08b701d094 100644
> --- a/drivers/i3c/master/mipi-i3c-hci/hci.h
> +++ b/drivers/i3c/master/mipi-i3c-hci/hci.h
> @@ -142,5 +142,6 @@ void mipi_i3c_hci_pio_reset(struct i3c_hci *hci);
>  void mipi_i3c_hci_dct_index_reset(struct i3c_hci *hci);
>  void amd_set_od_pp_timing(struct i3c_hci *hci);
>  void amd_set_resp_buf_thld(struct i3c_hci *hci);
> +void i3c_hci_sync_irq_inactive(struct i3c_hci *hci);
>
>  #endif
> diff --git a/drivers/i3c/master/mipi-i3c-hci/pio.c b/drivers/i3c/master/mipi-i3c-hci/pio.c
> index 109c6c5d83d6..90dca56fc0c5 100644
> --- a/drivers/i3c/master/mipi-i3c-hci/pio.c
> +++ b/drivers/i3c/master/mipi-i3c-hci/pio.c
> @@ -211,6 +211,8 @@ static void hci_pio_cleanup(struct i3c_hci *hci)
>
>  	pio_reg_write(INTR_SIGNAL_ENABLE, 0x0);
>
> +	i3c_hci_sync_irq_inactive(hci);
> +
>  	if (pio) {
>  		dev_dbg(&hci->master.dev, "status = %#x/%#x",
>  			pio_reg_read(INTR_STATUS), pio_reg_read(INTR_SIGNAL_ENABLE));
> --
> 2.51.0
>
>
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[PATCH 03/17] i3c: master: Update hot-join flag only on success

[Adrian Hunter]

To prevent inconsistent state when an error occurs, ensure the hot-join
flag is updated only when enabling or disabling hot-join succeeds.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
---
 drivers/i3c/master.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c
index 7f606c871648..e6384bffd4ae 100644
--- a/drivers/i3c/master.c
+++ b/drivers/i3c/master.c
@@ -618,7 +618,8 @@ static int i3c_set_hotjoin(struct i3c_master_controller *master, bool enable)
 	else
 		ret = master->ops->disable_hotjoin(master);
 
-	master->hotjoin = enable;
+	if (!ret)
+		master->hotjoin = enable;
 
 	i3c_bus_normaluse_unlock(&master->bus);
 
-- 
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Re: [PATCH 03/17] i3c: master: Update hot-join flag only on success

[Frank Li]

On Fri, Dec 19, 2025 at 04:45:20PM +0200, Adrian Hunter wrote:
> To prevent inconsistent state when an error occurs, ensure the hot-join
> flag is updated only when enabling or disabling hot-join succeeds.
>
> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
> ---

It should be bug fix. put fix tag.

Frank

>  drivers/i3c/master.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c
> index 7f606c871648..e6384bffd4ae 100644
> --- a/drivers/i3c/master.c
> +++ b/drivers/i3c/master.c
> @@ -618,7 +618,8 @@ static int i3c_set_hotjoin(struct i3c_master_controller *master, bool enable)
>  	else
>  		ret = master->ops->disable_hotjoin(master);
>
> -	master->hotjoin = enable;
> +	if (!ret)
> +		master->hotjoin = enable;
>
>  	i3c_bus_normaluse_unlock(&master->bus);
>
> --
> 2.51.0
>
>
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[PATCH 04/17] i3c: master: Replace WARN_ON() with dev_err() in i3c_dev_free_ibi_locked()

[Adrian Hunter]

IBI disable failures are not indicative of a software bug, so using
WARN_ON() is not appropriate.  Replace these warnings with dev_err().

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
---
 drivers/i3c/master.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c
index e6384bffd4ae..ff6cbc044787 100644
--- a/drivers/i3c/master.c
+++ b/drivers/i3c/master.c
@@ -3113,8 +3113,11 @@ void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev)
 	if (!dev->ibi)
 		return;
 
-	if (WARN_ON(dev->ibi->enabled))
-		WARN_ON(i3c_dev_disable_ibi_locked(dev));
+	if (dev->ibi->enabled) {
+		dev_err(&master->dev, "Freeing IBI that is still enabled\n");
+		if (i3c_dev_disable_ibi_locked(dev))
+			dev_err(&master->dev, "Failed to disable IBI before freeing\n");
+	}
 
 	master->ops->free_ibi(dev);
 
-- 
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Re: [PATCH 04/17] i3c: master: Replace WARN_ON() with dev_err() in i3c_dev_free_ibi_locked()

[Frank Li]

On Fri, Dec 19, 2025 at 04:45:21PM +0200, Adrian Hunter wrote:
> IBI disable failures are not indicative of a software bug, so using
> WARN_ON() is not appropriate.  Replace these warnings with dev_err().
>
> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
> ---

Reviewed-by: Frank Li <Frank.Li@nxp.com>

>  drivers/i3c/master.c | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c
> index e6384bffd4ae..ff6cbc044787 100644
> --- a/drivers/i3c/master.c
> +++ b/drivers/i3c/master.c
> @@ -3113,8 +3113,11 @@ void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev)
>  	if (!dev->ibi)
>  		return;
>
> -	if (WARN_ON(dev->ibi->enabled))
> -		WARN_ON(i3c_dev_disable_ibi_locked(dev));
> +	if (dev->ibi->enabled) {
> +		dev_err(&master->dev, "Freeing IBI that is still enabled\n");
> +		if (i3c_dev_disable_ibi_locked(dev))
> +			dev_err(&master->dev, "Failed to disable IBI before freeing\n");
> +	}
>
>  	master->ops->free_ibi(dev);
>
> --
> 2.51.0
>
>
> --
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[PATCH 05/17] i3c: mipi-i3c-hci: Switch DAT bitmap allocation to devm_bitmap_zalloc()

[Adrian Hunter]

The driver already uses managed resources, so convert the Device Address
Table (DAT) bitmap allocation to use devm_bitmap_zalloc().  Remove the
manual cleanup routine.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
---
 drivers/i3c/master/mipi-i3c-hci/core.c   |  2 --
 drivers/i3c/master/mipi-i3c-hci/dat.h    |  1 -
 drivers/i3c/master/mipi-i3c-hci/dat_v1.c | 11 +++--------
 3 files changed, 3 insertions(+), 11 deletions(-)

diff --git a/drivers/i3c/master/mipi-i3c-hci/core.c b/drivers/i3c/master/mipi-i3c-hci/core.c
index 0d3ec674878d..c4b249fde764 100644
--- a/drivers/i3c/master/mipi-i3c-hci/core.c
+++ b/drivers/i3c/master/mipi-i3c-hci/core.c
@@ -185,8 +185,6 @@ static void i3c_hci_bus_cleanup(struct i3c_master_controller *m)
 
 	i3c_hci_bus_disable(hci);
 	hci->io->cleanup(hci);
-	if (hci->cmd == &mipi_i3c_hci_cmd_v1)
-		mipi_i3c_hci_dat_v1.cleanup(hci);
 }
 
 void mipi_i3c_hci_resume(struct i3c_hci *hci)
diff --git a/drivers/i3c/master/mipi-i3c-hci/dat.h b/drivers/i3c/master/mipi-i3c-hci/dat.h
index 1f0f345c3daf..5277c65fc601 100644
--- a/drivers/i3c/master/mipi-i3c-hci/dat.h
+++ b/drivers/i3c/master/mipi-i3c-hci/dat.h
@@ -17,7 +17,6 @@
 
 struct hci_dat_ops {
 	int (*init)(struct i3c_hci *hci);
-	void (*cleanup)(struct i3c_hci *hci);
 	int (*alloc_entry)(struct i3c_hci *hci);
 	void (*free_entry)(struct i3c_hci *hci, unsigned int dat_idx);
 	void (*set_dynamic_addr)(struct i3c_hci *hci, unsigned int dat_idx, u8 addr);
diff --git a/drivers/i3c/master/mipi-i3c-hci/dat_v1.c b/drivers/i3c/master/mipi-i3c-hci/dat_v1.c
index cc5d2deb23ab..c60ef5d77ca3 100644
--- a/drivers/i3c/master/mipi-i3c-hci/dat_v1.c
+++ b/drivers/i3c/master/mipi-i3c-hci/dat_v1.c
@@ -55,8 +55,10 @@ static int hci_dat_v1_init(struct i3c_hci *hci)
 	}
 
 	if (!hci->DAT_data) {
+		struct device *dev = hci->master.dev.parent;
+
 		/* use a bitmap for faster free slot search */
-		hci->DAT_data = bitmap_zalloc(hci->DAT_entries, GFP_KERNEL);
+		hci->DAT_data = devm_bitmap_zalloc(dev, hci->DAT_entries, GFP_KERNEL);
 		if (!hci->DAT_data)
 			return -ENOMEM;
 
@@ -70,12 +72,6 @@ static int hci_dat_v1_init(struct i3c_hci *hci)
 	return 0;
 }
 
-static void hci_dat_v1_cleanup(struct i3c_hci *hci)
-{
-	bitmap_free(hci->DAT_data);
-	hci->DAT_data = NULL;
-}
-
 static int hci_dat_v1_alloc_entry(struct i3c_hci *hci)
 {
 	unsigned int dat_idx;
@@ -170,7 +166,6 @@ static int hci_dat_v1_get_index(struct i3c_hci *hci, u8 dev_addr)
 
 const struct hci_dat_ops mipi_i3c_hci_dat_v1 = {
 	.init			= hci_dat_v1_init,
-	.cleanup		= hci_dat_v1_cleanup,
 	.alloc_entry		= hci_dat_v1_alloc_entry,
 	.free_entry		= hci_dat_v1_free_entry,
 	.set_dynamic_addr	= hci_dat_v1_set_dynamic_addr,
-- 
2.51.0


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Re: [PATCH 05/17] i3c: mipi-i3c-hci: Switch DAT bitmap allocation to devm_bitmap_zalloc()

[Frank Li]

On Fri, Dec 19, 2025 at 04:45:22PM +0200, Adrian Hunter wrote:
> The driver already uses managed resources, so convert the Device Address
> Table (DAT) bitmap allocation to use devm_bitmap_zalloc().  Remove the
> manual cleanup routine.
>
> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
> ---

Reviewed-by: Frank Li <Frank.Li@nxp.com>

>  drivers/i3c/master/mipi-i3c-hci/core.c   |  2 --
>  drivers/i3c/master/mipi-i3c-hci/dat.h    |  1 -
>  drivers/i3c/master/mipi-i3c-hci/dat_v1.c | 11 +++--------
>  3 files changed, 3 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/i3c/master/mipi-i3c-hci/core.c b/drivers/i3c/master/mipi-i3c-hci/core.c
> index 0d3ec674878d..c4b249fde764 100644
> --- a/drivers/i3c/master/mipi-i3c-hci/core.c
> +++ b/drivers/i3c/master/mipi-i3c-hci/core.c
> @@ -185,8 +185,6 @@ static void i3c_hci_bus_cleanup(struct i3c_master_controller *m)
>
>  	i3c_hci_bus_disable(hci);
>  	hci->io->cleanup(hci);
> -	if (hci->cmd == &mipi_i3c_hci_cmd_v1)
> -		mipi_i3c_hci_dat_v1.cleanup(hci);
>  }
>
>  void mipi_i3c_hci_resume(struct i3c_hci *hci)
> diff --git a/drivers/i3c/master/mipi-i3c-hci/dat.h b/drivers/i3c/master/mipi-i3c-hci/dat.h
> index 1f0f345c3daf..5277c65fc601 100644
> --- a/drivers/i3c/master/mipi-i3c-hci/dat.h
> +++ b/drivers/i3c/master/mipi-i3c-hci/dat.h
> @@ -17,7 +17,6 @@
>
>  struct hci_dat_ops {
>  	int (*init)(struct i3c_hci *hci);
> -	void (*cleanup)(struct i3c_hci *hci);
>  	int (*alloc_entry)(struct i3c_hci *hci);
>  	void (*free_entry)(struct i3c_hci *hci, unsigned int dat_idx);
>  	void (*set_dynamic_addr)(struct i3c_hci *hci, unsigned int dat_idx, u8 addr);
> diff --git a/drivers/i3c/master/mipi-i3c-hci/dat_v1.c b/drivers/i3c/master/mipi-i3c-hci/dat_v1.c
> index cc5d2deb23ab..c60ef5d77ca3 100644
> --- a/drivers/i3c/master/mipi-i3c-hci/dat_v1.c
> +++ b/drivers/i3c/master/mipi-i3c-hci/dat_v1.c
> @@ -55,8 +55,10 @@ static int hci_dat_v1_init(struct i3c_hci *hci)
>  	}
>
>  	if (!hci->DAT_data) {
> +		struct device *dev = hci->master.dev.parent;
> +
>  		/* use a bitmap for faster free slot search */
> -		hci->DAT_data = bitmap_zalloc(hci->DAT_entries, GFP_KERNEL);
> +		hci->DAT_data = devm_bitmap_zalloc(dev, hci->DAT_entries, GFP_KERNEL);
>  		if (!hci->DAT_data)
>  			return -ENOMEM;
>
> @@ -70,12 +72,6 @@ static int hci_dat_v1_init(struct i3c_hci *hci)
>  	return 0;
>  }
>
> -static void hci_dat_v1_cleanup(struct i3c_hci *hci)
> -{
> -	bitmap_free(hci->DAT_data);
> -	hci->DAT_data = NULL;
> -}
> -
>  static int hci_dat_v1_alloc_entry(struct i3c_hci *hci)
>  {
>  	unsigned int dat_idx;
> @@ -170,7 +166,6 @@ static int hci_dat_v1_get_index(struct i3c_hci *hci, u8 dev_addr)
>
>  const struct hci_dat_ops mipi_i3c_hci_dat_v1 = {
>  	.init			= hci_dat_v1_init,
> -	.cleanup		= hci_dat_v1_cleanup,
>  	.alloc_entry		= hci_dat_v1_alloc_entry,
>  	.free_entry		= hci_dat_v1_free_entry,
>  	.set_dynamic_addr	= hci_dat_v1_set_dynamic_addr,
> --
> 2.51.0
>
>
> --
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[PATCH 06/17] i3c: mipi-i3c-hci: Switch PIO data allocation to devm_kzalloc()

[Adrian Hunter]

The driver already uses managed resources, so convert the PIO data
structure allocation to use devm_zalloc().  Remove the manual kfree().

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
---
 drivers/i3c/master/mipi-i3c-hci/pio.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/i3c/master/mipi-i3c-hci/pio.c b/drivers/i3c/master/mipi-i3c-hci/pio.c
index 90dca56fc0c5..3d633abf6099 100644
--- a/drivers/i3c/master/mipi-i3c-hci/pio.c
+++ b/drivers/i3c/master/mipi-i3c-hci/pio.c
@@ -140,7 +140,7 @@ static int hci_pio_init(struct i3c_hci *hci)
 	struct hci_pio_data *pio;
 	u32 val, size_val, rx_thresh, tx_thresh, ibi_val;
 
-	pio = kzalloc(sizeof(*pio), GFP_KERNEL);
+	pio = devm_kzalloc(hci->master.dev.parent, sizeof(*pio), GFP_KERNEL);
 	if (!pio)
 		return -ENOMEM;
 
@@ -220,8 +220,6 @@ static void hci_pio_cleanup(struct i3c_hci *hci)
 		BUG_ON(pio->curr_rx);
 		BUG_ON(pio->curr_tx);
 		BUG_ON(pio->curr_resp);
-		kfree(pio);
-		hci->io_data = NULL;
 	}
 }
 
-- 
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Re: [PATCH 06/17] i3c: mipi-i3c-hci: Switch PIO data allocation to devm_kzalloc()

[Frank Li]

On Fri, Dec 19, 2025 at 04:45:23PM +0200, Adrian Hunter wrote:
> The driver already uses managed resources, so convert the PIO data
> structure allocation to use devm_zalloc().  Remove the manual kfree().

Nit: remove word 'use'.

Reviewed-by: Frank Li <Frank.Li@nxp.com>
>
> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
> ---
>  drivers/i3c/master/mipi-i3c-hci/pio.c | 4 +---
>  1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/drivers/i3c/master/mipi-i3c-hci/pio.c b/drivers/i3c/master/mipi-i3c-hci/pio.c
> index 90dca56fc0c5..3d633abf6099 100644
> --- a/drivers/i3c/master/mipi-i3c-hci/pio.c
> +++ b/drivers/i3c/master/mipi-i3c-hci/pio.c
> @@ -140,7 +140,7 @@ static int hci_pio_init(struct i3c_hci *hci)
>  	struct hci_pio_data *pio;
>  	u32 val, size_val, rx_thresh, tx_thresh, ibi_val;
>
> -	pio = kzalloc(sizeof(*pio), GFP_KERNEL);
> +	pio = devm_kzalloc(hci->master.dev.parent, sizeof(*pio), GFP_KERNEL);
>  	if (!pio)
>  		return -ENOMEM;
>
> @@ -220,8 +220,6 @@ static void hci_pio_cleanup(struct i3c_hci *hci)
>  		BUG_ON(pio->curr_rx);
>  		BUG_ON(pio->curr_tx);
>  		BUG_ON(pio->curr_resp);
> -		kfree(pio);
> -		hci->io_data = NULL;
>  	}
>  }
>
> --
> 2.51.0
>
>
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[PATCH 07/17] i3c: mipi-i3c-hci: Manage DMA deallocation via devres action

[Adrian Hunter]

The driver already uses devres for resource management, but the standard
resource-managed DMA allocation helpers cannot be used because they assume
the DMA device matches the managed device.

To address this, factor out the deallocation logic from hci_dma_cleanup()
into a new helper, hci_dma_free(), and register it as a devres action.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
---
 drivers/i3c/master/mipi-i3c-hci/dma.c | 53 ++++++++++++++++++---------
 1 file changed, 36 insertions(+), 17 deletions(-)

diff --git a/drivers/i3c/master/mipi-i3c-hci/dma.c b/drivers/i3c/master/mipi-i3c-hci/dma.c
index 54849aa98fad..703d5cf79d5e 100644
--- a/drivers/i3c/master/mipi-i3c-hci/dma.c
+++ b/drivers/i3c/master/mipi-i3c-hci/dma.c
@@ -146,30 +146,18 @@ struct hci_dma_dev_ibi_data {
 	unsigned int max_len;
 };
 
-static void hci_dma_cleanup(struct i3c_hci *hci)
+static void hci_dma_free(void *data)
 {
+	struct i3c_hci *hci = data;
 	struct hci_rings_data *rings = hci->io_data;
 	struct hci_rh_data *rh;
-	unsigned int i;
 
 	if (!rings)
 		return;
 
-	for (i = 0; i < rings->total; i++) {
-		rh = &rings->headers[i];
-
-		rh_reg_write(INTR_SIGNAL_ENABLE, 0);
-		rh_reg_write(RING_CONTROL, 0);
-	}
-
-	i3c_hci_sync_irq_inactive(hci);
-
-	for (i = 0; i < rings->total; i++) {
+	for (int i = 0; i < rings->total; i++) {
 		rh = &rings->headers[i];
 
-		rh_reg_write(CR_SETUP, 0);
-		rh_reg_write(IBI_SETUP, 0);
-
 		if (rh->xfer)
 			dma_free_coherent(rings->sysdev,
 					  rh->xfer_struct_sz * rh->xfer_entries,
@@ -190,12 +178,38 @@ static void hci_dma_cleanup(struct i3c_hci *hci)
 		kfree(rh->ibi_data);
 	}
 
-	rhs_reg_write(CONTROL, 0);
-
 	kfree(rings);
 	hci->io_data = NULL;
 }
 
+static void hci_dma_cleanup(struct i3c_hci *hci)
+{
+	struct hci_rings_data *rings = hci->io_data;
+	struct hci_rh_data *rh;
+	unsigned int i;
+
+	if (!rings)
+		return;
+
+	for (i = 0; i < rings->total; i++) {
+		rh = &rings->headers[i];
+
+		rh_reg_write(INTR_SIGNAL_ENABLE, 0);
+		rh_reg_write(RING_CONTROL, 0);
+	}
+
+	i3c_hci_sync_irq_inactive(hci);
+
+	for (i = 0; i < rings->total; i++) {
+		rh = &rings->headers[i];
+
+		rh_reg_write(CR_SETUP, 0);
+		rh_reg_write(IBI_SETUP, 0);
+	}
+
+	rhs_reg_write(CONTROL, 0);
+}
+
 static int hci_dma_init(struct i3c_hci *hci)
 {
 	struct hci_rings_data *rings;
@@ -359,10 +373,15 @@ static int hci_dma_init(struct i3c_hci *hci)
 					   RING_CTRL_RUN_STOP);
 	}
 
+	ret = devm_add_action(hci->master.dev.parent, hci_dma_free, hci);
+	if (ret)
+		goto err_out;
+
 	return 0;
 
 err_out:
 	hci_dma_cleanup(hci);
+	hci_dma_free(hci);
 	return ret;
 }
 
-- 
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Re: [PATCH 07/17] i3c: mipi-i3c-hci: Manage DMA deallocation via devres action

[Frank Li]

On Fri, Dec 19, 2025 at 04:45:24PM +0200, Adrian Hunter wrote:
> The driver already uses devres for resource management, but the standard
> resource-managed DMA allocation helpers cannot be used because they assume
> the DMA device matches the managed device.
>
> To address this, factor out the deallocation logic from hci_dma_cleanup()
> into a new helper, hci_dma_free(), and register it as a devres action.
>
> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
> ---
>  drivers/i3c/master/mipi-i3c-hci/dma.c | 53 ++++++++++++++++++---------
>  1 file changed, 36 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/i3c/master/mipi-i3c-hci/dma.c b/drivers/i3c/master/mipi-i3c-hci/dma.c
> index 54849aa98fad..703d5cf79d5e 100644
> --- a/drivers/i3c/master/mipi-i3c-hci/dma.c
> +++ b/drivers/i3c/master/mipi-i3c-hci/dma.c
> @@ -146,30 +146,18 @@ struct hci_dma_dev_ibi_data {
>  	unsigned int max_len;
>  };
>
> -static void hci_dma_cleanup(struct i3c_hci *hci)
> +static void hci_dma_free(void *data)

can you move hci_dma_free() below hci_dma_cleanup() to make patch look
better to review?

>  {
> +	struct i3c_hci *hci = data;
>  	struct hci_rings_data *rings = hci->io_data;
>  	struct hci_rh_data *rh;
> -	unsigned int i;
>
>  	if (!rings)
>  		return;
>
> -	for (i = 0; i < rings->total; i++) {
> -		rh = &rings->headers[i];
> -
> -		rh_reg_write(INTR_SIGNAL_ENABLE, 0);
> -		rh_reg_write(RING_CONTROL, 0);
> -	}
> -
> -	i3c_hci_sync_irq_inactive(hci);
> -
> -	for (i = 0; i < rings->total; i++) {
> +	for (int i = 0; i < rings->total; i++) {
>  		rh = &rings->headers[i];
>
> -		rh_reg_write(CR_SETUP, 0);
> -		rh_reg_write(IBI_SETUP, 0);
> -
>  		if (rh->xfer)
>  			dma_free_coherent(rings->sysdev,
>  					  rh->xfer_struct_sz * rh->xfer_entries,
> @@ -190,12 +178,38 @@ static void hci_dma_cleanup(struct i3c_hci *hci)
>  		kfree(rh->ibi_data);
>  	}
>
> -	rhs_reg_write(CONTROL, 0);
> -
>  	kfree(rings);
>  	hci->io_data = NULL;
>  }
>
> +static void hci_dma_cleanup(struct i3c_hci *hci)
> +{
> +	struct hci_rings_data *rings = hci->io_data;
> +	struct hci_rh_data *rh;
> +	unsigned int i;
> +
> +	if (!rings)
> +		return;
> +
> +	for (i = 0; i < rings->total; i++) {
> +		rh = &rings->headers[i];
> +
> +		rh_reg_write(INTR_SIGNAL_ENABLE, 0);
> +		rh_reg_write(RING_CONTROL, 0);
> +	}
> +
> +	i3c_hci_sync_irq_inactive(hci);
> +
> +	for (i = 0; i < rings->total; i++) {
> +		rh = &rings->headers[i];
> +
> +		rh_reg_write(CR_SETUP, 0);
> +		rh_reg_write(IBI_SETUP, 0);
> +	}
> +
> +	rhs_reg_write(CONTROL, 0);
> +}
> +
>  static int hci_dma_init(struct i3c_hci *hci)
>  {
>  	struct hci_rings_data *rings;
> @@ -359,10 +373,15 @@ static int hci_dma_init(struct i3c_hci *hci)
>  					   RING_CTRL_RUN_STOP);
>  	}
>
> +	ret = devm_add_action(hci->master.dev.parent, hci_dma_free, hci);
> +	if (ret)
> +		goto err_out;
> +

use devm_add_action_or_reset(), so needn't goto

Frank
>  	return 0;
>
>  err_out:
>  	hci_dma_cleanup(hci);
> +	hci_dma_free(hci);
>  	return ret;
>  }
>
> --
> 2.51.0
>
>
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Re: [PATCH 07/17] i3c: mipi-i3c-hci: Manage DMA deallocation via devres action

[Adrian Hunter]

On 19/12/2025 18:32, Frank Li wrote:
> On Fri, Dec 19, 2025 at 04:45:24PM +0200, Adrian Hunter wrote:
>> The driver already uses devres for resource management, but the standard
>> resource-managed DMA allocation helpers cannot be used because they assume
>> the DMA device matches the managed device.
>>
>> To address this, factor out the deallocation logic from hci_dma_cleanup()
>> into a new helper, hci_dma_free(), and register it as a devres action.
>>
>> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
>> ---
>>  drivers/i3c/master/mipi-i3c-hci/dma.c | 53 ++++++++++++++++++---------
>>  1 file changed, 36 insertions(+), 17 deletions(-)
>>
>> diff --git a/drivers/i3c/master/mipi-i3c-hci/dma.c b/drivers/i3c/master/mipi-i3c-hci/dma.c
>> index 54849aa98fad..703d5cf79d5e 100644
>> --- a/drivers/i3c/master/mipi-i3c-hci/dma.c
>> +++ b/drivers/i3c/master/mipi-i3c-hci/dma.c

...

>>  static int hci_dma_init(struct i3c_hci *hci)
>>  {
>>  	struct hci_rings_data *rings;
>> @@ -359,10 +373,15 @@ static int hci_dma_init(struct i3c_hci *hci)
>>  					   RING_CTRL_RUN_STOP);
>>  	}
>>
>> +	ret = devm_add_action(hci->master.dev.parent, hci_dma_free, hci);
>> +	if (ret)
>> +		goto err_out;
>> +
> 
> use devm_add_action_or_reset(), so needn't goto

It doesn't work because the error path needs to call hci_dma_cleanup()
before hci_dma_free()

> 
> Frank
>>  	return 0;
>>
>>  err_out:
>>  	hci_dma_cleanup(hci);
>> +	hci_dma_free(hci);
>>  	return ret;
>>  }
>>
>> --
>> 2.51.0
>>
>>
>> --
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>> linux-i3c@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-i3c


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[PATCH 08/17] i3c: mipi-i3c-hci: Cache DAT in memory for Runtime PM restore

[Adrian Hunter]

Prepare for Runtime PM support, which requires restoring the Device Address
Table (DAT) registers after resume.  Maintain a copy of DAT in memory so it
can be reprogrammed when the controller is powered back up.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
---
 drivers/i3c/master/mipi-i3c-hci/dat_v1.c | 29 +++++++++++++++++++-----
 drivers/i3c/master/mipi-i3c-hci/hci.h    |  6 +++++
 2 files changed, 29 insertions(+), 6 deletions(-)

diff --git a/drivers/i3c/master/mipi-i3c-hci/dat_v1.c b/drivers/i3c/master/mipi-i3c-hci/dat_v1.c
index c60ef5d77ca3..644ab939be1c 100644
--- a/drivers/i3c/master/mipi-i3c-hci/dat_v1.c
+++ b/drivers/i3c/master/mipi-i3c-hci/dat_v1.c
@@ -34,13 +34,26 @@
 /*	DAT_0_IBI_PAYLOAD		W0_BIT_(12) */
 #define DAT_0_STATIC_ADDRESS		W0_MASK(6, 0)
 
-#define dat_w0_read(i)		readl(hci->DAT_regs + (i) * 8)
-#define dat_w1_read(i)		readl(hci->DAT_regs + (i) * 8 + 4)
-#define dat_w0_write(i, v)	writel(v, hci->DAT_regs + (i) * 8)
-#define dat_w1_write(i, v)	writel(v, hci->DAT_regs + (i) * 8 + 4)
+#define dat_w0_read(i)		hci->DAT[i].w0
+#define dat_w1_read(i)		hci->DAT[i].w1
+#define dat_w0_write(i, v)	hci_dat_w0_write(hci, i, v)
+#define dat_w1_write(i, v)	hci_dat_w1_write(hci, i, v)
+
+static inline void hci_dat_w0_write(struct i3c_hci *hci, int i, u32 v)
+{
+	hci->DAT[i].w0 = v;
+	writel(v, hci->DAT_regs + i * 8);
+}
+
+static inline void hci_dat_w1_write(struct i3c_hci *hci, int i, u32 v)
+{
+	hci->DAT[i].w1 = v;
+	writel(v, hci->DAT_regs + i * 8 + 4);
+}
 
 static int hci_dat_v1_init(struct i3c_hci *hci)
 {
+	struct device *dev = hci->master.dev.parent;
 	unsigned int dat_idx;
 
 	if (!hci->DAT_regs) {
@@ -54,9 +67,13 @@ static int hci_dat_v1_init(struct i3c_hci *hci)
 		return -EOPNOTSUPP;
 	}
 
-	if (!hci->DAT_data) {
-		struct device *dev = hci->master.dev.parent;
+	if (!hci->DAT) {
+		hci->DAT = devm_kcalloc(dev, hci->DAT_entries, hci->DAT_entry_size, GFP_KERNEL);
+		if (!hci->DAT)
+			return -ENOMEM;
+	}
 
+	if (!hci->DAT_data) {
 		/* use a bitmap for faster free slot search */
 		hci->DAT_data = devm_bitmap_zalloc(dev, hci->DAT_entries, GFP_KERNEL);
 		if (!hci->DAT_data)
diff --git a/drivers/i3c/master/mipi-i3c-hci/hci.h b/drivers/i3c/master/mipi-i3c-hci/hci.h
index fd08b701d094..aa8a03594e64 100644
--- a/drivers/i3c/master/mipi-i3c-hci/hci.h
+++ b/drivers/i3c/master/mipi-i3c-hci/hci.h
@@ -31,6 +31,11 @@
 
 struct hci_cmd_ops;
 
+struct dat_words {
+	u32 w0;
+	u32 w1;
+};
+
 /* Our main structure */
 struct i3c_hci {
 	struct i3c_master_controller master;
@@ -51,6 +56,7 @@ struct i3c_hci {
 	unsigned int DAT_entries;
 	unsigned int DAT_entry_size;
 	void *DAT_data;
+	struct dat_words *DAT;
 	unsigned int DCT_entries;
 	unsigned int DCT_entry_size;
 	u8 version_major;
-- 
2.51.0


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Re: [PATCH 08/17] i3c: mipi-i3c-hci: Cache DAT in memory for Runtime PM restore

[Frank Li]

On Fri, Dec 19, 2025 at 04:45:25PM +0200, Adrian Hunter wrote:
> Prepare for Runtime PM support, which requires restoring the Device Address
> Table (DAT) registers after resume.  Maintain a copy of DAT in memory so it
> can be reprogrammed when the controller is powered back up.
>
> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
> ---

Reviewed-by: Frank Li <Frank.Li@nxp.com>

>  drivers/i3c/master/mipi-i3c-hci/dat_v1.c | 29 +++++++++++++++++++-----
>  drivers/i3c/master/mipi-i3c-hci/hci.h    |  6 +++++
>  2 files changed, 29 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/i3c/master/mipi-i3c-hci/dat_v1.c b/drivers/i3c/master/mipi-i3c-hci/dat_v1.c
> index c60ef5d77ca3..644ab939be1c 100644
> --- a/drivers/i3c/master/mipi-i3c-hci/dat_v1.c
> +++ b/drivers/i3c/master/mipi-i3c-hci/dat_v1.c
> @@ -34,13 +34,26 @@
>  /*	DAT_0_IBI_PAYLOAD		W0_BIT_(12) */
>  #define DAT_0_STATIC_ADDRESS		W0_MASK(6, 0)
>
> -#define dat_w0_read(i)		readl(hci->DAT_regs + (i) * 8)
> -#define dat_w1_read(i)		readl(hci->DAT_regs + (i) * 8 + 4)
> -#define dat_w0_write(i, v)	writel(v, hci->DAT_regs + (i) * 8)
> -#define dat_w1_write(i, v)	writel(v, hci->DAT_regs + (i) * 8 + 4)
> +#define dat_w0_read(i)		hci->DAT[i].w0
> +#define dat_w1_read(i)		hci->DAT[i].w1
> +#define dat_w0_write(i, v)	hci_dat_w0_write(hci, i, v)
> +#define dat_w1_write(i, v)	hci_dat_w1_write(hci, i, v)
> +
> +static inline void hci_dat_w0_write(struct i3c_hci *hci, int i, u32 v)
> +{
> +	hci->DAT[i].w0 = v;
> +	writel(v, hci->DAT_regs + i * 8);
> +}
> +
> +static inline void hci_dat_w1_write(struct i3c_hci *hci, int i, u32 v)
> +{
> +	hci->DAT[i].w1 = v;
> +	writel(v, hci->DAT_regs + i * 8 + 4);
> +}
>
>  static int hci_dat_v1_init(struct i3c_hci *hci)
>  {
> +	struct device *dev = hci->master.dev.parent;
>  	unsigned int dat_idx;
>
>  	if (!hci->DAT_regs) {
> @@ -54,9 +67,13 @@ static int hci_dat_v1_init(struct i3c_hci *hci)
>  		return -EOPNOTSUPP;
>  	}
>
> -	if (!hci->DAT_data) {
> -		struct device *dev = hci->master.dev.parent;
> +	if (!hci->DAT) {
> +		hci->DAT = devm_kcalloc(dev, hci->DAT_entries, hci->DAT_entry_size, GFP_KERNEL);
> +		if (!hci->DAT)
> +			return -ENOMEM;
> +	}
>
> +	if (!hci->DAT_data) {
>  		/* use a bitmap for faster free slot search */
>  		hci->DAT_data = devm_bitmap_zalloc(dev, hci->DAT_entries, GFP_KERNEL);
>  		if (!hci->DAT_data)
> diff --git a/drivers/i3c/master/mipi-i3c-hci/hci.h b/drivers/i3c/master/mipi-i3c-hci/hci.h
> index fd08b701d094..aa8a03594e64 100644
> --- a/drivers/i3c/master/mipi-i3c-hci/hci.h
> +++ b/drivers/i3c/master/mipi-i3c-hci/hci.h
> @@ -31,6 +31,11 @@
>
>  struct hci_cmd_ops;
>
> +struct dat_words {
> +	u32 w0;
> +	u32 w1;
> +};
> +
>  /* Our main structure */
>  struct i3c_hci {
>  	struct i3c_master_controller master;
> @@ -51,6 +56,7 @@ struct i3c_hci {
>  	unsigned int DAT_entries;
>  	unsigned int DAT_entry_size;
>  	void *DAT_data;
> +	struct dat_words *DAT;
>  	unsigned int DCT_entries;
>  	unsigned int DCT_entry_size;
>  	u8 version_major;
> --
> 2.51.0
>
>
> --
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> linux-i3c@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-i3c

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[PATCH 09/17] i3c: mipi-i3c-hci: Introduce helper to restore DAT

[Adrian Hunter]

Add a dedicated function to restore the Device Address Table (DAT) in
preparation for Runtime PM support.  This will allow reprogramming the DAT
after the controller resumes from a low-power state.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
---
 drivers/i3c/master/mipi-i3c-hci/dat.h    | 1 +
 drivers/i3c/master/mipi-i3c-hci/dat_v1.c | 9 +++++++++
 2 files changed, 10 insertions(+)

diff --git a/drivers/i3c/master/mipi-i3c-hci/dat.h b/drivers/i3c/master/mipi-i3c-hci/dat.h
index 5277c65fc601..6881f19da77f 100644
--- a/drivers/i3c/master/mipi-i3c-hci/dat.h
+++ b/drivers/i3c/master/mipi-i3c-hci/dat.h
@@ -24,6 +24,7 @@ struct hci_dat_ops {
 	void (*set_flags)(struct i3c_hci *hci, unsigned int dat_idx, u32 w0, u32 w1);
 	void (*clear_flags)(struct i3c_hci *hci, unsigned int dat_idx, u32 w0, u32 w1);
 	int (*get_index)(struct i3c_hci *hci, u8 address);
+	void (*restore)(struct i3c_hci *hci);
 };
 
 extern const struct hci_dat_ops mipi_i3c_hci_dat_v1;
diff --git a/drivers/i3c/master/mipi-i3c-hci/dat_v1.c b/drivers/i3c/master/mipi-i3c-hci/dat_v1.c
index 644ab939be1c..852966aa20d9 100644
--- a/drivers/i3c/master/mipi-i3c-hci/dat_v1.c
+++ b/drivers/i3c/master/mipi-i3c-hci/dat_v1.c
@@ -181,6 +181,14 @@ static int hci_dat_v1_get_index(struct i3c_hci *hci, u8 dev_addr)
 	return -ENODEV;
 }
 
+static void hci_dat_v1_restore(struct i3c_hci *hci)
+{
+	for (int i = 0; i < hci->DAT_entries; i++) {
+		writel(hci->DAT[i].w0, hci->DAT_regs + i * 8);
+		writel(hci->DAT[i].w1, hci->DAT_regs + i * 8 + 4);
+	}
+}
+
 const struct hci_dat_ops mipi_i3c_hci_dat_v1 = {
 	.init			= hci_dat_v1_init,
 	.alloc_entry		= hci_dat_v1_alloc_entry,
@@ -190,4 +198,5 @@ const struct hci_dat_ops mipi_i3c_hci_dat_v1 = {
 	.set_flags		= hci_dat_v1_set_flags,
 	.clear_flags		= hci_dat_v1_clear_flags,
 	.get_index		= hci_dat_v1_get_index,
+	.restore		= hci_dat_v1_restore,
 };
-- 
2.51.0


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Re: [PATCH 09/17] i3c: mipi-i3c-hci: Introduce helper to restore DAT

[Frank Li]

On Fri, Dec 19, 2025 at 04:45:26PM +0200, Adrian Hunter wrote:
> Add a dedicated function to restore the Device Address Table (DAT) in
> preparation for Runtime PM support.  This will allow reprogramming the DAT
> after the controller resumes from a low-power state.
>
> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
> ---

Reviewed-by: Frank Li <Frank.Li@nxp.com>

>  drivers/i3c/master/mipi-i3c-hci/dat.h    | 1 +
>  drivers/i3c/master/mipi-i3c-hci/dat_v1.c | 9 +++++++++
>  2 files changed, 10 insertions(+)
>
> diff --git a/drivers/i3c/master/mipi-i3c-hci/dat.h b/drivers/i3c/master/mipi-i3c-hci/dat.h
> index 5277c65fc601..6881f19da77f 100644
> --- a/drivers/i3c/master/mipi-i3c-hci/dat.h
> +++ b/drivers/i3c/master/mipi-i3c-hci/dat.h
> @@ -24,6 +24,7 @@ struct hci_dat_ops {
>  	void (*set_flags)(struct i3c_hci *hci, unsigned int dat_idx, u32 w0, u32 w1);
>  	void (*clear_flags)(struct i3c_hci *hci, unsigned int dat_idx, u32 w0, u32 w1);
>  	int (*get_index)(struct i3c_hci *hci, u8 address);
> +	void (*restore)(struct i3c_hci *hci);
>  };
>
>  extern const struct hci_dat_ops mipi_i3c_hci_dat_v1;
> diff --git a/drivers/i3c/master/mipi-i3c-hci/dat_v1.c b/drivers/i3c/master/mipi-i3c-hci/dat_v1.c
> index 644ab939be1c..852966aa20d9 100644
> --- a/drivers/i3c/master/mipi-i3c-hci/dat_v1.c
> +++ b/drivers/i3c/master/mipi-i3c-hci/dat_v1.c
> @@ -181,6 +181,14 @@ static int hci_dat_v1_get_index(struct i3c_hci *hci, u8 dev_addr)
>  	return -ENODEV;
>  }
>
> +static void hci_dat_v1_restore(struct i3c_hci *hci)
> +{
> +	for (int i = 0; i < hci->DAT_entries; i++) {
> +		writel(hci->DAT[i].w0, hci->DAT_regs + i * 8);
> +		writel(hci->DAT[i].w1, hci->DAT_regs + i * 8 + 4);
> +	}
> +}
> +
>  const struct hci_dat_ops mipi_i3c_hci_dat_v1 = {
>  	.init			= hci_dat_v1_init,
>  	.alloc_entry		= hci_dat_v1_alloc_entry,
> @@ -190,4 +198,5 @@ const struct hci_dat_ops mipi_i3c_hci_dat_v1 = {
>  	.set_flags		= hci_dat_v1_set_flags,
>  	.clear_flags		= hci_dat_v1_clear_flags,
>  	.get_index		= hci_dat_v1_get_index,
> +	.restore		= hci_dat_v1_restore,
>  };
> --
> 2.51.0
>
>
> --
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[PATCH 10/17] i3c: mipi-i3c-hci: Extract ring initialization from hci_dma_init()

[Adrian Hunter]

Split the ring setup logic out of hci_dma_init() into a new helper
hci_dma_init_rings().  This refactoring prepares for Runtime PM support
by allowing DMA rings to be reinitialized independently after resume.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
---
 drivers/i3c/master/mipi-i3c-hci/dma.c | 118 +++++++++++++++-----------
 1 file changed, 68 insertions(+), 50 deletions(-)

diff --git a/drivers/i3c/master/mipi-i3c-hci/dma.c b/drivers/i3c/master/mipi-i3c-hci/dma.c
index 703d5cf79d5e..d0fc245f8e8f 100644
--- a/drivers/i3c/master/mipi-i3c-hci/dma.c
+++ b/drivers/i3c/master/mipi-i3c-hci/dma.c
@@ -210,6 +210,71 @@ static void hci_dma_cleanup(struct i3c_hci *hci)
 	rhs_reg_write(CONTROL, 0);
 }
 
+static void hci_dma_init_rh(struct i3c_hci *hci, struct hci_rh_data *rh, int i)
+{
+	u32 regval;
+
+	rh_reg_write(CMD_RING_BASE_LO, lower_32_bits(rh->xfer_dma));
+	rh_reg_write(CMD_RING_BASE_HI, upper_32_bits(rh->xfer_dma));
+	rh_reg_write(RESP_RING_BASE_LO, lower_32_bits(rh->resp_dma));
+	rh_reg_write(RESP_RING_BASE_HI, upper_32_bits(rh->resp_dma));
+
+	regval = FIELD_PREP(CR_RING_SIZE, rh->xfer_entries);
+	rh_reg_write(CR_SETUP, regval);
+
+	rh_reg_write(INTR_STATUS_ENABLE, 0xffffffff);
+	rh_reg_write(INTR_SIGNAL_ENABLE, INTR_IBI_READY |
+					 INTR_TRANSFER_COMPLETION |
+					 INTR_RING_OP |
+					 INTR_TRANSFER_ERR |
+					 INTR_IBI_RING_FULL |
+					 INTR_TRANSFER_ABORT);
+
+	if (i >= IBI_RINGS)
+		goto ring_ready;
+
+	rh_reg_write(IBI_STATUS_RING_BASE_LO, lower_32_bits(rh->ibi_status_dma));
+	rh_reg_write(IBI_STATUS_RING_BASE_HI, upper_32_bits(rh->ibi_status_dma));
+	rh_reg_write(IBI_DATA_RING_BASE_LO, lower_32_bits(rh->ibi_data_dma));
+	rh_reg_write(IBI_DATA_RING_BASE_HI, upper_32_bits(rh->ibi_data_dma));
+
+	regval = FIELD_PREP(IBI_STATUS_RING_SIZE, rh->ibi_status_entries) |
+		 FIELD_PREP(IBI_DATA_CHUNK_SIZE, ilog2(rh->ibi_chunk_sz) - 2) |
+		 FIELD_PREP(IBI_DATA_CHUNK_COUNT, rh->ibi_chunks_total);
+	rh_reg_write(IBI_SETUP, regval);
+
+	regval = rh_reg_read(INTR_SIGNAL_ENABLE);
+	regval |= INTR_IBI_READY;
+	rh_reg_write(INTR_SIGNAL_ENABLE, regval);
+
+ring_ready:
+	/*
+	 * The MIPI I3C HCI specification does not document reset values for
+	 * RING_OPERATION1 fields and some controllers (e.g. Intel controllers)
+	 * do not reset the values, so ensure the ring pointers are set to zero
+	 * here.
+	 */
+	rh_reg_write(RING_OPERATION1, 0);
+
+	rh_reg_write(RING_CONTROL, RING_CTRL_ENABLE);
+	rh_reg_write(RING_CONTROL, RING_CTRL_ENABLE | RING_CTRL_RUN_STOP);
+
+	rh->done_ptr = 0;
+	rh->ibi_chunk_ptr = 0;
+}
+
+static void hci_dma_init_rings(struct i3c_hci *hci)
+{
+	struct hci_rings_data *rings = hci->io_data;
+	u32 regval;
+
+	regval = FIELD_PREP(MAX_HEADER_COUNT, rings->total);
+	rhs_reg_write(CONTROL, regval);
+
+	for (int i = 0; i < rings->total; i++)
+		hci_dma_init_rh(hci, &rings->headers[i], i);
+}
+
 static int hci_dma_init(struct i3c_hci *hci)
 {
 	struct hci_rings_data *rings;
@@ -247,9 +312,6 @@ static int hci_dma_init(struct i3c_hci *hci)
 	rings->total = nr_rings;
 	rings->sysdev = sysdev;
 
-	regval = FIELD_PREP(MAX_HEADER_COUNT, rings->total);
-	rhs_reg_write(CONTROL, regval);
-
 	for (i = 0; i < rings->total; i++) {
 		u32 offset = rhs_reg_read(RHn_OFFSET(i));
 
@@ -284,26 +346,10 @@ static int hci_dma_init(struct i3c_hci *hci)
 		if (!rh->xfer || !rh->resp || !rh->src_xfers)
 			goto err_out;
 
-		rh_reg_write(CMD_RING_BASE_LO, lower_32_bits(rh->xfer_dma));
-		rh_reg_write(CMD_RING_BASE_HI, upper_32_bits(rh->xfer_dma));
-		rh_reg_write(RESP_RING_BASE_LO, lower_32_bits(rh->resp_dma));
-		rh_reg_write(RESP_RING_BASE_HI, upper_32_bits(rh->resp_dma));
-
-		regval = FIELD_PREP(CR_RING_SIZE, rh->xfer_entries);
-		rh_reg_write(CR_SETUP, regval);
-
-		rh_reg_write(INTR_STATUS_ENABLE, 0xffffffff);
-		rh_reg_write(INTR_SIGNAL_ENABLE, INTR_IBI_READY |
-						 INTR_TRANSFER_COMPLETION |
-						 INTR_RING_OP |
-						 INTR_TRANSFER_ERR |
-						 INTR_IBI_RING_FULL |
-						 INTR_TRANSFER_ABORT);
-
 		/* IBIs */
 
 		if (i >= IBI_RINGS)
-			goto ring_ready;
+			continue;
 
 		regval = rh_reg_read(IBI_SETUP);
 		rh->ibi_status_sz = FIELD_GET(IBI_STATUS_STRUCT_SIZE, regval);
@@ -342,45 +388,17 @@ static int hci_dma_init(struct i3c_hci *hci)
 			ret = -ENOMEM;
 			goto err_out;
 		}
-
-		rh_reg_write(IBI_STATUS_RING_BASE_LO, lower_32_bits(rh->ibi_status_dma));
-		rh_reg_write(IBI_STATUS_RING_BASE_HI, upper_32_bits(rh->ibi_status_dma));
-		rh_reg_write(IBI_DATA_RING_BASE_LO, lower_32_bits(rh->ibi_data_dma));
-		rh_reg_write(IBI_DATA_RING_BASE_HI, upper_32_bits(rh->ibi_data_dma));
-
-		regval = FIELD_PREP(IBI_STATUS_RING_SIZE,
-				    rh->ibi_status_entries) |
-			 FIELD_PREP(IBI_DATA_CHUNK_SIZE,
-				    ilog2(rh->ibi_chunk_sz) - 2) |
-			 FIELD_PREP(IBI_DATA_CHUNK_COUNT,
-				    rh->ibi_chunks_total);
-		rh_reg_write(IBI_SETUP, regval);
-
-		regval = rh_reg_read(INTR_SIGNAL_ENABLE);
-		regval |= INTR_IBI_READY;
-		rh_reg_write(INTR_SIGNAL_ENABLE, regval);
-
-ring_ready:
-		/*
-		 * The MIPI I3C HCI specification does not document reset values for
-		 * RING_OPERATION1 fields and some controllers (e.g. Intel controllers)
-		 * do not reset the values, so ensure the ring pointers are set to zero
-		 * here.
-		 */
-		rh_reg_write(RING_OPERATION1, 0);
-
-		rh_reg_write(RING_CONTROL, RING_CTRL_ENABLE |
-					   RING_CTRL_RUN_STOP);
 	}
 
 	ret = devm_add_action(hci->master.dev.parent, hci_dma_free, hci);
 	if (ret)
 		goto err_out;
 
+	hci_dma_init_rings(hci);
+
 	return 0;
 
 err_out:
-	hci_dma_cleanup(hci);
 	hci_dma_free(hci);
 	return ret;
 }
-- 
2.51.0


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Re: [PATCH 10/17] i3c: mipi-i3c-hci: Extract ring initialization from hci_dma_init()

[Frank Li]

On Fri, Dec 19, 2025 at 04:45:27PM +0200, Adrian Hunter wrote:
> Split the ring setup logic out of hci_dma_init() into a new helper
> hci_dma_init_rings().  This refactoring prepares for Runtime PM support
> by allowing DMA rings to be reinitialized independently after resume.
>
> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
> ---

Reviewed-by: Frank Li <Frank.Li@nxp.com>

>  drivers/i3c/master/mipi-i3c-hci/dma.c | 118 +++++++++++++++-----------
>  1 file changed, 68 insertions(+), 50 deletions(-)
>
> diff --git a/drivers/i3c/master/mipi-i3c-hci/dma.c b/drivers/i3c/master/mipi-i3c-hci/dma.c
> index 703d5cf79d5e..d0fc245f8e8f 100644
> --- a/drivers/i3c/master/mipi-i3c-hci/dma.c
> +++ b/drivers/i3c/master/mipi-i3c-hci/dma.c
> @@ -210,6 +210,71 @@ static void hci_dma_cleanup(struct i3c_hci *hci)
>  	rhs_reg_write(CONTROL, 0);
>  }
>
> +static void hci_dma_init_rh(struct i3c_hci *hci, struct hci_rh_data *rh, int i)
> +{
> +	u32 regval;
> +
> +	rh_reg_write(CMD_RING_BASE_LO, lower_32_bits(rh->xfer_dma));
> +	rh_reg_write(CMD_RING_BASE_HI, upper_32_bits(rh->xfer_dma));
> +	rh_reg_write(RESP_RING_BASE_LO, lower_32_bits(rh->resp_dma));
> +	rh_reg_write(RESP_RING_BASE_HI, upper_32_bits(rh->resp_dma));
> +
> +	regval = FIELD_PREP(CR_RING_SIZE, rh->xfer_entries);
> +	rh_reg_write(CR_SETUP, regval);
> +
> +	rh_reg_write(INTR_STATUS_ENABLE, 0xffffffff);
> +	rh_reg_write(INTR_SIGNAL_ENABLE, INTR_IBI_READY |
> +					 INTR_TRANSFER_COMPLETION |
> +					 INTR_RING_OP |
> +					 INTR_TRANSFER_ERR |
> +					 INTR_IBI_RING_FULL |
> +					 INTR_TRANSFER_ABORT);
> +
> +	if (i >= IBI_RINGS)
> +		goto ring_ready;
> +
> +	rh_reg_write(IBI_STATUS_RING_BASE_LO, lower_32_bits(rh->ibi_status_dma));
> +	rh_reg_write(IBI_STATUS_RING_BASE_HI, upper_32_bits(rh->ibi_status_dma));
> +	rh_reg_write(IBI_DATA_RING_BASE_LO, lower_32_bits(rh->ibi_data_dma));
> +	rh_reg_write(IBI_DATA_RING_BASE_HI, upper_32_bits(rh->ibi_data_dma));
> +
> +	regval = FIELD_PREP(IBI_STATUS_RING_SIZE, rh->ibi_status_entries) |
> +		 FIELD_PREP(IBI_DATA_CHUNK_SIZE, ilog2(rh->ibi_chunk_sz) - 2) |
> +		 FIELD_PREP(IBI_DATA_CHUNK_COUNT, rh->ibi_chunks_total);
> +	rh_reg_write(IBI_SETUP, regval);
> +
> +	regval = rh_reg_read(INTR_SIGNAL_ENABLE);
> +	regval |= INTR_IBI_READY;
> +	rh_reg_write(INTR_SIGNAL_ENABLE, regval);
> +
> +ring_ready:
> +	/*
> +	 * The MIPI I3C HCI specification does not document reset values for
> +	 * RING_OPERATION1 fields and some controllers (e.g. Intel controllers)
> +	 * do not reset the values, so ensure the ring pointers are set to zero
> +	 * here.
> +	 */
> +	rh_reg_write(RING_OPERATION1, 0);
> +
> +	rh_reg_write(RING_CONTROL, RING_CTRL_ENABLE);
> +	rh_reg_write(RING_CONTROL, RING_CTRL_ENABLE | RING_CTRL_RUN_STOP);
> +
> +	rh->done_ptr = 0;
> +	rh->ibi_chunk_ptr = 0;
> +}
> +
> +static void hci_dma_init_rings(struct i3c_hci *hci)
> +{
> +	struct hci_rings_data *rings = hci->io_data;
> +	u32 regval;
> +
> +	regval = FIELD_PREP(MAX_HEADER_COUNT, rings->total);
> +	rhs_reg_write(CONTROL, regval);
> +
> +	for (int i = 0; i < rings->total; i++)
> +		hci_dma_init_rh(hci, &rings->headers[i], i);
> +}
> +
>  static int hci_dma_init(struct i3c_hci *hci)
>  {
>  	struct hci_rings_data *rings;
> @@ -247,9 +312,6 @@ static int hci_dma_init(struct i3c_hci *hci)
>  	rings->total = nr_rings;
>  	rings->sysdev = sysdev;
>
> -	regval = FIELD_PREP(MAX_HEADER_COUNT, rings->total);
> -	rhs_reg_write(CONTROL, regval);
> -
>  	for (i = 0; i < rings->total; i++) {
>  		u32 offset = rhs_reg_read(RHn_OFFSET(i));
>
> @@ -284,26 +346,10 @@ static int hci_dma_init(struct i3c_hci *hci)
>  		if (!rh->xfer || !rh->resp || !rh->src_xfers)
>  			goto err_out;
>
> -		rh_reg_write(CMD_RING_BASE_LO, lower_32_bits(rh->xfer_dma));
> -		rh_reg_write(CMD_RING_BASE_HI, upper_32_bits(rh->xfer_dma));
> -		rh_reg_write(RESP_RING_BASE_LO, lower_32_bits(rh->resp_dma));
> -		rh_reg_write(RESP_RING_BASE_HI, upper_32_bits(rh->resp_dma));
> -
> -		regval = FIELD_PREP(CR_RING_SIZE, rh->xfer_entries);
> -		rh_reg_write(CR_SETUP, regval);
> -
> -		rh_reg_write(INTR_STATUS_ENABLE, 0xffffffff);
> -		rh_reg_write(INTR_SIGNAL_ENABLE, INTR_IBI_READY |
> -						 INTR_TRANSFER_COMPLETION |
> -						 INTR_RING_OP |
> -						 INTR_TRANSFER_ERR |
> -						 INTR_IBI_RING_FULL |
> -						 INTR_TRANSFER_ABORT);
> -
>  		/* IBIs */
>
>  		if (i >= IBI_RINGS)
> -			goto ring_ready;
> +			continue;
>
>  		regval = rh_reg_read(IBI_SETUP);
>  		rh->ibi_status_sz = FIELD_GET(IBI_STATUS_STRUCT_SIZE, regval);
> @@ -342,45 +388,17 @@ static int hci_dma_init(struct i3c_hci *hci)
>  			ret = -ENOMEM;
>  			goto err_out;
>  		}
> -
> -		rh_reg_write(IBI_STATUS_RING_BASE_LO, lower_32_bits(rh->ibi_status_dma));
> -		rh_reg_write(IBI_STATUS_RING_BASE_HI, upper_32_bits(rh->ibi_status_dma));
> -		rh_reg_write(IBI_DATA_RING_BASE_LO, lower_32_bits(rh->ibi_data_dma));
> -		rh_reg_write(IBI_DATA_RING_BASE_HI, upper_32_bits(rh->ibi_data_dma));
> -
> -		regval = FIELD_PREP(IBI_STATUS_RING_SIZE,
> -				    rh->ibi_status_entries) |
> -			 FIELD_PREP(IBI_DATA_CHUNK_SIZE,
> -				    ilog2(rh->ibi_chunk_sz) - 2) |
> -			 FIELD_PREP(IBI_DATA_CHUNK_COUNT,
> -				    rh->ibi_chunks_total);
> -		rh_reg_write(IBI_SETUP, regval);
> -
> -		regval = rh_reg_read(INTR_SIGNAL_ENABLE);
> -		regval |= INTR_IBI_READY;
> -		rh_reg_write(INTR_SIGNAL_ENABLE, regval);
> -
> -ring_ready:
> -		/*
> -		 * The MIPI I3C HCI specification does not document reset values for
> -		 * RING_OPERATION1 fields and some controllers (e.g. Intel controllers)
> -		 * do not reset the values, so ensure the ring pointers are set to zero
> -		 * here.
> -		 */
> -		rh_reg_write(RING_OPERATION1, 0);
> -
> -		rh_reg_write(RING_CONTROL, RING_CTRL_ENABLE |
> -					   RING_CTRL_RUN_STOP);
>  	}
>
>  	ret = devm_add_action(hci->master.dev.parent, hci_dma_free, hci);
>  	if (ret)
>  		goto err_out;
>
> +	hci_dma_init_rings(hci);
> +
>  	return 0;
>
>  err_out:
> -	hci_dma_cleanup(hci);
>  	hci_dma_free(hci);
>  	return ret;
>  }
> --
> 2.51.0
>
>
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[PATCH 11/17] i3c: mipi-i3c-hci: Add DMA suspend and resume support

[Adrian Hunter]

Introduce helper functions to suspend and resume DMA operations.  These
are required to prepare for upcoming Runtime PM support, ensuring that
DMA state is properly managed during power transitions.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
---
 drivers/i3c/master/mipi-i3c-hci/dma.c | 25 +++++++++++++++++++++++++
 drivers/i3c/master/mipi-i3c-hci/hci.h |  2 ++
 2 files changed, 27 insertions(+)

diff --git a/drivers/i3c/master/mipi-i3c-hci/dma.c b/drivers/i3c/master/mipi-i3c-hci/dma.c
index d0fc245f8e8f..6be97f0782d8 100644
--- a/drivers/i3c/master/mipi-i3c-hci/dma.c
+++ b/drivers/i3c/master/mipi-i3c-hci/dma.c
@@ -275,6 +275,29 @@ static void hci_dma_init_rings(struct i3c_hci *hci)
 		hci_dma_init_rh(hci, &rings->headers[i], i);
 }
 
+static void hci_dma_suspend(struct i3c_hci *hci)
+{
+	struct hci_rings_data *rings = hci->io_data;
+	int n = rings ? rings->total : 0;
+
+	for (int i = 0; i < n; i++) {
+		struct hci_rh_data *rh = &rings->headers[i];
+
+		rh_reg_write(INTR_SIGNAL_ENABLE, 0);
+		rh_reg_write(RING_CONTROL, 0);
+	}
+
+	i3c_hci_sync_irq_inactive(hci);
+}
+
+static void hci_dma_resume(struct i3c_hci *hci)
+{
+	struct hci_rings_data *rings = hci->io_data;
+
+	if (rings)
+		hci_dma_init_rings(hci);
+}
+
 static int hci_dma_init(struct i3c_hci *hci)
 {
 	struct hci_rings_data *rings;
@@ -865,4 +888,6 @@ const struct hci_io_ops mipi_i3c_hci_dma = {
 	.request_ibi		= hci_dma_request_ibi,
 	.free_ibi		= hci_dma_free_ibi,
 	.recycle_ibi_slot	= hci_dma_recycle_ibi_slot,
+	.suspend		= hci_dma_suspend,
+	.resume			= hci_dma_resume,
 };
diff --git a/drivers/i3c/master/mipi-i3c-hci/hci.h b/drivers/i3c/master/mipi-i3c-hci/hci.h
index aa8a03594e64..38f927685d3b 100644
--- a/drivers/i3c/master/mipi-i3c-hci/hci.h
+++ b/drivers/i3c/master/mipi-i3c-hci/hci.h
@@ -125,6 +125,8 @@ struct hci_io_ops {
 				struct i3c_ibi_slot *slot);
 	int (*init)(struct i3c_hci *hci);
 	void (*cleanup)(struct i3c_hci *hci);
+	void (*suspend)(struct i3c_hci *hci);
+	void (*resume)(struct i3c_hci *hci);
 };
 
 extern const struct hci_io_ops mipi_i3c_hci_pio;
-- 
2.51.0


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Re: [PATCH 11/17] i3c: mipi-i3c-hci: Add DMA suspend and resume support

[Frank Li]

On Fri, Dec 19, 2025 at 04:45:28PM +0200, Adrian Hunter wrote:
> Introduce helper functions to suspend and resume DMA operations.  These
> are required to prepare for upcoming Runtime PM support, ensuring that
> DMA state is properly managed during power transitions.
>
> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
> ---

Reviewed-by: Frank Li <Frank.Li@nxp.com>

>  drivers/i3c/master/mipi-i3c-hci/dma.c | 25 +++++++++++++++++++++++++
>  drivers/i3c/master/mipi-i3c-hci/hci.h |  2 ++
>  2 files changed, 27 insertions(+)
>
> diff --git a/drivers/i3c/master/mipi-i3c-hci/dma.c b/drivers/i3c/master/mipi-i3c-hci/dma.c
> index d0fc245f8e8f..6be97f0782d8 100644
> --- a/drivers/i3c/master/mipi-i3c-hci/dma.c
> +++ b/drivers/i3c/master/mipi-i3c-hci/dma.c
> @@ -275,6 +275,29 @@ static void hci_dma_init_rings(struct i3c_hci *hci)
>  		hci_dma_init_rh(hci, &rings->headers[i], i);
>  }
>
> +static void hci_dma_suspend(struct i3c_hci *hci)
> +{
> +	struct hci_rings_data *rings = hci->io_data;
> +	int n = rings ? rings->total : 0;
> +
> +	for (int i = 0; i < n; i++) {
> +		struct hci_rh_data *rh = &rings->headers[i];
> +
> +		rh_reg_write(INTR_SIGNAL_ENABLE, 0);
> +		rh_reg_write(RING_CONTROL, 0);
> +	}
> +
> +	i3c_hci_sync_irq_inactive(hci);
> +}
> +
> +static void hci_dma_resume(struct i3c_hci *hci)
> +{
> +	struct hci_rings_data *rings = hci->io_data;
> +
> +	if (rings)
> +		hci_dma_init_rings(hci);
> +}
> +
>  static int hci_dma_init(struct i3c_hci *hci)
>  {
>  	struct hci_rings_data *rings;
> @@ -865,4 +888,6 @@ const struct hci_io_ops mipi_i3c_hci_dma = {
>  	.request_ibi		= hci_dma_request_ibi,
>  	.free_ibi		= hci_dma_free_ibi,
>  	.recycle_ibi_slot	= hci_dma_recycle_ibi_slot,
> +	.suspend		= hci_dma_suspend,
> +	.resume			= hci_dma_resume,
>  };
> diff --git a/drivers/i3c/master/mipi-i3c-hci/hci.h b/drivers/i3c/master/mipi-i3c-hci/hci.h
> index aa8a03594e64..38f927685d3b 100644
> --- a/drivers/i3c/master/mipi-i3c-hci/hci.h
> +++ b/drivers/i3c/master/mipi-i3c-hci/hci.h
> @@ -125,6 +125,8 @@ struct hci_io_ops {
>  				struct i3c_ibi_slot *slot);
>  	int (*init)(struct i3c_hci *hci);
>  	void (*cleanup)(struct i3c_hci *hci);
> +	void (*suspend)(struct i3c_hci *hci);
> +	void (*resume)(struct i3c_hci *hci);
>  };
>
>  extern const struct hci_io_ops mipi_i3c_hci_pio;
> --
> 2.51.0
>
>
> --
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[PATCH 12/17] i3c: mipi-i3c-hci: Refactor PIO register initialization

[Adrian Hunter]

Move the PIO register setup logic out of hci_pio_init() into a new
helper, __hci_pio_init().  This refactoring prepares for Runtime PM
support by allowing PIO registers to be reinitialized independently
after resume.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
---
 drivers/i3c/master/mipi-i3c-hci/pio.c | 45 +++++++++++++++++----------
 1 file changed, 28 insertions(+), 17 deletions(-)

diff --git a/drivers/i3c/master/mipi-i3c-hci/pio.c b/drivers/i3c/master/mipi-i3c-hci/pio.c
index 3d633abf6099..52d9f01d9ca9 100644
--- a/drivers/i3c/master/mipi-i3c-hci/pio.c
+++ b/drivers/i3c/master/mipi-i3c-hci/pio.c
@@ -135,27 +135,14 @@ struct hci_pio_data {
 	u32 enabled_irqs;
 };
 
-static int hci_pio_init(struct i3c_hci *hci)
+static void __hci_pio_init(struct i3c_hci *hci, u32 *size_val_ptr)
 {
-	struct hci_pio_data *pio;
 	u32 val, size_val, rx_thresh, tx_thresh, ibi_val;
-
-	pio = devm_kzalloc(hci->master.dev.parent, sizeof(*pio), GFP_KERNEL);
-	if (!pio)
-		return -ENOMEM;
-
-	hci->io_data = pio;
-	spin_lock_init(&pio->lock);
+	struct hci_pio_data *pio = hci->io_data;
 
 	size_val = pio_reg_read(QUEUE_SIZE);
-	dev_dbg(&hci->master.dev, "CMD/RESP FIFO = %ld entries\n",
-		FIELD_GET(CR_QUEUE_SIZE, size_val));
-	dev_dbg(&hci->master.dev, "IBI FIFO = %ld bytes\n",
-		4 * FIELD_GET(IBI_STATUS_SIZE, size_val));
-	dev_dbg(&hci->master.dev, "RX data FIFO = %d bytes\n",
-		4 * (2 << FIELD_GET(RX_DATA_BUFFER_SIZE, size_val)));
-	dev_dbg(&hci->master.dev, "TX data FIFO = %d bytes\n",
-		4 * (2 << FIELD_GET(TX_DATA_BUFFER_SIZE, size_val)));
+	if (size_val_ptr)
+		*size_val_ptr = size_val;
 
 	/*
 	 * Let's initialize data thresholds to half of the actual FIFO size.
@@ -201,6 +188,30 @@ static int hci_pio_init(struct i3c_hci *hci)
 
 	/* Always accept error interrupts (will be activated on first xfer) */
 	pio->enabled_irqs = STAT_ALL_ERRORS;
+}
+
+static int hci_pio_init(struct i3c_hci *hci)
+{
+	struct hci_pio_data *pio;
+	u32 size_val;
+
+	pio = devm_kzalloc(hci->master.dev.parent, sizeof(*pio), GFP_KERNEL);
+	if (!pio)
+		return -ENOMEM;
+
+	hci->io_data = pio;
+	spin_lock_init(&pio->lock);
+
+	__hci_pio_init(hci, &size_val);
+
+	dev_dbg(&hci->master.dev, "CMD/RESP FIFO = %ld entries\n",
+		FIELD_GET(CR_QUEUE_SIZE, size_val));
+	dev_dbg(&hci->master.dev, "IBI FIFO = %ld bytes\n",
+		4 * FIELD_GET(IBI_STATUS_SIZE, size_val));
+	dev_dbg(&hci->master.dev, "RX data FIFO = %d bytes\n",
+		4 * (2 << FIELD_GET(RX_DATA_BUFFER_SIZE, size_val)));
+	dev_dbg(&hci->master.dev, "TX data FIFO = %d bytes\n",
+		4 * (2 << FIELD_GET(TX_DATA_BUFFER_SIZE, size_val)));
 
 	return 0;
 }
-- 
2.51.0


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Re: [PATCH 12/17] i3c: mipi-i3c-hci: Refactor PIO register initialization

[Frank Li]

On Fri, Dec 19, 2025 at 04:45:29PM +0200, Adrian Hunter wrote:
> Move the PIO register setup logic out of hci_pio_init() into a new
> helper, __hci_pio_init().  This refactoring prepares for Runtime PM
> support by allowing PIO registers to be reinitialized independently
> after resume.
>
> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
> ---

Reviewed-by: Frank Li <Frank.Li@nxp.com>

>  drivers/i3c/master/mipi-i3c-hci/pio.c | 45 +++++++++++++++++----------
>  1 file changed, 28 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/i3c/master/mipi-i3c-hci/pio.c b/drivers/i3c/master/mipi-i3c-hci/pio.c
> index 3d633abf6099..52d9f01d9ca9 100644
> --- a/drivers/i3c/master/mipi-i3c-hci/pio.c
> +++ b/drivers/i3c/master/mipi-i3c-hci/pio.c
> @@ -135,27 +135,14 @@ struct hci_pio_data {
>  	u32 enabled_irqs;
>  };
>
> -static int hci_pio_init(struct i3c_hci *hci)
> +static void __hci_pio_init(struct i3c_hci *hci, u32 *size_val_ptr)
>  {
> -	struct hci_pio_data *pio;
>  	u32 val, size_val, rx_thresh, tx_thresh, ibi_val;
> -
> -	pio = devm_kzalloc(hci->master.dev.parent, sizeof(*pio), GFP_KERNEL);
> -	if (!pio)
> -		return -ENOMEM;
> -
> -	hci->io_data = pio;
> -	spin_lock_init(&pio->lock);
> +	struct hci_pio_data *pio = hci->io_data;
>
>  	size_val = pio_reg_read(QUEUE_SIZE);
> -	dev_dbg(&hci->master.dev, "CMD/RESP FIFO = %ld entries\n",
> -		FIELD_GET(CR_QUEUE_SIZE, size_val));
> -	dev_dbg(&hci->master.dev, "IBI FIFO = %ld bytes\n",
> -		4 * FIELD_GET(IBI_STATUS_SIZE, size_val));
> -	dev_dbg(&hci->master.dev, "RX data FIFO = %d bytes\n",
> -		4 * (2 << FIELD_GET(RX_DATA_BUFFER_SIZE, size_val)));
> -	dev_dbg(&hci->master.dev, "TX data FIFO = %d bytes\n",
> -		4 * (2 << FIELD_GET(TX_DATA_BUFFER_SIZE, size_val)));
> +	if (size_val_ptr)
> +		*size_val_ptr = size_val;
>
>  	/*
>  	 * Let's initialize data thresholds to half of the actual FIFO size.
> @@ -201,6 +188,30 @@ static int hci_pio_init(struct i3c_hci *hci)
>
>  	/* Always accept error interrupts (will be activated on first xfer) */
>  	pio->enabled_irqs = STAT_ALL_ERRORS;
> +}
> +
> +static int hci_pio_init(struct i3c_hci *hci)
> +{
> +	struct hci_pio_data *pio;
> +	u32 size_val;
> +
> +	pio = devm_kzalloc(hci->master.dev.parent, sizeof(*pio), GFP_KERNEL);
> +	if (!pio)
> +		return -ENOMEM;
> +
> +	hci->io_data = pio;
> +	spin_lock_init(&pio->lock);
> +
> +	__hci_pio_init(hci, &size_val);
> +
> +	dev_dbg(&hci->master.dev, "CMD/RESP FIFO = %ld entries\n",
> +		FIELD_GET(CR_QUEUE_SIZE, size_val));
> +	dev_dbg(&hci->master.dev, "IBI FIFO = %ld bytes\n",
> +		4 * FIELD_GET(IBI_STATUS_SIZE, size_val));
> +	dev_dbg(&hci->master.dev, "RX data FIFO = %d bytes\n",
> +		4 * (2 << FIELD_GET(RX_DATA_BUFFER_SIZE, size_val)));
> +	dev_dbg(&hci->master.dev, "TX data FIFO = %d bytes\n",
> +		4 * (2 << FIELD_GET(TX_DATA_BUFFER_SIZE, size_val)));
>
>  	return 0;
>  }
> --
> 2.51.0
>
>
> --
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[PATCH 13/17] i3c: mipi-i3c-hci: Add PIO suspend and resume support

[Adrian Hunter]

Introduce helper functions to suspend and resume PIO operations.  These
are required to prepare for upcoming Runtime PM support, ensuring that
PIO state is properly managed during power transitions.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
---
 drivers/i3c/master/mipi-i3c-hci/pio.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/drivers/i3c/master/mipi-i3c-hci/pio.c b/drivers/i3c/master/mipi-i3c-hci/pio.c
index 52d9f01d9ca9..8e868e81acda 100644
--- a/drivers/i3c/master/mipi-i3c-hci/pio.c
+++ b/drivers/i3c/master/mipi-i3c-hci/pio.c
@@ -190,6 +190,18 @@ static void __hci_pio_init(struct i3c_hci *hci, u32 *size_val_ptr)
 	pio->enabled_irqs = STAT_ALL_ERRORS;
 }
 
+static void hci_pio_suspend(struct i3c_hci *hci)
+{
+	pio_reg_write(INTR_SIGNAL_ENABLE, 0);
+
+	i3c_hci_sync_irq_inactive(hci);
+}
+
+static void hci_pio_resume(struct i3c_hci *hci)
+{
+	__hci_pio_init(hci, NULL);
+}
+
 static int hci_pio_init(struct i3c_hci *hci)
 {
 	struct hci_pio_data *pio;
@@ -1059,4 +1071,6 @@ const struct hci_io_ops mipi_i3c_hci_pio = {
 	.request_ibi		= hci_pio_request_ibi,
 	.free_ibi		= hci_pio_free_ibi,
 	.recycle_ibi_slot	= hci_pio_recycle_ibi_slot,
+	.suspend		= hci_pio_suspend,
+	.resume			= hci_pio_resume,
 };
-- 
2.51.0


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Re: [PATCH 13/17] i3c: mipi-i3c-hci: Add PIO suspend and resume support

[Frank Li]

On Fri, Dec 19, 2025 at 04:45:30PM +0200, Adrian Hunter wrote:
> Introduce helper functions to suspend and resume PIO operations.  These
> are required to prepare for upcoming Runtime PM support, ensuring that
> PIO state is properly managed during power transitions.
>
> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
> ---

Reviewed-by: Frank Li <Frank.Li@nxp.com>

>  drivers/i3c/master/mipi-i3c-hci/pio.c | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
>
> diff --git a/drivers/i3c/master/mipi-i3c-hci/pio.c b/drivers/i3c/master/mipi-i3c-hci/pio.c
> index 52d9f01d9ca9..8e868e81acda 100644
> --- a/drivers/i3c/master/mipi-i3c-hci/pio.c
> +++ b/drivers/i3c/master/mipi-i3c-hci/pio.c
> @@ -190,6 +190,18 @@ static void __hci_pio_init(struct i3c_hci *hci, u32 *size_val_ptr)
>  	pio->enabled_irqs = STAT_ALL_ERRORS;
>  }
>
> +static void hci_pio_suspend(struct i3c_hci *hci)
> +{
> +	pio_reg_write(INTR_SIGNAL_ENABLE, 0);
> +
> +	i3c_hci_sync_irq_inactive(hci);
> +}
> +
> +static void hci_pio_resume(struct i3c_hci *hci)
> +{
> +	__hci_pio_init(hci, NULL);
> +}
> +
>  static int hci_pio_init(struct i3c_hci *hci)
>  {
>  	struct hci_pio_data *pio;
> @@ -1059,4 +1071,6 @@ const struct hci_io_ops mipi_i3c_hci_pio = {
>  	.request_ibi		= hci_pio_request_ibi,
>  	.free_ibi		= hci_pio_free_ibi,
>  	.recycle_ibi_slot	= hci_pio_recycle_ibi_slot,
> +	.suspend		= hci_pio_suspend,
> +	.resume			= hci_pio_resume,
>  };
> --
> 2.51.0
>
>
> --
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[PATCH 14/17] i3c: mipi-i3c-hci: Factor out software reset into helper

[Adrian Hunter]

Prepare for future reuse of the reset sequence in other contexts, such as
power management.  Move the software reset logic from i3c_hci_init() into a
dedicated helper function, i3c_hci_software_reset().

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
---
 drivers/i3c/master/mipi-i3c-hci/core.c | 41 ++++++++++++++++++--------
 1 file changed, 29 insertions(+), 12 deletions(-)

diff --git a/drivers/i3c/master/mipi-i3c-hci/core.c b/drivers/i3c/master/mipi-i3c-hci/core.c
index c4b249fde764..3b0609cb7da7 100644
--- a/drivers/i3c/master/mipi-i3c-hci/core.c
+++ b/drivers/i3c/master/mipi-i3c-hci/core.c
@@ -585,6 +585,34 @@ static irqreturn_t i3c_hci_irq_handler(int irq, void *dev_id)
 	return result;
 }
 
+static int i3c_hci_software_reset(struct i3c_hci *hci)
+{
+	u32 regval;
+	int ret;
+
+	/*
+	 * SOFT_RST must be clear before we write to it.
+	 * Then we must wait until it clears again.
+	 */
+	ret = readx_poll_timeout(reg_read, RESET_CONTROL, regval,
+				 !(regval & SOFT_RST), 0, 10 * USEC_PER_MSEC);
+	if (ret) {
+		dev_err(&hci->master.dev, "%s: Software reset stuck\n", __func__);
+		return ret;
+	}
+
+	reg_write(RESET_CONTROL, SOFT_RST);
+
+	ret = readx_poll_timeout(reg_read, RESET_CONTROL, regval,
+				 !(regval & SOFT_RST), 0, 10 * USEC_PER_MSEC);
+	if (ret) {
+		dev_err(&hci->master.dev, "%s: Software reset failed\n", __func__);
+		return ret;
+	}
+
+	return 0;
+}
+
 static int i3c_hci_init(struct i3c_hci *hci)
 {
 	bool size_in_dwords, mode_selector;
@@ -654,18 +682,7 @@ static int i3c_hci_init(struct i3c_hci *hci)
 	if (ret)
 		return ret;
 
-	/*
-	 * Now let's reset the hardware.
-	 * SOFT_RST must be clear before we write to it.
-	 * Then we must wait until it clears again.
-	 */
-	ret = readx_poll_timeout(reg_read, RESET_CONTROL, regval,
-				 !(regval & SOFT_RST), 1, 10000);
-	if (ret)
-		return -ENXIO;
-	reg_write(RESET_CONTROL, SOFT_RST);
-	ret = readx_poll_timeout(reg_read, RESET_CONTROL, regval,
-				 !(regval & SOFT_RST), 1, 10000);
+	ret = i3c_hci_software_reset(hci);
 	if (ret)
 		return -ENXIO;
 
-- 
2.51.0


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Re: [PATCH 14/17] i3c: mipi-i3c-hci: Factor out software reset into helper

[Frank Li]

On Fri, Dec 19, 2025 at 04:45:31PM +0200, Adrian Hunter wrote:
> Prepare for future reuse of the reset sequence in other contexts, such as
> power management.  Move the software reset logic from i3c_hci_init() into a
> dedicated helper function, i3c_hci_software_reset().

Add sentense about add error message when timeout happen.

Frank

>
> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
> ---
>  drivers/i3c/master/mipi-i3c-hci/core.c | 41 ++++++++++++++++++--------
>  1 file changed, 29 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/i3c/master/mipi-i3c-hci/core.c b/drivers/i3c/master/mipi-i3c-hci/core.c
> index c4b249fde764..3b0609cb7da7 100644
> --- a/drivers/i3c/master/mipi-i3c-hci/core.c
> +++ b/drivers/i3c/master/mipi-i3c-hci/core.c
> @@ -585,6 +585,34 @@ static irqreturn_t i3c_hci_irq_handler(int irq, void *dev_id)
>  	return result;
>  }
>
> +static int i3c_hci_software_reset(struct i3c_hci *hci)
> +{
> +	u32 regval;
> +	int ret;
> +
> +	/*
> +	 * SOFT_RST must be clear before we write to it.
> +	 * Then we must wait until it clears again.
> +	 */
> +	ret = readx_poll_timeout(reg_read, RESET_CONTROL, regval,
> +				 !(regval & SOFT_RST), 0, 10 * USEC_PER_MSEC);
> +	if (ret) {
> +		dev_err(&hci->master.dev, "%s: Software reset stuck\n", __func__);
> +		return ret;
> +	}
> +
> +	reg_write(RESET_CONTROL, SOFT_RST);
> +
> +	ret = readx_poll_timeout(reg_read, RESET_CONTROL, regval,
> +				 !(regval & SOFT_RST), 0, 10 * USEC_PER_MSEC);
> +	if (ret) {
> +		dev_err(&hci->master.dev, "%s: Software reset failed\n", __func__);
> +		return ret;
> +	}
> +
> +	return 0;
> +}
> +
>  static int i3c_hci_init(struct i3c_hci *hci)
>  {
>  	bool size_in_dwords, mode_selector;
> @@ -654,18 +682,7 @@ static int i3c_hci_init(struct i3c_hci *hci)
>  	if (ret)
>  		return ret;
>
> -	/*
> -	 * Now let's reset the hardware.
> -	 * SOFT_RST must be clear before we write to it.
> -	 * Then we must wait until it clears again.
> -	 */
> -	ret = readx_poll_timeout(reg_read, RESET_CONTROL, regval,
> -				 !(regval & SOFT_RST), 1, 10000);
> -	if (ret)
> -		return -ENXIO;
> -	reg_write(RESET_CONTROL, SOFT_RST);
> -	ret = readx_poll_timeout(reg_read, RESET_CONTROL, regval,
> -				 !(regval & SOFT_RST), 1, 10000);
> +	ret = i3c_hci_software_reset(hci);
>  	if (ret)
>  		return -ENXIO;
>
> --
> 2.51.0
>
>
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[PATCH 15/17] i3c: master: Introduce optional Runtime PM support

[Adrian Hunter]

Master drivers currently manage Runtime PM individually, but all require
runtime resume for bus operations.  This can be centralized in common code.

Add optional Runtime PM support to ensure the parent device is runtime
resumed before bus operations and auto-suspended afterward.

Notably, do not call ->bus_cleanup() if runtime resume fails.  Master
drivers that opt-in to core runtime PM support must take that into account.

Also provide an option to allow IBIs and hot-joins while runtime suspended.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
---
 drivers/i3c/device.c       | 46 +++++++++++++++++--
 drivers/i3c/internals.h    |  4 ++
 drivers/i3c/master.c       | 93 +++++++++++++++++++++++++++++++++++---
 include/linux/i3c/master.h |  4 ++
 4 files changed, 138 insertions(+), 9 deletions(-)

diff --git a/drivers/i3c/device.c b/drivers/i3c/device.c
index 8a156f5ad692..101eaa77de68 100644
--- a/drivers/i3c/device.c
+++ b/drivers/i3c/device.c
@@ -46,10 +46,16 @@ int i3c_device_do_xfers(struct i3c_device *dev, struct i3c_xfer *xfers,
 			return -EINVAL;
 	}
 
+	ret = i3c_bus_rpm_get(dev->bus);
+	if (ret)
+		return ret;
+
 	i3c_bus_normaluse_lock(dev->bus);
 	ret = i3c_dev_do_xfers_locked(dev->desc, xfers, nxfers, mode);
 	i3c_bus_normaluse_unlock(dev->bus);
 
+	i3c_bus_rpm_put(dev->bus);
+
 	return ret;
 }
 EXPORT_SYMBOL_GPL(i3c_device_do_xfers);
@@ -66,10 +72,16 @@ int i3c_device_do_setdasa(struct i3c_device *dev)
 {
 	int ret;
 
+	ret = i3c_bus_rpm_get(dev->bus);
+	if (ret)
+		return ret;
+
 	i3c_bus_normaluse_lock(dev->bus);
 	ret = i3c_dev_setdasa_locked(dev->desc);
 	i3c_bus_normaluse_unlock(dev->bus);
 
+	i3c_bus_rpm_put(dev->bus);
+
 	return ret;
 }
 EXPORT_SYMBOL_GPL(i3c_device_do_setdasa);
@@ -106,16 +118,27 @@ EXPORT_SYMBOL_GPL(i3c_device_get_info);
  */
 int i3c_device_disable_ibi(struct i3c_device *dev)
 {
-	int ret = -ENOENT;
+	int ret;
+
+	if (i3c_bus_rpm_ibi_allowed(dev->bus)) {
+		ret = i3c_bus_rpm_get(dev->bus);
+		if (ret)
+			return ret;
+	}
 
 	i3c_bus_normaluse_lock(dev->bus);
 	if (dev->desc) {
 		mutex_lock(&dev->desc->ibi_lock);
 		ret = i3c_dev_disable_ibi_locked(dev->desc);
 		mutex_unlock(&dev->desc->ibi_lock);
+	} else {
+		ret = -ENOENT;
 	}
 	i3c_bus_normaluse_unlock(dev->bus);
 
+	if (!ret || i3c_bus_rpm_ibi_allowed(dev->bus))
+		i3c_bus_rpm_put(dev->bus);
+
 	return ret;
 }
 EXPORT_SYMBOL_GPL(i3c_device_disable_ibi);
@@ -135,16 +158,25 @@ EXPORT_SYMBOL_GPL(i3c_device_disable_ibi);
  */
 int i3c_device_enable_ibi(struct i3c_device *dev)
 {
-	int ret = -ENOENT;
+	int ret;
+
+	ret = i3c_bus_rpm_get(dev->bus);
+	if (ret)
+		return ret;
 
 	i3c_bus_normaluse_lock(dev->bus);
 	if (dev->desc) {
 		mutex_lock(&dev->desc->ibi_lock);
 		ret = i3c_dev_enable_ibi_locked(dev->desc);
 		mutex_unlock(&dev->desc->ibi_lock);
+	} else {
+		ret = -ENOENT;
 	}
 	i3c_bus_normaluse_unlock(dev->bus);
 
+	if (ret || i3c_bus_rpm_ibi_allowed(dev->bus))
+		i3c_bus_rpm_put(dev->bus);
+
 	return ret;
 }
 EXPORT_SYMBOL_GPL(i3c_device_enable_ibi);
@@ -163,19 +195,27 @@ EXPORT_SYMBOL_GPL(i3c_device_enable_ibi);
 int i3c_device_request_ibi(struct i3c_device *dev,
 			   const struct i3c_ibi_setup *req)
 {
-	int ret = -ENOENT;
+	int ret;
 
 	if (!req->handler || !req->num_slots)
 		return -EINVAL;
 
+	ret = i3c_bus_rpm_get(dev->bus);
+	if (ret)
+		return ret;
+
 	i3c_bus_normaluse_lock(dev->bus);
 	if (dev->desc) {
 		mutex_lock(&dev->desc->ibi_lock);
 		ret = i3c_dev_request_ibi_locked(dev->desc, req);
 		mutex_unlock(&dev->desc->ibi_lock);
+	} else {
+		ret = -ENOENT;
 	}
 	i3c_bus_normaluse_unlock(dev->bus);
 
+	i3c_bus_rpm_put(dev->bus);
+
 	return ret;
 }
 EXPORT_SYMBOL_GPL(i3c_device_request_ibi);
diff --git a/drivers/i3c/internals.h b/drivers/i3c/internals.h
index f609e5098137..0f1f3f766623 100644
--- a/drivers/i3c/internals.h
+++ b/drivers/i3c/internals.h
@@ -11,6 +11,10 @@
 #include <linux/i3c/master.h>
 #include <linux/io.h>
 
+int __must_check i3c_bus_rpm_get(struct i3c_bus *bus);
+void i3c_bus_rpm_put(struct i3c_bus *bus);
+bool i3c_bus_rpm_ibi_allowed(struct i3c_bus *bus);
+
 void i3c_bus_normaluse_lock(struct i3c_bus *bus);
 void i3c_bus_normaluse_unlock(struct i3c_bus *bus);
 
diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c
index ff6cbc044787..594d61edcef4 100644
--- a/drivers/i3c/master.c
+++ b/drivers/i3c/master.c
@@ -106,6 +106,38 @@ static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev)
 	return container_of(dev, struct i3c_master_controller, dev);
 }
 
+static int __must_check i3c_master_rpm_get(struct i3c_master_controller *master)
+{
+	int ret = master->rpm_allowed ? pm_runtime_resume_and_get(master->dev.parent) : 0;
+
+	if (ret < 0) {
+		dev_err(master->dev.parent, "runtime resume failed, error %d\n", ret);
+		return ret;
+	}
+	return 0;
+}
+
+static void i3c_master_rpm_put(struct i3c_master_controller *master)
+{
+	if (master->rpm_allowed)
+		pm_runtime_put_autosuspend(master->dev.parent);
+}
+
+int i3c_bus_rpm_get(struct i3c_bus *bus)
+{
+	return i3c_master_rpm_get(i3c_bus_to_i3c_master(bus));
+}
+
+void i3c_bus_rpm_put(struct i3c_bus *bus)
+{
+	i3c_master_rpm_put(i3c_bus_to_i3c_master(bus));
+}
+
+bool i3c_bus_rpm_ibi_allowed(struct i3c_bus *bus)
+{
+	return i3c_bus_to_i3c_master(bus)->rpm_ibi_allowed;
+}
+
 static const struct device_type i3c_device_type;
 
 static struct i3c_bus *dev_to_i3cbus(struct device *dev)
@@ -611,6 +643,12 @@ static int i3c_set_hotjoin(struct i3c_master_controller *master, bool enable)
 	if (!master->ops->enable_hotjoin || !master->ops->disable_hotjoin)
 		return -EINVAL;
 
+	if (enable || master->rpm_ibi_allowed) {
+		ret = i3c_master_rpm_get(master);
+		if (ret)
+			return ret;
+	}
+
 	i3c_bus_normaluse_lock(&master->bus);
 
 	if (enable)
@@ -623,6 +661,9 @@ static int i3c_set_hotjoin(struct i3c_master_controller *master, bool enable)
 
 	i3c_bus_normaluse_unlock(&master->bus);
 
+	if ((enable && ret) || (!enable && !ret) || master->rpm_ibi_allowed)
+		i3c_master_rpm_put(master);
+
 	return ret;
 }
 
@@ -1712,18 +1753,23 @@ int i3c_master_do_daa(struct i3c_master_controller *master)
 {
 	int ret;
 
+	ret = i3c_master_rpm_get(master);
+	if (ret)
+		return ret;
+
 	i3c_bus_maintenance_lock(&master->bus);
 	ret = master->ops->do_daa(master);
 	i3c_bus_maintenance_unlock(&master->bus);
 
 	if (ret)
-		return ret;
+		goto out;
 
 	i3c_bus_normaluse_lock(&master->bus);
 	i3c_master_register_new_i3c_devs(master);
 	i3c_bus_normaluse_unlock(&master->bus);
-
-	return 0;
+out:
+	i3c_master_rpm_put(master);
+	return ret;
 }
 EXPORT_SYMBOL_GPL(i3c_master_do_daa);
 
@@ -2065,8 +2111,17 @@ static int i3c_master_bus_init(struct i3c_master_controller *master)
 
 static void i3c_master_bus_cleanup(struct i3c_master_controller *master)
 {
-	if (master->ops->bus_cleanup)
-		master->ops->bus_cleanup(master);
+	if (master->ops->bus_cleanup) {
+		int ret = i3c_master_rpm_get(master);
+
+		if (ret) {
+			dev_err(&master->dev,
+				"runtime resume error: master bus_cleanup() not done\n");
+		} else {
+			master->ops->bus_cleanup(master);
+			i3c_master_rpm_put(master);
+		}
+	}
 
 	i3c_master_detach_free_devs(master);
 }
@@ -2421,6 +2476,10 @@ static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
 			return -EOPNOTSUPP;
 	}
 
+	ret = i3c_master_rpm_get(master);
+	if (ret)
+		return ret;
+
 	i3c_bus_normaluse_lock(&master->bus);
 	dev = i3c_master_find_i2c_dev_by_addr(master, addr);
 	if (!dev)
@@ -2429,6 +2488,8 @@ static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
 		ret = master->ops->i2c_xfers(dev, xfers, nxfers);
 	i3c_bus_normaluse_unlock(&master->bus);
 
+	i3c_master_rpm_put(master);
+
 	return ret ? ret : nxfers;
 }
 
@@ -2531,6 +2592,10 @@ static int i3c_i2c_notifier_call(struct notifier_block *nb, unsigned long action
 
 	master = i2c_adapter_to_i3c_master(adap);
 
+	ret = i3c_master_rpm_get(master);
+	if (ret)
+		return ret;
+
 	i3c_bus_maintenance_lock(&master->bus);
 	switch (action) {
 	case BUS_NOTIFY_ADD_DEVICE:
@@ -2544,6 +2609,8 @@ static int i3c_i2c_notifier_call(struct notifier_block *nb, unsigned long action
 	}
 	i3c_bus_maintenance_unlock(&master->bus);
 
+	i3c_master_rpm_put(master);
+
 	return ret;
 }
 
@@ -2881,6 +2948,10 @@ int i3c_master_register(struct i3c_master_controller *master,
 	INIT_LIST_HEAD(&master->boardinfo.i2c);
 	INIT_LIST_HEAD(&master->boardinfo.i3c);
 
+	ret = i3c_master_rpm_get(master);
+	if (ret)
+		return ret;
+
 	device_initialize(&master->dev);
 	dev_set_name(&master->dev, "i3c-%d", i3cbus->id);
 
@@ -2960,6 +3031,8 @@ int i3c_master_register(struct i3c_master_controller *master,
 	i3c_master_register_new_i3c_devs(master);
 	i3c_bus_normaluse_unlock(&master->bus);
 
+	i3c_master_rpm_put(master);
+
 	return 0;
 
 err_del_dev:
@@ -2969,6 +3042,7 @@ int i3c_master_register(struct i3c_master_controller *master,
 	i3c_master_bus_cleanup(master);
 
 err_put_dev:
+	i3c_master_rpm_put(master);
 	put_device(&master->dev);
 
 	return ret;
@@ -3114,8 +3188,15 @@ void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev)
 		return;
 
 	if (dev->ibi->enabled) {
+		int ret;
+
 		dev_err(&master->dev, "Freeing IBI that is still enabled\n");
-		if (i3c_dev_disable_ibi_locked(dev))
+		ret = i3c_master_rpm_get(master);
+		if (!ret) {
+			ret = i3c_dev_disable_ibi_locked(dev);
+			i3c_master_rpm_put(master);
+		}
+		if (ret)
 			dev_err(&master->dev, "Failed to disable IBI before freeing\n");
 	}
 
diff --git a/include/linux/i3c/master.h b/include/linux/i3c/master.h
index 6225ad28f210..c1ec597f655c 100644
--- a/include/linux/i3c/master.h
+++ b/include/linux/i3c/master.h
@@ -504,6 +504,8 @@ struct i3c_master_controller_ops {
  * @secondary: true if the master is a secondary master
  * @init_done: true when the bus initialization is done
  * @hotjoin: true if the master support hotjoin
+ * @rpm_allowed: true if Runtime PM allowed
+ * @rpm_ibi_allowed: true if IBI and Hot-Join allowed while runtime suspended
  * @boardinfo.i3c: list of I3C  boardinfo objects
  * @boardinfo.i2c: list of I2C boardinfo objects
  * @boardinfo: board-level information attached to devices connected on the bus
@@ -527,6 +529,8 @@ struct i3c_master_controller {
 	unsigned int secondary : 1;
 	unsigned int init_done : 1;
 	unsigned int hotjoin: 1;
+	unsigned int rpm_allowed: 1;
+	unsigned int rpm_ibi_allowed: 1;
 	struct {
 		struct list_head i3c;
 		struct list_head i2c;
-- 
2.51.0


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Re: [PATCH 15/17] i3c: master: Introduce optional Runtime PM support

[Frank Li]

On Fri, Dec 19, 2025 at 04:45:32PM +0200, Adrian Hunter wrote:
> Master drivers currently manage Runtime PM individually, but all require
> runtime resume for bus operations.  This can be centralized in common code.
>
> Add optional Runtime PM support to ensure the parent device is runtime
> resumed before bus operations and auto-suspended afterward.
>
> Notably, do not call ->bus_cleanup() if runtime resume fails.  Master
> drivers that opt-in to core runtime PM support must take that into account.
>
> Also provide an option to allow IBIs and hot-joins while runtime suspended.
>
> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
> ---
>  drivers/i3c/device.c       | 46 +++++++++++++++++--
>  drivers/i3c/internals.h    |  4 ++
>  drivers/i3c/master.c       | 93 +++++++++++++++++++++++++++++++++++---
>  include/linux/i3c/master.h |  4 ++
>  4 files changed, 138 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/i3c/device.c b/drivers/i3c/device.c
> index 8a156f5ad692..101eaa77de68 100644
> --- a/drivers/i3c/device.c
> +++ b/drivers/i3c/device.c
> @@ -46,10 +46,16 @@ int i3c_device_do_xfers(struct i3c_device *dev, struct i3c_xfer *xfers,
>  			return -EINVAL;
>  	}
>
> +	ret = i3c_bus_rpm_get(dev->bus);

Is it i3c_bus_rpm_get(dev)?  dev->bus is parent of dev. in case i3c
periphal need enable clock or other run time pm enable call back?

> +	if (ret)
> +		return ret;
> +
>  	i3c_bus_normaluse_lock(dev->bus);
>  	ret = i3c_dev_do_xfers_locked(dev->desc, xfers, nxfers, mode);
>  	i3c_bus_normaluse_unlock(dev->bus);
>
> +	i3c_bus_rpm_put(dev->bus);
> +
>  	return ret;
>  }
...
>
> +static int __must_check i3c_master_rpm_get(struct i3c_master_controller *master)
> +{
> +	int ret = master->rpm_allowed ? pm_runtime_resume_and_get(master->dev.parent) : 0;

I think rpm_allowed is not necessary. If don't allow rpm,  i3c bus driver
should disable runtime_pm.

I remember pm_runtime_resume_and_get() do nothing if runtime_pm disabled
(need double check).

Frank

> +
> +	if (ret < 0) {
> +		dev_err(master->dev.parent, "runtime resume failed, error %d\n", ret);
> +		return ret;
> +	}
> +	return 0;
> +}
> +
> +static void i3c_master_rpm_put(struct i3c_master_controller *master)
> +{
> +	if (master->rpm_allowed)
> +		pm_runtime_put_autosuspend(master->dev.parent);
> +}
> +
> +int i3c_bus_rpm_get(struct i3c_bus *bus)
> +{
> +	return i3c_master_rpm_get(i3c_bus_to_i3c_master(bus));
> +}
> +
> +void i3c_bus_rpm_put(struct i3c_bus *bus)
> +{
> +	i3c_master_rpm_put(i3c_bus_to_i3c_master(bus));
> +}
> +
> +bool i3c_bus_rpm_ibi_allowed(struct i3c_bus *bus)
> +{
> +	return i3c_bus_to_i3c_master(bus)->rpm_ibi_allowed;
> +}
> +
>  static const struct device_type i3c_device_type;
>
>  static struct i3c_bus *dev_to_i3cbus(struct device *dev)
> @@ -611,6 +643,12 @@ static int i3c_set_hotjoin(struct i3c_master_controller *master, bool enable)
>  	if (!master->ops->enable_hotjoin || !master->ops->disable_hotjoin)
>  		return -EINVAL;
>
> +	if (enable || master->rpm_ibi_allowed) {
> +		ret = i3c_master_rpm_get(master);
> +		if (ret)
> +			return ret;
> +	}
> +
>  	i3c_bus_normaluse_lock(&master->bus);
>
>  	if (enable)
> @@ -623,6 +661,9 @@ static int i3c_set_hotjoin(struct i3c_master_controller *master, bool enable)
>
>  	i3c_bus_normaluse_unlock(&master->bus);
>
> +	if ((enable && ret) || (!enable && !ret) || master->rpm_ibi_allowed)
> +		i3c_master_rpm_put(master);
> +
>  	return ret;
>  }
>
> @@ -1712,18 +1753,23 @@ int i3c_master_do_daa(struct i3c_master_controller *master)
>  {
>  	int ret;
>
> +	ret = i3c_master_rpm_get(master);
> +	if (ret)
> +		return ret;
> +
>  	i3c_bus_maintenance_lock(&master->bus);
>  	ret = master->ops->do_daa(master);
>  	i3c_bus_maintenance_unlock(&master->bus);
>
>  	if (ret)
> -		return ret;
> +		goto out;
>
>  	i3c_bus_normaluse_lock(&master->bus);
>  	i3c_master_register_new_i3c_devs(master);
>  	i3c_bus_normaluse_unlock(&master->bus);
> -
> -	return 0;
> +out:
> +	i3c_master_rpm_put(master);
> +	return ret;
>  }
>  EXPORT_SYMBOL_GPL(i3c_master_do_daa);
>
> @@ -2065,8 +2111,17 @@ static int i3c_master_bus_init(struct i3c_master_controller *master)
>
>  static void i3c_master_bus_cleanup(struct i3c_master_controller *master)
>  {
> -	if (master->ops->bus_cleanup)
> -		master->ops->bus_cleanup(master);
> +	if (master->ops->bus_cleanup) {
> +		int ret = i3c_master_rpm_get(master);
> +
> +		if (ret) {
> +			dev_err(&master->dev,
> +				"runtime resume error: master bus_cleanup() not done\n");
> +		} else {
> +			master->ops->bus_cleanup(master);
> +			i3c_master_rpm_put(master);
> +		}
> +	}
>
>  	i3c_master_detach_free_devs(master);
>  }
> @@ -2421,6 +2476,10 @@ static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
>  			return -EOPNOTSUPP;
>  	}
>
> +	ret = i3c_master_rpm_get(master);
> +	if (ret)
> +		return ret;
> +
>  	i3c_bus_normaluse_lock(&master->bus);
>  	dev = i3c_master_find_i2c_dev_by_addr(master, addr);
>  	if (!dev)
> @@ -2429,6 +2488,8 @@ static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
>  		ret = master->ops->i2c_xfers(dev, xfers, nxfers);
>  	i3c_bus_normaluse_unlock(&master->bus);
>
> +	i3c_master_rpm_put(master);
> +
>  	return ret ? ret : nxfers;
>  }
>
> @@ -2531,6 +2592,10 @@ static int i3c_i2c_notifier_call(struct notifier_block *nb, unsigned long action
>
>  	master = i2c_adapter_to_i3c_master(adap);
>
> +	ret = i3c_master_rpm_get(master);
> +	if (ret)
> +		return ret;
> +
>  	i3c_bus_maintenance_lock(&master->bus);
>  	switch (action) {
>  	case BUS_NOTIFY_ADD_DEVICE:
> @@ -2544,6 +2609,8 @@ static int i3c_i2c_notifier_call(struct notifier_block *nb, unsigned long action
>  	}
>  	i3c_bus_maintenance_unlock(&master->bus);
>
> +	i3c_master_rpm_put(master);
> +
>  	return ret;
>  }
>
> @@ -2881,6 +2948,10 @@ int i3c_master_register(struct i3c_master_controller *master,
>  	INIT_LIST_HEAD(&master->boardinfo.i2c);
>  	INIT_LIST_HEAD(&master->boardinfo.i3c);
>
> +	ret = i3c_master_rpm_get(master);
> +	if (ret)
> +		return ret;
> +
>  	device_initialize(&master->dev);
>  	dev_set_name(&master->dev, "i3c-%d", i3cbus->id);
>
> @@ -2960,6 +3031,8 @@ int i3c_master_register(struct i3c_master_controller *master,
>  	i3c_master_register_new_i3c_devs(master);
>  	i3c_bus_normaluse_unlock(&master->bus);
>
> +	i3c_master_rpm_put(master);
> +
>  	return 0;
>
>  err_del_dev:
> @@ -2969,6 +3042,7 @@ int i3c_master_register(struct i3c_master_controller *master,
>  	i3c_master_bus_cleanup(master);
>
>  err_put_dev:
> +	i3c_master_rpm_put(master);
>  	put_device(&master->dev);
>
>  	return ret;
> @@ -3114,8 +3188,15 @@ void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev)
>  		return;
>
>  	if (dev->ibi->enabled) {
> +		int ret;
> +
>  		dev_err(&master->dev, "Freeing IBI that is still enabled\n");
> -		if (i3c_dev_disable_ibi_locked(dev))
> +		ret = i3c_master_rpm_get(master);
> +		if (!ret) {
> +			ret = i3c_dev_disable_ibi_locked(dev);
> +			i3c_master_rpm_put(master);
> +		}
> +		if (ret)
>  			dev_err(&master->dev, "Failed to disable IBI before freeing\n");
>  	}
>
> diff --git a/include/linux/i3c/master.h b/include/linux/i3c/master.h
> index 6225ad28f210..c1ec597f655c 100644
> --- a/include/linux/i3c/master.h
> +++ b/include/linux/i3c/master.h
> @@ -504,6 +504,8 @@ struct i3c_master_controller_ops {
>   * @secondary: true if the master is a secondary master
>   * @init_done: true when the bus initialization is done
>   * @hotjoin: true if the master support hotjoin
> + * @rpm_allowed: true if Runtime PM allowed
> + * @rpm_ibi_allowed: true if IBI and Hot-Join allowed while runtime suspended
>   * @boardinfo.i3c: list of I3C  boardinfo objects
>   * @boardinfo.i2c: list of I2C boardinfo objects
>   * @boardinfo: board-level information attached to devices connected on the bus
> @@ -527,6 +529,8 @@ struct i3c_master_controller {
>  	unsigned int secondary : 1;
>  	unsigned int init_done : 1;
>  	unsigned int hotjoin: 1;
> +	unsigned int rpm_allowed: 1;
> +	unsigned int rpm_ibi_allowed: 1;
>  	struct {
>  		struct list_head i3c;
>  		struct list_head i2c;
> --
> 2.51.0
>
>
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Re: [PATCH 15/17] i3c: master: Introduce optional Runtime PM support

[Frank Li]

On Fri, Dec 19, 2025 at 12:08:22PM -0500, Frank Li wrote:
> On Fri, Dec 19, 2025 at 04:45:32PM +0200, Adrian Hunter wrote:
> > Master drivers currently manage Runtime PM individually, but all require
> > runtime resume for bus operations.  This can be centralized in common code.
> >
> > Add optional Runtime PM support to ensure the parent device is runtime
> > resumed before bus operations and auto-suspended afterward.
> >
> > Notably, do not call ->bus_cleanup() if runtime resume fails.  Master
> > drivers that opt-in to core runtime PM support must take that into account.
> >
> > Also provide an option to allow IBIs and hot-joins while runtime suspended.
> >
> > Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
> > ---
> >  drivers/i3c/device.c       | 46 +++++++++++++++++--
> >  drivers/i3c/internals.h    |  4 ++
> >  drivers/i3c/master.c       | 93 +++++++++++++++++++++++++++++++++++---
> >  include/linux/i3c/master.h |  4 ++
> >  4 files changed, 138 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/i3c/device.c b/drivers/i3c/device.c
> > index 8a156f5ad692..101eaa77de68 100644
> > --- a/drivers/i3c/device.c
> > +++ b/drivers/i3c/device.c
> > @@ -46,10 +46,16 @@ int i3c_device_do_xfers(struct i3c_device *dev, struct i3c_xfer *xfers,
> >  			return -EINVAL;
> >  	}
> >
> > +	ret = i3c_bus_rpm_get(dev->bus);
>
> Is it i3c_bus_rpm_get(dev)?  dev->bus is parent of dev. in case i3c
> periphal need enable clock or other run time pm enable call back?

After second think, it should be fine use dev->bus here.

Frank
>
> > +	if (ret)
> > +		return ret;
> > +
> >  	i3c_bus_normaluse_lock(dev->bus);
> >  	ret = i3c_dev_do_xfers_locked(dev->desc, xfers, nxfers, mode);
> >  	i3c_bus_normaluse_unlock(dev->bus);
> >
> > +	i3c_bus_rpm_put(dev->bus);
> > +
> >  	return ret;
> >  }
> ...
> >
> > +static int __must_check i3c_master_rpm_get(struct i3c_master_controller *master)
> > +{
> > +	int ret = master->rpm_allowed ? pm_runtime_resume_and_get(master->dev.parent) : 0;
>
> I think rpm_allowed is not necessary. If don't allow rpm,  i3c bus driver
> should disable runtime_pm.
>
> I remember pm_runtime_resume_and_get() do nothing if runtime_pm disabled
> (need double check).
>
> Frank
>
> > +
> > +	if (ret < 0) {
> > +		dev_err(master->dev.parent, "runtime resume failed, error %d\n", ret);
> > +		return ret;
> > +	}
> > +	return 0;
> > +}
> > +
> > +static void i3c_master_rpm_put(struct i3c_master_controller *master)
> > +{
> > +	if (master->rpm_allowed)
> > +		pm_runtime_put_autosuspend(master->dev.parent);
> > +}
> > +
> > +int i3c_bus_rpm_get(struct i3c_bus *bus)
> > +{
> > +	return i3c_master_rpm_get(i3c_bus_to_i3c_master(bus));
> > +}
> > +
> > +void i3c_bus_rpm_put(struct i3c_bus *bus)
> > +{
> > +	i3c_master_rpm_put(i3c_bus_to_i3c_master(bus));
> > +}
> > +
> > +bool i3c_bus_rpm_ibi_allowed(struct i3c_bus *bus)
> > +{
> > +	return i3c_bus_to_i3c_master(bus)->rpm_ibi_allowed;
> > +}
> > +
> >  static const struct device_type i3c_device_type;
> >
> >  static struct i3c_bus *dev_to_i3cbus(struct device *dev)
> > @@ -611,6 +643,12 @@ static int i3c_set_hotjoin(struct i3c_master_controller *master, bool enable)
> >  	if (!master->ops->enable_hotjoin || !master->ops->disable_hotjoin)
> >  		return -EINVAL;
> >
> > +	if (enable || master->rpm_ibi_allowed) {
> > +		ret = i3c_master_rpm_get(master);
> > +		if (ret)
> > +			return ret;
> > +	}
> > +
> >  	i3c_bus_normaluse_lock(&master->bus);
> >
> >  	if (enable)
> > @@ -623,6 +661,9 @@ static int i3c_set_hotjoin(struct i3c_master_controller *master, bool enable)
> >
> >  	i3c_bus_normaluse_unlock(&master->bus);
> >
> > +	if ((enable && ret) || (!enable && !ret) || master->rpm_ibi_allowed)
> > +		i3c_master_rpm_put(master);
> > +
> >  	return ret;
> >  }
> >
> > @@ -1712,18 +1753,23 @@ int i3c_master_do_daa(struct i3c_master_controller *master)
> >  {
> >  	int ret;
> >
> > +	ret = i3c_master_rpm_get(master);
> > +	if (ret)
> > +		return ret;
> > +
> >  	i3c_bus_maintenance_lock(&master->bus);
> >  	ret = master->ops->do_daa(master);
> >  	i3c_bus_maintenance_unlock(&master->bus);
> >
> >  	if (ret)
> > -		return ret;
> > +		goto out;
> >
> >  	i3c_bus_normaluse_lock(&master->bus);
> >  	i3c_master_register_new_i3c_devs(master);
> >  	i3c_bus_normaluse_unlock(&master->bus);
> > -
> > -	return 0;
> > +out:
> > +	i3c_master_rpm_put(master);
> > +	return ret;
> >  }
> >  EXPORT_SYMBOL_GPL(i3c_master_do_daa);
> >
> > @@ -2065,8 +2111,17 @@ static int i3c_master_bus_init(struct i3c_master_controller *master)
> >
> >  static void i3c_master_bus_cleanup(struct i3c_master_controller *master)
> >  {
> > -	if (master->ops->bus_cleanup)
> > -		master->ops->bus_cleanup(master);
> > +	if (master->ops->bus_cleanup) {
> > +		int ret = i3c_master_rpm_get(master);
> > +
> > +		if (ret) {
> > +			dev_err(&master->dev,
> > +				"runtime resume error: master bus_cleanup() not done\n");
> > +		} else {
> > +			master->ops->bus_cleanup(master);
> > +			i3c_master_rpm_put(master);
> > +		}
> > +	}
> >
> >  	i3c_master_detach_free_devs(master);
> >  }
> > @@ -2421,6 +2476,10 @@ static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
> >  			return -EOPNOTSUPP;
> >  	}
> >
> > +	ret = i3c_master_rpm_get(master);
> > +	if (ret)
> > +		return ret;
> > +
> >  	i3c_bus_normaluse_lock(&master->bus);
> >  	dev = i3c_master_find_i2c_dev_by_addr(master, addr);
> >  	if (!dev)
> > @@ -2429,6 +2488,8 @@ static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
> >  		ret = master->ops->i2c_xfers(dev, xfers, nxfers);
> >  	i3c_bus_normaluse_unlock(&master->bus);
> >
> > +	i3c_master_rpm_put(master);
> > +
> >  	return ret ? ret : nxfers;
> >  }
> >
> > @@ -2531,6 +2592,10 @@ static int i3c_i2c_notifier_call(struct notifier_block *nb, unsigned long action
> >
> >  	master = i2c_adapter_to_i3c_master(adap);
> >
> > +	ret = i3c_master_rpm_get(master);
> > +	if (ret)
> > +		return ret;
> > +
> >  	i3c_bus_maintenance_lock(&master->bus);
> >  	switch (action) {
> >  	case BUS_NOTIFY_ADD_DEVICE:
> > @@ -2544,6 +2609,8 @@ static int i3c_i2c_notifier_call(struct notifier_block *nb, unsigned long action
> >  	}
> >  	i3c_bus_maintenance_unlock(&master->bus);
> >
> > +	i3c_master_rpm_put(master);
> > +
> >  	return ret;
> >  }
> >
> > @@ -2881,6 +2948,10 @@ int i3c_master_register(struct i3c_master_controller *master,
> >  	INIT_LIST_HEAD(&master->boardinfo.i2c);
> >  	INIT_LIST_HEAD(&master->boardinfo.i3c);
> >
> > +	ret = i3c_master_rpm_get(master);
> > +	if (ret)
> > +		return ret;
> > +
> >  	device_initialize(&master->dev);
> >  	dev_set_name(&master->dev, "i3c-%d", i3cbus->id);
> >
> > @@ -2960,6 +3031,8 @@ int i3c_master_register(struct i3c_master_controller *master,
> >  	i3c_master_register_new_i3c_devs(master);
> >  	i3c_bus_normaluse_unlock(&master->bus);
> >
> > +	i3c_master_rpm_put(master);
> > +
> >  	return 0;
> >
> >  err_del_dev:
> > @@ -2969,6 +3042,7 @@ int i3c_master_register(struct i3c_master_controller *master,
> >  	i3c_master_bus_cleanup(master);
> >
> >  err_put_dev:
> > +	i3c_master_rpm_put(master);
> >  	put_device(&master->dev);
> >
> >  	return ret;
> > @@ -3114,8 +3188,15 @@ void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev)
> >  		return;
> >
> >  	if (dev->ibi->enabled) {
> > +		int ret;
> > +
> >  		dev_err(&master->dev, "Freeing IBI that is still enabled\n");
> > -		if (i3c_dev_disable_ibi_locked(dev))
> > +		ret = i3c_master_rpm_get(master);
> > +		if (!ret) {
> > +			ret = i3c_dev_disable_ibi_locked(dev);
> > +			i3c_master_rpm_put(master);
> > +		}
> > +		if (ret)
> >  			dev_err(&master->dev, "Failed to disable IBI before freeing\n");
> >  	}
> >
> > diff --git a/include/linux/i3c/master.h b/include/linux/i3c/master.h
> > index 6225ad28f210..c1ec597f655c 100644
> > --- a/include/linux/i3c/master.h
> > +++ b/include/linux/i3c/master.h
> > @@ -504,6 +504,8 @@ struct i3c_master_controller_ops {
> >   * @secondary: true if the master is a secondary master
> >   * @init_done: true when the bus initialization is done
> >   * @hotjoin: true if the master support hotjoin
> > + * @rpm_allowed: true if Runtime PM allowed
> > + * @rpm_ibi_allowed: true if IBI and Hot-Join allowed while runtime suspended
> >   * @boardinfo.i3c: list of I3C  boardinfo objects
> >   * @boardinfo.i2c: list of I2C boardinfo objects
> >   * @boardinfo: board-level information attached to devices connected on the bus
> > @@ -527,6 +529,8 @@ struct i3c_master_controller {
> >  	unsigned int secondary : 1;
> >  	unsigned int init_done : 1;
> >  	unsigned int hotjoin: 1;
> > +	unsigned int rpm_allowed: 1;
> > +	unsigned int rpm_ibi_allowed: 1;
> >  	struct {
> >  		struct list_head i3c;
> >  		struct list_head i2c;
> > --
> > 2.51.0
> >
> >
> > --
> > linux-i3c mailing list
> > linux-i3c@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-i3c
>
> --
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> linux-i3c@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-i3c

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Re: [PATCH 15/17] i3c: master: Introduce optional Runtime PM support

[Adrian Hunter]

On 19/12/2025 19:08, Frank Li wrote:
> On Fri, Dec 19, 2025 at 04:45:32PM +0200, Adrian Hunter wrote:
>> Master drivers currently manage Runtime PM individually, but all require
>> runtime resume for bus operations.  This can be centralized in common code.
>>
>> Add optional Runtime PM support to ensure the parent device is runtime
>> resumed before bus operations and auto-suspended afterward.
>>
>> Notably, do not call ->bus_cleanup() if runtime resume fails.  Master
>> drivers that opt-in to core runtime PM support must take that into account.
>>
>> Also provide an option to allow IBIs and hot-joins while runtime suspended.
>>
>> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
>> ---
>>  drivers/i3c/device.c       | 46 +++++++++++++++++--
>>  drivers/i3c/internals.h    |  4 ++
>>  drivers/i3c/master.c       | 93 +++++++++++++++++++++++++++++++++++---
>>  include/linux/i3c/master.h |  4 ++
>>  4 files changed, 138 insertions(+), 9 deletions(-)
>>
>> diff --git a/drivers/i3c/device.c b/drivers/i3c/device.c
>> index 8a156f5ad692..101eaa77de68 100644
>> --- a/drivers/i3c/device.c
>> +++ b/drivers/i3c/device.c
>> @@ -46,10 +46,16 @@ int i3c_device_do_xfers(struct i3c_device *dev, struct i3c_xfer *xfers,
>>  			return -EINVAL;
>>  	}
>>
>> +	ret = i3c_bus_rpm_get(dev->bus);
> 
> Is it i3c_bus_rpm_get(dev)?  dev->bus is parent of dev. in case i3c
> periphal need enable clock or other run time pm enable call back?
> 
>> +	if (ret)
>> +		return ret;
>> +
>>  	i3c_bus_normaluse_lock(dev->bus);
>>  	ret = i3c_dev_do_xfers_locked(dev->desc, xfers, nxfers, mode);
>>  	i3c_bus_normaluse_unlock(dev->bus);
>>
>> +	i3c_bus_rpm_put(dev->bus);
>> +
>>  	return ret;
>>  }
> ...
>>
>> +static int __must_check i3c_master_rpm_get(struct i3c_master_controller *master)
>> +{
>> +	int ret = master->rpm_allowed ? pm_runtime_resume_and_get(master->dev.parent) : 0;
> 
> I think rpm_allowed is not necessary. If don't allow rpm,  i3c bus driver
> should disable runtime_pm.
> 
> I remember pm_runtime_resume_and_get() do nothing if runtime_pm disabled
> (need double check).

Yes that would be OK for drivers that do not enable runtime PM,
but the drivers that do enable runtime PM (i.e. dw-i3c-master.c
and svc-i3c-master.c) might be affected.


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[PATCH 16/17] i3c: mipi-i3c-hci: Add optional Runtime PM support

[Adrian Hunter]

Implement optional Runtime PM support for the MIPI I3C HCI driver.
Introduce runtime suspend and resume callbacks to manage bus state and
restore hardware configuration after resume.  Optionally enable autosuspend
with a default delay of 1 second, and add helper functions to control
Runtime PM during probe and remove.

Read quirks from i3c_hci_driver_ids[] and set new quirk
HCI_QUIRK_RPM_ALLOWED for intel-lpss-i3c devices to enable runtime PM for
them.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
---
 drivers/i3c/master/mipi-i3c-hci/core.c | 96 +++++++++++++++++++++++++-
 drivers/i3c/master/mipi-i3c-hci/hci.h  |  2 +
 2 files changed, 96 insertions(+), 2 deletions(-)

diff --git a/drivers/i3c/master/mipi-i3c-hci/core.c b/drivers/i3c/master/mipi-i3c-hci/core.c
index 3b0609cb7da7..9a8d34ae4a66 100644
--- a/drivers/i3c/master/mipi-i3c-hci/core.c
+++ b/drivers/i3c/master/mipi-i3c-hci/core.c
@@ -16,6 +16,7 @@
 #include <linux/module.h>
 #include <linux/platform_data/mipi-i3c-hci.h>
 #include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
 
 #include "hci.h"
 #include "ext_caps.h"
@@ -176,6 +177,7 @@ void i3c_hci_sync_irq_inactive(struct i3c_hci *hci)
 	int irq = platform_get_irq(pdev, 0);
 
 	reg_write(INTR_SIGNAL_ENABLE, 0x0);
+	hci->irq_inactive = true;
 	synchronize_irq(irq);
 }
 
@@ -558,6 +560,14 @@ static irqreturn_t i3c_hci_irq_handler(int irq, void *dev_id)
 	irqreturn_t result = IRQ_NONE;
 	u32 val;
 
+	/*
+	 * The IRQ can be shared, so the handler may be called when the IRQ is
+	 * due to a different device. That could happen when runtime suspended,
+	 * so exit immediately if IRQs are not expected for this device.
+	 */
+	if (hci->irq_inactive)
+		return IRQ_NONE;
+
 	val = reg_read(INTR_STATUS);
 	reg_write(INTR_STATUS, val);
 	dev_dbg(&hci->master.dev, "INTR_STATUS %#x", val);
@@ -613,6 +623,70 @@ static int i3c_hci_software_reset(struct i3c_hci *hci)
 	return 0;
 }
 
+static int i3c_hci_runtime_suspend(struct device *dev)
+{
+	struct i3c_hci *hci = dev_get_drvdata(dev);
+	int ret;
+
+	ret = i3c_hci_bus_disable(hci);
+	if (ret)
+		return ret;
+
+	hci->io->suspend(hci);
+
+	return 0;
+}
+
+static int i3c_hci_runtime_resume(struct device *dev)
+{
+	struct i3c_hci *hci = dev_get_drvdata(dev);
+	int ret;
+
+	ret = i3c_hci_software_reset(hci);
+	if (ret)
+		return -EIO;
+
+	reg_write(INTR_SIGNAL_ENABLE, 0x0);
+	reg_write(INTR_STATUS_ENABLE, GENMASK(31, 10));
+
+	reg_clear(HC_CONTROL, HC_CONTROL_PIO_MODE);
+
+	reg_write(MASTER_DEVICE_ADDR,
+		  MASTER_DYNAMIC_ADDR(hci->master.this->info.dyn_addr) |
+		  MASTER_DYNAMIC_ADDR_VALID);
+
+	mipi_i3c_hci_dat_v1.restore(hci);
+
+	hci->irq_inactive = false;
+
+	hci->io->resume(hci);
+
+	reg_set(HC_CONTROL, HC_CONTROL_BUS_ENABLE);
+
+	return 0;
+}
+
+#define DEFAULT_AUTOSUSPEND_DELAY_MS 1000
+
+static void i3c_hci_rpm_enable(struct device *dev)
+{
+	struct i3c_hci *hci = dev_get_drvdata(dev);
+
+	pm_runtime_set_autosuspend_delay(dev, DEFAULT_AUTOSUSPEND_DELAY_MS);
+	pm_runtime_use_autosuspend(dev);
+	pm_runtime_set_active(dev);
+	pm_runtime_enable(dev);
+
+	hci->master.rpm_allowed = true;
+}
+
+static void i3c_hci_rpm_disable(struct device *dev)
+{
+	pm_runtime_disable(dev);
+	pm_runtime_set_suspended(dev);
+	pm_runtime_dont_use_autosuspend(dev);
+}
+
 static int i3c_hci_init(struct i3c_hci *hci)
 {
 	bool size_in_dwords, mode_selector;
@@ -806,6 +880,8 @@ static int i3c_hci_probe(struct platform_device *pdev)
 	hci->master.dev.init_name = dev_name(&pdev->dev);
 
 	hci->quirks = (unsigned long)device_get_match_data(&pdev->dev);
+	if (!hci->quirks && platform_get_device_id(pdev))
+		hci->quirks = platform_get_device_id(pdev)->driver_data;
 
 	ret = i3c_hci_init(hci);
 	if (ret)
@@ -817,12 +893,20 @@ static int i3c_hci_probe(struct platform_device *pdev)
 	if (ret)
 		return ret;
 
+	if (hci->quirks & HCI_QUIRK_RPM_ALLOWED)
+		i3c_hci_rpm_enable(&pdev->dev);
+
 	ret = i3c_master_register(&hci->master, &pdev->dev,
 				  &i3c_hci_ops, false);
 	if (ret)
-		return ret;
+		goto err_rpm_disable;
 
 	return 0;
+
+err_rpm_disable:
+	if (hci->quirks & HCI_QUIRK_RPM_ALLOWED)
+		i3c_hci_rpm_disable(&pdev->dev);
+	return ret;
 }
 
 static void i3c_hci_remove(struct platform_device *pdev)
@@ -830,6 +914,9 @@ static void i3c_hci_remove(struct platform_device *pdev)
 	struct i3c_hci *hci = platform_get_drvdata(pdev);
 
 	i3c_master_unregister(&hci->master);
+
+	if (hci->quirks & HCI_QUIRK_RPM_ALLOWED)
+		i3c_hci_rpm_disable(&pdev->dev);
 }
 
 static const __maybe_unused struct of_device_id i3c_hci_of_match[] = {
@@ -845,11 +932,15 @@ static const struct acpi_device_id i3c_hci_acpi_match[] = {
 MODULE_DEVICE_TABLE(acpi, i3c_hci_acpi_match);
 
 static const struct platform_device_id i3c_hci_driver_ids[] = {
-	{ .name = "intel-lpss-i3c" },
+	{ .name = "intel-lpss-i3c", HCI_QUIRK_RPM_ALLOWED },
 	{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(platform, i3c_hci_driver_ids);
 
+static const struct dev_pm_ops i3c_hci_pm_ops = {
+	SET_RUNTIME_PM_OPS(i3c_hci_runtime_suspend, i3c_hci_runtime_resume, NULL)
+};
+
 static struct platform_driver i3c_hci_driver = {
 	.probe = i3c_hci_probe,
 	.remove = i3c_hci_remove,
@@ -858,6 +949,7 @@ static struct platform_driver i3c_hci_driver = {
 		.name = "mipi-i3c-hci",
 		.of_match_table = of_match_ptr(i3c_hci_of_match),
 		.acpi_match_table = i3c_hci_acpi_match,
+		.pm = pm_ptr(&i3c_hci_pm_ops),
 	},
 };
 module_platform_driver(i3c_hci_driver);
diff --git a/drivers/i3c/master/mipi-i3c-hci/hci.h b/drivers/i3c/master/mipi-i3c-hci/hci.h
index 38f927685d3b..6339adf4b67a 100644
--- a/drivers/i3c/master/mipi-i3c-hci/hci.h
+++ b/drivers/i3c/master/mipi-i3c-hci/hci.h
@@ -51,6 +51,7 @@ struct i3c_hci {
 	void *io_data;
 	const struct hci_cmd_ops *cmd;
 	atomic_t next_cmd_tid;
+	bool irq_inactive;
 	u32 caps;
 	unsigned int quirks;
 	unsigned int DAT_entries;
@@ -143,6 +144,7 @@ struct i3c_hci_dev_data {
 #define HCI_QUIRK_PIO_MODE	BIT(2)  /* Set PIO mode for AMD platforms */
 #define HCI_QUIRK_OD_PP_TIMING		BIT(3)  /* Set OD and PP timings for AMD platforms */
 #define HCI_QUIRK_RESP_BUF_THLD		BIT(4)  /* Set resp buf thld to 0 for AMD platforms */
+#define HCI_QUIRK_RPM_ALLOWED		BIT(5)  /* Runtime PM allowed */
 
 /* global functions */
 void mipi_i3c_hci_resume(struct i3c_hci *hci);
-- 
2.51.0


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Re: [PATCH 16/17] i3c: mipi-i3c-hci: Add optional Runtime PM support

[Frank Li]

On Fri, Dec 19, 2025 at 04:45:33PM +0200, Adrian Hunter wrote:
> Implement optional Runtime PM support for the MIPI I3C HCI driver.
> Introduce runtime suspend and resume callbacks to manage bus state and
> restore hardware configuration after resume.  Optionally enable autosuspend
> with a default delay of 1 second, and add helper functions to control
> Runtime PM during probe and remove.
>
> Read quirks from i3c_hci_driver_ids[] and set new quirk
> HCI_QUIRK_RPM_ALLOWED for intel-lpss-i3c devices to enable runtime PM for
> them.
>
> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
> ---
>  drivers/i3c/master/mipi-i3c-hci/core.c | 96 +++++++++++++++++++++++++-
>  drivers/i3c/master/mipi-i3c-hci/hci.h  |  2 +
>  2 files changed, 96 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/i3c/master/mipi-i3c-hci/core.c b/drivers/i3c/master/mipi-i3c-hci/core.c
> index 3b0609cb7da7..9a8d34ae4a66 100644
> --- a/drivers/i3c/master/mipi-i3c-hci/core.c
> +++ b/drivers/i3c/master/mipi-i3c-hci/core.c
> @@ -16,6 +16,7 @@
>  #include <linux/module.h>
>  #include <linux/platform_data/mipi-i3c-hci.h>
>  #include <linux/platform_device.h>
> +#include <linux/pm_runtime.h>
>
>  #include "hci.h"
>  #include "ext_caps.h"
> @@ -176,6 +177,7 @@ void i3c_hci_sync_irq_inactive(struct i3c_hci *hci)
>  	int irq = platform_get_irq(pdev, 0);
>
>  	reg_write(INTR_SIGNAL_ENABLE, 0x0);
> +	hci->irq_inactive = true;
>  	synchronize_irq(irq);
>  }
>
> @@ -558,6 +560,14 @@ static irqreturn_t i3c_hci_irq_handler(int irq, void *dev_id)
>  	irqreturn_t result = IRQ_NONE;
>  	u32 val;
>
> +	/*
> +	 * The IRQ can be shared, so the handler may be called when the IRQ is
> +	 * due to a different device. That could happen when runtime suspended,
> +	 * so exit immediately if IRQs are not expected for this device.
> +	 */
> +	if (hci->irq_inactive)
> +		return IRQ_NONE;
> +
>  	val = reg_read(INTR_STATUS);
>  	reg_write(INTR_STATUS, val);
>  	dev_dbg(&hci->master.dev, "INTR_STATUS %#x", val);
> @@ -613,6 +623,70 @@ static int i3c_hci_software_reset(struct i3c_hci *hci)
>  	return 0;
>  }
>
> +static int i3c_hci_runtime_suspend(struct device *dev)
> +{
> +	struct i3c_hci *hci = dev_get_drvdata(dev);
> +	int ret;
> +
> +	ret = i3c_hci_bus_disable(hci);
> +	if (ret)
> +		return ret;
> +
> +	hci->io->suspend(hci);
> +
> +	return 0;
> +}
> +
> +static int i3c_hci_runtime_resume(struct device *dev)
> +{
> +	struct i3c_hci *hci = dev_get_drvdata(dev);
> +	int ret;
> +
> +	ret = i3c_hci_software_reset(hci);
> +	if (ret)
> +		return -EIO;
> +
> +	reg_write(INTR_SIGNAL_ENABLE, 0x0);
> +	reg_write(INTR_STATUS_ENABLE, GENMASK(31, 10));
> +
> +	reg_clear(HC_CONTROL, HC_CONTROL_PIO_MODE);
> +
> +	reg_write(MASTER_DEVICE_ADDR,
> +		  MASTER_DYNAMIC_ADDR(hci->master.this->info.dyn_addr) |
> +		  MASTER_DYNAMIC_ADDR_VALID);
> +

Is it possible move these register write to one of help function?

> +	mipi_i3c_hci_dat_v1.restore(hci);
> +
> +	hci->irq_inactive = false;
> +
> +	hci->io->resume(hci);
> +
> +	reg_set(HC_CONTROL, HC_CONTROL_BUS_ENABLE);
> +
> +	return 0;
> +}
> +
> +#define DEFAULT_AUTOSUSPEND_DELAY_MS 1000
> +
> +static void i3c_hci_rpm_enable(struct device *dev)
> +{
> +	struct i3c_hci *hci = dev_get_drvdata(dev);
> +
> +	pm_runtime_set_autosuspend_delay(dev, DEFAULT_AUTOSUSPEND_DELAY_MS);
> +	pm_runtime_use_autosuspend(dev);
> +	pm_runtime_set_active(dev);
> +	pm_runtime_enable(dev);

use devm_pm_runtime_enable() can simple some code

> +
> +	hci->master.rpm_allowed = true;
> +}
> +
> +static void i3c_hci_rpm_disable(struct device *dev)
> +{
> +	pm_runtime_disable(dev);
> +	pm_runtime_set_suspended(dev);
> +	pm_runtime_dont_use_autosuspend(dev);
> +}
> +
>  static int i3c_hci_init(struct i3c_hci *hci)
>  {
>  	bool size_in_dwords, mode_selector;
> @@ -806,6 +880,8 @@ static int i3c_hci_probe(struct platform_device *pdev)
>  	hci->master.dev.init_name = dev_name(&pdev->dev);
>
>  	hci->quirks = (unsigned long)device_get_match_data(&pdev->dev);
> +	if (!hci->quirks && platform_get_device_id(pdev))
> +		hci->quirks = platform_get_device_id(pdev)->driver_data;
>
>  	ret = i3c_hci_init(hci);
>  	if (ret)
> @@ -817,12 +893,20 @@ static int i3c_hci_probe(struct platform_device *pdev)
>  	if (ret)
>  		return ret;
>
> +	if (hci->quirks & HCI_QUIRK_RPM_ALLOWED)
> +		i3c_hci_rpm_enable(&pdev->dev);
> +
>  	ret = i3c_master_register(&hci->master, &pdev->dev,
>  				  &i3c_hci_ops, false);
>  	if (ret)
> -		return ret;
> +		goto err_rpm_disable;
>
>  	return 0;
> +
> +err_rpm_disable:
> +	if (hci->quirks & HCI_QUIRK_RPM_ALLOWED)
> +		i3c_hci_rpm_disable(&pdev->dev);
> +	return ret;
>  }
>
>  static void i3c_hci_remove(struct platform_device *pdev)
> @@ -830,6 +914,9 @@ static void i3c_hci_remove(struct platform_device *pdev)
>  	struct i3c_hci *hci = platform_get_drvdata(pdev);
>
>  	i3c_master_unregister(&hci->master);
> +
> +	if (hci->quirks & HCI_QUIRK_RPM_ALLOWED)
> +		i3c_hci_rpm_disable(&pdev->dev);
>  }
>
>  static const __maybe_unused struct of_device_id i3c_hci_of_match[] = {
> @@ -845,11 +932,15 @@ static const struct acpi_device_id i3c_hci_acpi_match[] = {
>  MODULE_DEVICE_TABLE(acpi, i3c_hci_acpi_match);
>
>  static const struct platform_device_id i3c_hci_driver_ids[] = {
> -	{ .name = "intel-lpss-i3c" },
> +	{ .name = "intel-lpss-i3c", HCI_QUIRK_RPM_ALLOWED },
>  	{ /* sentinel */ }
>  };
>  MODULE_DEVICE_TABLE(platform, i3c_hci_driver_ids);
>
> +static const struct dev_pm_ops i3c_hci_pm_ops = {
> +	SET_RUNTIME_PM_OPS(i3c_hci_runtime_suspend, i3c_hci_runtime_resume, NULL)

new macro RUNTIME_PM_OPS

Frank
> +};
> +
>  static struct platform_driver i3c_hci_driver = {
>  	.probe = i3c_hci_probe,
>  	.remove = i3c_hci_remove,
> @@ -858,6 +949,7 @@ static struct platform_driver i3c_hci_driver = {
>  		.name = "mipi-i3c-hci",
>  		.of_match_table = of_match_ptr(i3c_hci_of_match),
>  		.acpi_match_table = i3c_hci_acpi_match,
> +		.pm = pm_ptr(&i3c_hci_pm_ops),
>  	},
>  };
>  module_platform_driver(i3c_hci_driver);
> diff --git a/drivers/i3c/master/mipi-i3c-hci/hci.h b/drivers/i3c/master/mipi-i3c-hci/hci.h
> index 38f927685d3b..6339adf4b67a 100644
> --- a/drivers/i3c/master/mipi-i3c-hci/hci.h
> +++ b/drivers/i3c/master/mipi-i3c-hci/hci.h
> @@ -51,6 +51,7 @@ struct i3c_hci {
>  	void *io_data;
>  	const struct hci_cmd_ops *cmd;
>  	atomic_t next_cmd_tid;
> +	bool irq_inactive;
>  	u32 caps;
>  	unsigned int quirks;
>  	unsigned int DAT_entries;
> @@ -143,6 +144,7 @@ struct i3c_hci_dev_data {
>  #define HCI_QUIRK_PIO_MODE	BIT(2)  /* Set PIO mode for AMD platforms */
>  #define HCI_QUIRK_OD_PP_TIMING		BIT(3)  /* Set OD and PP timings for AMD platforms */
>  #define HCI_QUIRK_RESP_BUF_THLD		BIT(4)  /* Set resp buf thld to 0 for AMD platforms */
> +#define HCI_QUIRK_RPM_ALLOWED		BIT(5)  /* Runtime PM allowed */
>
>  /* global functions */
>  void mipi_i3c_hci_resume(struct i3c_hci *hci);
> --
> 2.51.0
>
>
> --
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[PATCH 17/17] i3c: mipi-i3c-hci-pci: Add Runtime PM support

[Adrian Hunter]

Enable Runtime PM for the mipi_i3c_hci_pci driver. Introduce helpers to
allow and forbid Runtime PM during probe and remove, using pm_runtime APIs.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
---
 .../i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c  | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c
index 458f871a2e61..1b38771667e5 100644
--- a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c
+++ b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c
@@ -18,6 +18,7 @@
 #include <linux/platform_data/mipi-i3c-hci.h>
 #include <linux/platform_device.h>
 #include <linux/pm_qos.h>
+#include <linux/pm_runtime.h>
 
 /*
  * There can up to 15 instances, but implementations have at most 2 at this
@@ -208,6 +209,18 @@ static const struct mipi_i3c_hci_pci_info intel_si_2_info = {
 	.instance_count = 1,
 };
 
+static void mipi_i3c_hci_pci_rpm_allow(struct device *dev)
+{
+	pm_runtime_put(dev);
+	pm_runtime_allow(dev);
+}
+
+static void mipi_i3c_hci_pci_rpm_forbid(struct device *dev)
+{
+	pm_runtime_forbid(dev);
+	pm_runtime_get_sync(dev);
+}
+
 struct mipi_i3c_hci_pci_cell_data {
 	struct mipi_i3c_hci_platform_data pdata;
 	struct resource res;
@@ -285,6 +298,8 @@ static int mipi_i3c_hci_pci_probe(struct pci_dev *pci,
 
 	pci_set_drvdata(pci, hci);
 
+	mipi_i3c_hci_pci_rpm_allow(&pci->dev);
+
 	return 0;
 
 err_exit:
@@ -300,6 +315,8 @@ static void mipi_i3c_hci_pci_remove(struct pci_dev *pci)
 	if (hci->info->exit)
 		hci->info->exit(hci);
 
+	mipi_i3c_hci_pci_rpm_forbid(&pci->dev);
+
 	mfd_remove_devices(&pci->dev);
 }
 
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Re: [PATCH 17/17] i3c: mipi-i3c-hci-pci: Add Runtime PM support

[Frank Li]

On Fri, Dec 19, 2025 at 04:45:34PM +0200, Adrian Hunter wrote:
> Enable Runtime PM for the mipi_i3c_hci_pci driver. Introduce helpers to
> allow and forbid Runtime PM during probe and remove, using pm_runtime APIs.
>
> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
> ---
>  .../i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c  | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
>
> diff --git a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c
> index 458f871a2e61..1b38771667e5 100644
> --- a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c
> +++ b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c
> @@ -18,6 +18,7 @@
>  #include <linux/platform_data/mipi-i3c-hci.h>
>  #include <linux/platform_device.h>
>  #include <linux/pm_qos.h>
> +#include <linux/pm_runtime.h>
>
>  /*
>   * There can up to 15 instances, but implementations have at most 2 at this
> @@ -208,6 +209,18 @@ static const struct mipi_i3c_hci_pci_info intel_si_2_info = {
>  	.instance_count = 1,
>  };
>
> +static void mipi_i3c_hci_pci_rpm_allow(struct device *dev)
> +{
> +	pm_runtime_put(dev);
> +	pm_runtime_allow(dev);

why not pm_runtime_enable() but you use pm_runtime_allow()?

Frank

> +}
> +
> +static void mipi_i3c_hci_pci_rpm_forbid(struct device *dev)
> +{
> +	pm_runtime_forbid(dev);
> +	pm_runtime_get_sync(dev);
> +}
> +
>  struct mipi_i3c_hci_pci_cell_data {
>  	struct mipi_i3c_hci_platform_data pdata;
>  	struct resource res;
> @@ -285,6 +298,8 @@ static int mipi_i3c_hci_pci_probe(struct pci_dev *pci,
>
>  	pci_set_drvdata(pci, hci);
>
> +	mipi_i3c_hci_pci_rpm_allow(&pci->dev);
> +
>  	return 0;
>
>  err_exit:
> @@ -300,6 +315,8 @@ static void mipi_i3c_hci_pci_remove(struct pci_dev *pci)
>  	if (hci->info->exit)
>  		hci->info->exit(hci);
>
> +	mipi_i3c_hci_pci_rpm_forbid(&pci->dev);
> +
>  	mfd_remove_devices(&pci->dev);
>  }
>
> --
> 2.51.0
>
>
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Re: [PATCH 17/17] i3c: mipi-i3c-hci-pci: Add Runtime PM support

[Adrian Hunter]

On 19/12/2025 19:21, Frank Li wrote:
> On Fri, Dec 19, 2025 at 04:45:34PM +0200, Adrian Hunter wrote:
>> Enable Runtime PM for the mipi_i3c_hci_pci driver. Introduce helpers to
>> allow and forbid Runtime PM during probe and remove, using pm_runtime APIs.
>>
>> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
>> ---
>>  .../i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c  | 17 +++++++++++++++++
>>  1 file changed, 17 insertions(+)
>>
>> diff --git a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c
>> index 458f871a2e61..1b38771667e5 100644
>> --- a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c
>> +++ b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c
>> @@ -18,6 +18,7 @@
>>  #include <linux/platform_data/mipi-i3c-hci.h>
>>  #include <linux/platform_device.h>
>>  #include <linux/pm_qos.h>
>> +#include <linux/pm_runtime.h>
>>
>>  /*
>>   * There can up to 15 instances, but implementations have at most 2 at this
>> @@ -208,6 +209,18 @@ static const struct mipi_i3c_hci_pci_info intel_si_2_info = {
>>  	.instance_count = 1,
>>  };
>>
>> +static void mipi_i3c_hci_pci_rpm_allow(struct device *dev)
>> +{
>> +	pm_runtime_put(dev);
>> +	pm_runtime_allow(dev);
> 
> why not pm_runtime_enable() but you use pm_runtime_allow()?

That is how the PCI bus does things.

There is pm_runtime_forbid() and pm_runtime_enable() in pci_pm_init(),
and then pm_runtime_get_sync() in local_pci_probe().

Refer to:

	commit 967577b062417b4e4b8e27b711220f4124f5153a
	Author: Ying Huang <huang.ying.caritas@gmail.com>
	Date:   Tue Nov 20 16:08:22 2012 +0800

	    PCI/PM: Keep runtime PM enabled for unbound PCI devices

	commit bb910a7040e90a0ca3d3e8245d6d5c128a5d1287
	Author: Rafael J. Wysocki <rjw@rjwysocki.net>
	Date:   Sat Feb 27 21:37:37 2010 +0100

	    PCI/PM Runtime: Make runtime PM of PCI devices inactive by default


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