* [PATCH v5 1/3] dt-bindings: i3c: snps: Add Altera SoCFPGA compatible
2025-11-04 7:29 [PATCH v5 0/3] i3c: dw: Add Altera Agilex5 runtime PM disable quirk adrianhoyin.ng
@ 2025-11-04 7:29 ` adrianhoyin.ng
2025-11-04 7:29 ` [PATCH v5 2/3] arm64: dts: intel: agilex5: Add Altera compatible for I3C controllers adrianhoyin.ng
` (2 subsequent siblings)
3 siblings, 0 replies; 7+ messages in thread
From: adrianhoyin.ng @ 2025-11-04 7:29 UTC (permalink / raw)
To: alexandre.belloni, Frank.Li, wsa+renesas, robh, krzk+dt, conor+dt,
dinguyen, linux-i3c, devicetree, linux-kernel
Cc: adrianhoyin.ng, Krzysztof Kozlowski
From: Adrian Ng Ho Yin <adrianhoyin.ng@altera.com>
Add the "altr,agilex5-dw-i3c-master" compatible string to the
Synopsys DesignWare I3C master binding. This allow Agilex5 to
use the generic DW I3C master controller while applying any
required platform-specific quirks.
Signed-off-by: Adrian Ng Ho Yin <adrianhoyin.ng@altera.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
---
.../devicetree/bindings/i3c/snps,dw-i3c-master.yaml | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml b/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml
index 5f6467375811..e803457d3f55 100644
--- a/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml
+++ b/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml
@@ -14,7 +14,11 @@ allOf:
properties:
compatible:
- const: snps,dw-i3c-master-1.00a
+ oneOf:
+ - const: snps,dw-i3c-master-1.00a
+ - items:
+ - const: altr,agilex5-dw-i3c-master
+ - const: snps,dw-i3c-master-1.00a
reg:
maxItems: 1
--
2.49.GIT
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^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v5 2/3] arm64: dts: intel: agilex5: Add Altera compatible for I3C controllers
2025-11-04 7:29 [PATCH v5 0/3] i3c: dw: Add Altera Agilex5 runtime PM disable quirk adrianhoyin.ng
2025-11-04 7:29 ` [PATCH v5 1/3] dt-bindings: i3c: snps: Add Altera SoCFPGA compatible adrianhoyin.ng
@ 2025-11-04 7:29 ` adrianhoyin.ng
2025-11-12 18:59 ` Dinh Nguyen
2025-11-04 7:29 ` [PATCH v5 3/3] i3c: dw: Disable runtime PM on Agilex5 to avoid bus hang on IBI adrianhoyin.ng
2025-11-08 21:56 ` (subset) [PATCH v5 0/3] i3c: dw: Add Altera Agilex5 runtime PM disable quirk Alexandre Belloni
3 siblings, 1 reply; 7+ messages in thread
From: adrianhoyin.ng @ 2025-11-04 7:29 UTC (permalink / raw)
To: alexandre.belloni, Frank.Li, wsa+renesas, robh, krzk+dt, conor+dt,
dinguyen, linux-i3c, devicetree, linux-kernel
Cc: adrianhoyin.ng
From: Adrian Ng Ho Yin <adrianhoyin.ng@altera.com>
Add the "altr,agilex5-dw-i3c-master" compatible string to the
I3C controller nodes on the Agilex5 SoCFPGA platform.
Signed-off-by: Adrian Ng Ho Yin <adrianhoyin.ng@altera.com>
---
arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
index 04e99cd7e74b..5c8ad5e9b248 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
@@ -203,7 +203,8 @@ i2c4: i2c@10c02c00 {
};
i3c0: i3c@10da0000 {
- compatible = "snps,dw-i3c-master-1.00a";
+ compatible = "altr,agilex5-dw-i3c-master",
+ "snps,dw-i3c-master-1.00a";
reg = <0x10da0000 0x1000>;
#address-cells = <3>;
#size-cells = <0>;
@@ -213,7 +214,8 @@ i3c0: i3c@10da0000 {
};
i3c1: i3c@10da1000 {
- compatible = "snps,dw-i3c-master-1.00a";
+ compatible = "altr,agilex5-dw-i3c-master",
+ "snps,dw-i3c-master-1.00a";
reg = <0x10da1000 0x1000>;
#address-cells = <3>;
#size-cells = <0>;
--
2.49.GIT
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^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH v5 2/3] arm64: dts: intel: agilex5: Add Altera compatible for I3C controllers
2025-11-04 7:29 ` [PATCH v5 2/3] arm64: dts: intel: agilex5: Add Altera compatible for I3C controllers adrianhoyin.ng
@ 2025-11-12 18:59 ` Dinh Nguyen
0 siblings, 0 replies; 7+ messages in thread
From: Dinh Nguyen @ 2025-11-12 18:59 UTC (permalink / raw)
To: adrianhoyin.ng, alexandre.belloni, Frank.Li, wsa+renesas, robh,
krzk+dt, conor+dt, linux-i3c, devicetree, linux-kernel
On 11/4/25 01:29, adrianhoyin.ng@altera.com wrote:
> From: Adrian Ng Ho Yin <adrianhoyin.ng@altera.com>
>
> Add the "altr,agilex5-dw-i3c-master" compatible string to the
> I3C controller nodes on the Agilex5 SoCFPGA platform.
>
> Signed-off-by: Adrian Ng Ho Yin <adrianhoyin.ng@altera.com>
> ---
> arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> index 04e99cd7e74b..5c8ad5e9b248 100644
> --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
Applied!
--
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^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v5 3/3] i3c: dw: Disable runtime PM on Agilex5 to avoid bus hang on IBI
2025-11-04 7:29 [PATCH v5 0/3] i3c: dw: Add Altera Agilex5 runtime PM disable quirk adrianhoyin.ng
2025-11-04 7:29 ` [PATCH v5 1/3] dt-bindings: i3c: snps: Add Altera SoCFPGA compatible adrianhoyin.ng
2025-11-04 7:29 ` [PATCH v5 2/3] arm64: dts: intel: agilex5: Add Altera compatible for I3C controllers adrianhoyin.ng
@ 2025-11-04 7:29 ` adrianhoyin.ng
2025-11-04 16:56 ` Frank Li
2025-11-08 21:56 ` (subset) [PATCH v5 0/3] i3c: dw: Add Altera Agilex5 runtime PM disable quirk Alexandre Belloni
3 siblings, 1 reply; 7+ messages in thread
From: adrianhoyin.ng @ 2025-11-04 7:29 UTC (permalink / raw)
To: alexandre.belloni, Frank.Li, wsa+renesas, robh, krzk+dt, conor+dt,
dinguyen, linux-i3c, devicetree, linux-kernel
Cc: adrianhoyin.ng
From: Adrian Ng Ho Yin <adrianhoyin.ng@altera.com>
When running compliance tests on the Altera Agilex5 SoCFPGA platform,
the I3C bus can hang when a slave issues an IBI after the DAA process
completes. The DesignWare I3C master enters runtime suspend once DAA
finishes and stops driving SCL, preventing the IBI transfer from
completing and leaving SDA stuck low.
Add a new compatible string, "altr,agilex5-dw-i3c-master" and apply a quirk
that keep runtime PM always active on this platform by calling
pm_runtime_get_noresume() during probe.
Prevent bus hangs triggered by IBIs on Agilex5 while maintaining keep the
same behavior on other platforms.
Signed-off-by: Adrian Ng Ho Yin <adrianhoyin.ng@altera.com>
---
drivers/i3c/master/dw-i3c-master.c | 31 +++++++++++++++++++++++++++++-
1 file changed, 30 insertions(+), 1 deletion(-)
diff --git a/drivers/i3c/master/dw-i3c-master.c b/drivers/i3c/master/dw-i3c-master.c
index 9ceedf09c3b6..276592a8222e 100644
--- a/drivers/i3c/master/dw-i3c-master.c
+++ b/drivers/i3c/master/dw-i3c-master.c
@@ -228,6 +228,7 @@
/* List of quirks */
#define AMD_I3C_OD_PP_TIMING BIT(1)
+#define DW_I3C_DISABLE_RUNTIME_PM_QUIRK BIT(2)
struct dw_i3c_cmd {
u32 cmd_lo;
@@ -252,6 +253,10 @@ struct dw_i3c_i2c_dev_data {
struct i3c_generic_ibi_pool *ibi_pool;
};
+struct dw_i3c_drvdata {
+ u32 flags;
+};
+
static bool dw_i3c_master_supports_ccc_cmd(struct i3c_master_controller *m,
const struct i3c_ccc_cmd *cmd)
{
@@ -1535,6 +1540,8 @@ int dw_i3c_common_probe(struct dw_i3c_master *master,
struct platform_device *pdev)
{
int ret, irq;
+ const struct dw_i3c_drvdata *drvdata;
+ unsigned long quirks = 0;
if (!master->platform_ops)
master->platform_ops = &dw_i3c_platform_ops_default;
@@ -1590,7 +1597,18 @@ int dw_i3c_common_probe(struct dw_i3c_master *master,
master->maxdevs = ret >> 16;
master->free_pos = GENMASK(master->maxdevs - 1, 0);
- master->quirks = (unsigned long)device_get_match_data(&pdev->dev);
+ if (has_acpi_companion(&pdev->dev)) {
+ quirks = (unsigned long)device_get_match_data(&pdev->dev);
+ } else if (pdev->dev.of_node) {
+ drvdata = device_get_match_data(&pdev->dev);
+ if (drvdata)
+ quirks = drvdata->flags;
+ }
+ master->quirks = quirks;
+
+ /* Keep controller enabled by preventing runtime suspend */
+ if (master->quirks & DW_I3C_DISABLE_RUNTIME_PM_QUIRK)
+ pm_runtime_get_noresume(&pdev->dev);
INIT_WORK(&master->hj_work, dw_i3c_hj_work);
ret = i3c_master_register(&master->base, &pdev->dev,
@@ -1617,6 +1635,10 @@ void dw_i3c_common_remove(struct dw_i3c_master *master)
cancel_work_sync(&master->hj_work);
i3c_master_unregister(&master->base);
+ /* Balance pm_runtime_get_noresume() from probe() */
+ if (master->quirks & DW_I3C_DISABLE_RUNTIME_PM_QUIRK)
+ pm_runtime_put_noidle(master->dev);
+
pm_runtime_disable(master->dev);
pm_runtime_set_suspended(master->dev);
pm_runtime_dont_use_autosuspend(master->dev);
@@ -1759,8 +1781,15 @@ static void dw_i3c_shutdown(struct platform_device *pdev)
pm_runtime_put_autosuspend(master->dev);
}
+static const struct dw_i3c_drvdata altr_agilex5_drvdata = {
+ .flags = DW_I3C_DISABLE_RUNTIME_PM_QUIRK,
+};
+
static const struct of_device_id dw_i3c_master_of_match[] = {
{ .compatible = "snps,dw-i3c-master-1.00a", },
+ { .compatible = "altr,agilex5-dw-i3c-master",
+ .data = &altr_agilex5_drvdata,
+ },
{},
};
MODULE_DEVICE_TABLE(of, dw_i3c_master_of_match);
--
2.49.GIT
--
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^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH v5 3/3] i3c: dw: Disable runtime PM on Agilex5 to avoid bus hang on IBI
2025-11-04 7:29 ` [PATCH v5 3/3] i3c: dw: Disable runtime PM on Agilex5 to avoid bus hang on IBI adrianhoyin.ng
@ 2025-11-04 16:56 ` Frank Li
0 siblings, 0 replies; 7+ messages in thread
From: Frank Li @ 2025-11-04 16:56 UTC (permalink / raw)
To: adrianhoyin.ng
Cc: alexandre.belloni, wsa+renesas, robh, krzk+dt, conor+dt, dinguyen,
linux-i3c, devicetree, linux-kernel
On Tue, Nov 04, 2025 at 03:29:08PM +0800, adrianhoyin.ng@altera.com wrote:
> From: Adrian Ng Ho Yin <adrianhoyin.ng@altera.com>
>
> When running compliance tests on the Altera Agilex5 SoCFPGA platform,
> the I3C bus can hang when a slave issues an IBI after the DAA process
> completes. The DesignWare I3C master enters runtime suspend once DAA
> finishes and stops driving SCL, preventing the IBI transfer from
> completing and leaving SDA stuck low.
>
> Add a new compatible string, "altr,agilex5-dw-i3c-master" and apply a quirk
> that keep runtime PM always active on this platform by calling
> pm_runtime_get_noresume() during probe.
>
> Prevent bus hangs triggered by IBIs on Agilex5 while maintaining keep the
> same behavior on other platforms.
>
> Signed-off-by: Adrian Ng Ho Yin <adrianhoyin.ng@altera.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
---
> drivers/i3c/master/dw-i3c-master.c | 31 +++++++++++++++++++++++++++++-
> 1 file changed, 30 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/i3c/master/dw-i3c-master.c b/drivers/i3c/master/dw-i3c-master.c
> index 9ceedf09c3b6..276592a8222e 100644
> --- a/drivers/i3c/master/dw-i3c-master.c
> +++ b/drivers/i3c/master/dw-i3c-master.c
> @@ -228,6 +228,7 @@
>
> /* List of quirks */
> #define AMD_I3C_OD_PP_TIMING BIT(1)
> +#define DW_I3C_DISABLE_RUNTIME_PM_QUIRK BIT(2)
>
> struct dw_i3c_cmd {
> u32 cmd_lo;
> @@ -252,6 +253,10 @@ struct dw_i3c_i2c_dev_data {
> struct i3c_generic_ibi_pool *ibi_pool;
> };
>
> +struct dw_i3c_drvdata {
> + u32 flags;
> +};
> +
> static bool dw_i3c_master_supports_ccc_cmd(struct i3c_master_controller *m,
> const struct i3c_ccc_cmd *cmd)
> {
> @@ -1535,6 +1540,8 @@ int dw_i3c_common_probe(struct dw_i3c_master *master,
> struct platform_device *pdev)
> {
> int ret, irq;
> + const struct dw_i3c_drvdata *drvdata;
> + unsigned long quirks = 0;
>
> if (!master->platform_ops)
> master->platform_ops = &dw_i3c_platform_ops_default;
> @@ -1590,7 +1597,18 @@ int dw_i3c_common_probe(struct dw_i3c_master *master,
> master->maxdevs = ret >> 16;
> master->free_pos = GENMASK(master->maxdevs - 1, 0);
>
> - master->quirks = (unsigned long)device_get_match_data(&pdev->dev);
> + if (has_acpi_companion(&pdev->dev)) {
> + quirks = (unsigned long)device_get_match_data(&pdev->dev);
> + } else if (pdev->dev.of_node) {
> + drvdata = device_get_match_data(&pdev->dev);
> + if (drvdata)
> + quirks = drvdata->flags;
> + }
> + master->quirks = quirks;
> +
> + /* Keep controller enabled by preventing runtime suspend */
> + if (master->quirks & DW_I3C_DISABLE_RUNTIME_PM_QUIRK)
> + pm_runtime_get_noresume(&pdev->dev);
>
> INIT_WORK(&master->hj_work, dw_i3c_hj_work);
> ret = i3c_master_register(&master->base, &pdev->dev,
> @@ -1617,6 +1635,10 @@ void dw_i3c_common_remove(struct dw_i3c_master *master)
> cancel_work_sync(&master->hj_work);
> i3c_master_unregister(&master->base);
>
> + /* Balance pm_runtime_get_noresume() from probe() */
> + if (master->quirks & DW_I3C_DISABLE_RUNTIME_PM_QUIRK)
> + pm_runtime_put_noidle(master->dev);
> +
> pm_runtime_disable(master->dev);
> pm_runtime_set_suspended(master->dev);
> pm_runtime_dont_use_autosuspend(master->dev);
> @@ -1759,8 +1781,15 @@ static void dw_i3c_shutdown(struct platform_device *pdev)
> pm_runtime_put_autosuspend(master->dev);
> }
>
> +static const struct dw_i3c_drvdata altr_agilex5_drvdata = {
> + .flags = DW_I3C_DISABLE_RUNTIME_PM_QUIRK,
> +};
> +
> static const struct of_device_id dw_i3c_master_of_match[] = {
> { .compatible = "snps,dw-i3c-master-1.00a", },
> + { .compatible = "altr,agilex5-dw-i3c-master",
> + .data = &altr_agilex5_drvdata,
> + },
> {},
> };
> MODULE_DEVICE_TABLE(of, dw_i3c_master_of_match);
> --
> 2.49.GIT
>
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^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: (subset) [PATCH v5 0/3] i3c: dw: Add Altera Agilex5 runtime PM disable quirk
2025-11-04 7:29 [PATCH v5 0/3] i3c: dw: Add Altera Agilex5 runtime PM disable quirk adrianhoyin.ng
` (2 preceding siblings ...)
2025-11-04 7:29 ` [PATCH v5 3/3] i3c: dw: Disable runtime PM on Agilex5 to avoid bus hang on IBI adrianhoyin.ng
@ 2025-11-08 21:56 ` Alexandre Belloni
3 siblings, 0 replies; 7+ messages in thread
From: Alexandre Belloni @ 2025-11-08 21:56 UTC (permalink / raw)
To: Frank.Li, wsa+renesas, robh, krzk+dt, conor+dt, dinguyen,
linux-i3c, devicetree, linux-kernel, adrianhoyin.ng
On Tue, 04 Nov 2025 15:29:05 +0800, adrianhoyin.ng@altera.com wrote:
> From: Adrian Ng Ho Yin <adrianhoyin.ng@altera.com>
>
> This patchset adds support for an Altera SoCFPGA-specific quirk
> in the Synopsys DesignWare I3C master driver.
>
> While running the I3C compliance test suite on the Altera Agilex5 SoCFPGA,
> the I3C bus was observed to hang when a slave device issued an IBI after
> the Dynamic Address Assignment (DAA) process completed.
>
> [...]
Applied, thanks!
[1/3] dt-bindings: i3c: snps: Add Altera SoCFPGA compatible
https://git.kernel.org/abelloni/c/8d1d2c408cc0
[3/3] i3c: dw: Disable runtime PM on Agilex5 to avoid bus hang on IBI
https://git.kernel.org/abelloni/c/fba0e56ee752
Best regards,
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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^ permalink raw reply [flat|nested] 7+ messages in thread