* [PATCH v8 1/4] i3c: add sysfs entry and attribute for Device NACK Retry count
2025-12-12 9:02 [PATCH v8 0/4] i3c: dw-i3c: Enable support for dw-i3c controller NACK retry sysfs and DAT restore fix adrianhoyin.ng
@ 2025-12-12 9:02 ` adrianhoyin.ng
2025-12-12 9:02 ` [PATCH v8 2/4] i3c: dw: Add support for Device NACK Retry configuration adrianhoyin.ng
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: adrianhoyin.ng @ 2025-12-12 9:02 UTC (permalink / raw)
To: alexandre.belloni, Frank.Li, linux-i3c, linux-kernel; +Cc: adrianhoyin.ng
From: Adrian Ng Ho Yin <adrianhoyin.ng@altera.com>
Document sysfs attribute dev_nack_retry_cnt that controls the number of
automatic retries performed by the I3C controller when a target device
returns a NACK
Add a `dev_nack_retry_count` sysfs attribute to allow reading and updating
the device NACK retry count. A new `dev_nack_retry_count` field and an
optional `set_dev_nack_retry()` callback are added to
i3c_master_controller. The attribute is created only when the callback is
implemented.
Updates are applied under the I3C bus maintenance lock to ensure safe
hardware reconfiguration.
Signed-off-by: Adrian Ng Ho Yin <adrianhoyin.ng@altera.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
---
Documentation/ABI/testing/sysfs-bus-i3c | 11 +++++++
drivers/i3c/master.c | 39 +++++++++++++++++++++++++
include/linux/i3c/master.h | 6 ++++
3 files changed, 56 insertions(+)
diff --git a/Documentation/ABI/testing/sysfs-bus-i3c b/Documentation/ABI/testing/sysfs-bus-i3c
index c812ab180ff4..c1e048957a01 100644
--- a/Documentation/ABI/testing/sysfs-bus-i3c
+++ b/Documentation/ABI/testing/sysfs-bus-i3c
@@ -161,3 +161,14 @@ Contact: linux-i3c@vger.kernel.org
Description:
These directories are just symbolic links to
/sys/bus/i3c/devices/i3c-<bus-id>/<bus-id>-<device-pid>.
+
+What: /sys/bus/i3c/devices/i3c-<bus-id>/<bus-id>-<device-pid>/dev_nack_retry_count
+KernelVersion: 6.18
+Contact: linux-i3c@vger.kernel.org
+Description:
+ Expose the dev_nak_retry_count which controls the number of
+ automatic retries that will be performed by the controller when
+ the target device returns a NACK response. A value of 0 disables
+ the automatic retries. Exist only when I3C constroller supports
+ this retry on nack feature.
+
diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c
index d946db75df70..87f0c7b5df80 100644
--- a/drivers/i3c/master.c
+++ b/drivers/i3c/master.c
@@ -685,6 +685,39 @@ static ssize_t hotjoin_show(struct device *dev, struct device_attribute *da, cha
static DEVICE_ATTR_RW(hotjoin);
+static ssize_t dev_nack_retry_count_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ return sysfs_emit(buf, "%u\n", dev_to_i3cmaster(dev)->dev_nack_retry_count);
+}
+
+static ssize_t dev_nack_retry_count_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
+ struct i3c_master_controller *master = dev_to_i3cmaster(dev);
+ unsigned long val;
+ int ret;
+
+ ret = kstrtoul(buf, 0, &val);
+ if (ret)
+ return ret;
+
+ i3c_bus_maintenance_lock(i3cbus);
+ ret = master->ops->set_dev_nack_retry(master, val);
+ i3c_bus_maintenance_unlock(i3cbus);
+
+ if (ret)
+ return ret;
+
+ master->dev_nack_retry_count = val;
+
+ return count;
+}
+
+static DEVICE_ATTR_RW(dev_nack_retry_count);
+
static struct attribute *i3c_masterdev_attrs[] = {
&dev_attr_mode.attr,
&dev_attr_current_master.attr,
@@ -2962,6 +2995,9 @@ int i3c_master_register(struct i3c_master_controller *master,
i3c_master_register_new_i3c_devs(master);
i3c_bus_normaluse_unlock(&master->bus);
+ if (master->ops->set_dev_nack_retry)
+ device_create_file(&master->dev, &dev_attr_dev_nack_retry_count);
+
return 0;
err_del_dev:
@@ -2987,6 +3023,9 @@ void i3c_master_unregister(struct i3c_master_controller *master)
{
i3c_bus_notify(&master->bus, I3C_NOTIFY_BUS_REMOVE);
+ if (master->ops->set_dev_nack_retry)
+ device_remove_file(&master->dev, &dev_attr_dev_nack_retry_count);
+
i3c_master_i2c_adapter_cleanup(master);
i3c_master_unregister_i3c_devs(master);
i3c_master_bus_cleanup(master);
diff --git a/include/linux/i3c/master.h b/include/linux/i3c/master.h
index c52a82dd79a6..b0fe3c266746 100644
--- a/include/linux/i3c/master.h
+++ b/include/linux/i3c/master.h
@@ -462,6 +462,8 @@ struct i3c_bus {
* @enable_hotjoin: enable hot join event detect.
* @disable_hotjoin: disable hot join event detect.
* @set_speed: adjust I3C open drain mode timing.
+ * @set_dev_nack_retry: configure device NACK retry count for the master
+ * controller.
*/
struct i3c_master_controller_ops {
int (*bus_init)(struct i3c_master_controller *master);
@@ -491,6 +493,8 @@ struct i3c_master_controller_ops {
int (*enable_hotjoin)(struct i3c_master_controller *master);
int (*disable_hotjoin)(struct i3c_master_controller *master);
int (*set_speed)(struct i3c_master_controller *master, enum i3c_open_drain_speed speed);
+ int (*set_dev_nack_retry)(struct i3c_master_controller *master,
+ unsigned long dev_nack_retry_cnt);
};
/**
@@ -514,6 +518,7 @@ struct i3c_master_controller_ops {
* in a thread context. Typical examples are Hot Join processing which
* requires taking the bus lock in maintenance, which in turn, can only
* be done from a sleep-able context
+ * @dev_nack_retry_count: retry count when slave device nack
*
* A &struct i3c_master_controller has to be registered to the I3C subsystem
* through i3c_master_register(). None of &struct i3c_master_controller fields
@@ -534,6 +539,7 @@ struct i3c_master_controller {
} boardinfo;
struct i3c_bus bus;
struct workqueue_struct *wq;
+ unsigned int dev_nack_retry_count;
};
/**
--
2.49.GIT
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^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH v8 2/4] i3c: dw: Add support for Device NACK Retry configuration
2025-12-12 9:02 [PATCH v8 0/4] i3c: dw-i3c: Enable support for dw-i3c controller NACK retry sysfs and DAT restore fix adrianhoyin.ng
2025-12-12 9:02 ` [PATCH v8 1/4] i3c: add sysfs entry and attribute for Device NACK Retry count adrianhoyin.ng
@ 2025-12-12 9:02 ` adrianhoyin.ng
2025-12-12 9:02 ` [PATCH v8 3/4] i3c: dw: use FIELD_PREP for device address table macros adrianhoyin.ng
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: adrianhoyin.ng @ 2025-12-12 9:02 UTC (permalink / raw)
To: alexandre.belloni, Frank.Li, linux-i3c, linux-kernel; +Cc: adrianhoyin.ng
From: Adrian Ng Ho Yin <adrianhoyin.ng@altera.com>
The DesignWare I3C controller supports automatically retrying transactions
when a device NACKs. This is useful for slave devices that may be
temporarily busy and not ready to respond immediately.
Add new ops to configure all active DAT entry with dev_nack_retry during
runtime. Returns error when value exceeds hw specified limit.
Signed-off-by: Adrian Ng Ho Yin <adrianhoyin.ng@altera.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
---
drivers/i3c/master/dw-i3c-master.c | 40 ++++++++++++++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/drivers/i3c/master/dw-i3c-master.c b/drivers/i3c/master/dw-i3c-master.c
index 9ceedf09c3b6..ce33600d4c5e 100644
--- a/drivers/i3c/master/dw-i3c-master.c
+++ b/drivers/i3c/master/dw-i3c-master.c
@@ -5,6 +5,7 @@
* Author: Vitor Soares <vitor.soares@synopsys.com>
*/
+#include <linux/bitfield.h>
#include <linux/bitops.h>
#include <linux/clk.h>
#include <linux/completion.h>
@@ -204,8 +205,12 @@
#define EXTENDED_CAPABILITY 0xe8
#define SLAVE_CONFIG 0xec
+#define DW_I3C_DEV_NACK_RETRY_CNT_MAX 0x3
+#define DEV_ADDR_TABLE_DEV_NACK_RETRY_MASK GENMASK(30, 29)
#define DEV_ADDR_TABLE_IBI_MDB BIT(12)
#define DEV_ADDR_TABLE_SIR_REJECT BIT(13)
+#define DEV_ADDR_TABLE_DEV_NACK_RETRY_CNT(x) \
+ FIELD_PREP(DEV_ADDR_TABLE_DEV_NACK_RETRY_MASK, (x))
#define DEV_ADDR_TABLE_LEGACY_I2C_DEV BIT(31)
#define DEV_ADDR_TABLE_DYNAMIC_ADDR(x) (((x) << 16) & GENMASK(23, 16))
#define DEV_ADDR_TABLE_STATIC_ADDR(x) ((x) & GENMASK(6, 0))
@@ -1484,6 +1489,40 @@ static irqreturn_t dw_i3c_master_irq_handler(int irq, void *dev_id)
return IRQ_HANDLED;
}
+static int dw_i3c_master_set_dev_nack_retry(struct i3c_master_controller *m,
+ unsigned long dev_nack_retry_cnt)
+{
+ struct dw_i3c_master *master = to_dw_i3c_master(m);
+ u32 reg;
+ int i;
+
+ if (dev_nack_retry_cnt > DW_I3C_DEV_NACK_RETRY_CNT_MAX) {
+ dev_err(&master->base.dev,
+ "Value %ld exceeds maximum %d\n",
+ dev_nack_retry_cnt, DW_I3C_DEV_NACK_RETRY_CNT_MAX);
+ return -ERANGE;
+ }
+
+ /*
+ * Update DAT entries for all currently attached devices.
+ * We directly iterate through the master's device array.
+ */
+ for (i = 0; i < master->maxdevs; i++) {
+ /* Skip free/empty slots */
+ if (master->free_pos & BIT(i))
+ continue;
+
+ reg = readl(master->regs +
+ DEV_ADDR_TABLE_LOC(master->datstartaddr, i));
+ reg &= ~DEV_ADDR_TABLE_DEV_NACK_RETRY_MASK;
+ reg |= DEV_ADDR_TABLE_DEV_NACK_RETRY_CNT(dev_nack_retry_cnt);
+ writel(reg, master->regs +
+ DEV_ADDR_TABLE_LOC(master->datstartaddr, i));
+ }
+
+ return 0;
+}
+
static const struct i3c_master_controller_ops dw_mipi_i3c_ops = {
.bus_init = dw_i3c_master_bus_init,
.bus_cleanup = dw_i3c_master_bus_cleanup,
@@ -1504,6 +1543,7 @@ static const struct i3c_master_controller_ops dw_mipi_i3c_ops = {
.recycle_ibi_slot = dw_i3c_master_recycle_ibi_slot,
.enable_hotjoin = dw_i3c_master_enable_hotjoin,
.disable_hotjoin = dw_i3c_master_disable_hotjoin,
+ .set_dev_nack_retry = dw_i3c_master_set_dev_nack_retry,
};
/* default platform ops implementations */
--
2.49.GIT
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^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH v8 3/4] i3c: dw: use FIELD_PREP for device address table macros
2025-12-12 9:02 [PATCH v8 0/4] i3c: dw-i3c: Enable support for dw-i3c controller NACK retry sysfs and DAT restore fix adrianhoyin.ng
2025-12-12 9:02 ` [PATCH v8 1/4] i3c: add sysfs entry and attribute for Device NACK Retry count adrianhoyin.ng
2025-12-12 9:02 ` [PATCH v8 2/4] i3c: dw: Add support for Device NACK Retry configuration adrianhoyin.ng
@ 2025-12-12 9:02 ` adrianhoyin.ng
2025-12-12 9:02 ` [PATCH v8 4/4] i3c: dw: Preserve DAT entry bits when restoring addresses adrianhoyin.ng
2026-01-13 17:37 ` [PATCH v8 0/4] i3c: dw-i3c: Enable support for dw-i3c controller NACK retry sysfs and DAT restore fix Alexandre Belloni
4 siblings, 0 replies; 6+ messages in thread
From: adrianhoyin.ng @ 2025-12-12 9:02 UTC (permalink / raw)
To: alexandre.belloni, Frank.Li, linux-i3c, linux-kernel; +Cc: adrianhoyin.ng
From: Adrian Ng Ho Yin <adrianhoyin.ng@altera.com>
Add DEV_ADDR_TABLE_DYNAMIC_MASK / DEV_ADDR_TABLE_DYNAMIC_ADDR(x) for
dynamic device addresses and DEV_ADDR_TABLE_STATIC_MASK /
DEV_ADDR_TABLE_STATIC_ADDR(x) for static device addresses in the I3C
address table. Replace manual shift-and-mask with FIELD_PREP() for both
dynamic and static addresses for clarity and maintainability.
Signed-off-by: Adrian Ng Ho Yin <adrianhoyin.ng@altera.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
---
drivers/i3c/master/dw-i3c-master.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/i3c/master/dw-i3c-master.c b/drivers/i3c/master/dw-i3c-master.c
index ce33600d4c5e..f96b30c4cbfc 100644
--- a/drivers/i3c/master/dw-i3c-master.c
+++ b/drivers/i3c/master/dw-i3c-master.c
@@ -207,13 +207,15 @@
#define DW_I3C_DEV_NACK_RETRY_CNT_MAX 0x3
#define DEV_ADDR_TABLE_DEV_NACK_RETRY_MASK GENMASK(30, 29)
+#define DEV_ADDR_TABLE_DYNAMIC_MASK GENMASK(23, 16)
+#define DEV_ADDR_TABLE_STATIC_MASK GENMASK(6, 0)
#define DEV_ADDR_TABLE_IBI_MDB BIT(12)
#define DEV_ADDR_TABLE_SIR_REJECT BIT(13)
#define DEV_ADDR_TABLE_DEV_NACK_RETRY_CNT(x) \
FIELD_PREP(DEV_ADDR_TABLE_DEV_NACK_RETRY_MASK, (x))
#define DEV_ADDR_TABLE_LEGACY_I2C_DEV BIT(31)
-#define DEV_ADDR_TABLE_DYNAMIC_ADDR(x) (((x) << 16) & GENMASK(23, 16))
-#define DEV_ADDR_TABLE_STATIC_ADDR(x) ((x) & GENMASK(6, 0))
+#define DEV_ADDR_TABLE_DYNAMIC_ADDR(x) FIELD_PREP(DEV_ADDR_TABLE_DYNAMIC_MASK, x)
+#define DEV_ADDR_TABLE_STATIC_ADDR(x) FIELD_PREP(DEV_ADDR_TABLE_STATIC_MASK, x)
#define DEV_ADDR_TABLE_LOC(start, idx) ((start) + ((idx) << 2))
#define I3C_BUS_SDR1_SCL_RATE 8000000
--
2.49.GIT
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^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v8 4/4] i3c: dw: Preserve DAT entry bits when restoring addresses
2025-12-12 9:02 [PATCH v8 0/4] i3c: dw-i3c: Enable support for dw-i3c controller NACK retry sysfs and DAT restore fix adrianhoyin.ng
` (2 preceding siblings ...)
2025-12-12 9:02 ` [PATCH v8 3/4] i3c: dw: use FIELD_PREP for device address table macros adrianhoyin.ng
@ 2025-12-12 9:02 ` adrianhoyin.ng
2026-01-13 17:37 ` [PATCH v8 0/4] i3c: dw-i3c: Enable support for dw-i3c controller NACK retry sysfs and DAT restore fix Alexandre Belloni
4 siblings, 0 replies; 6+ messages in thread
From: adrianhoyin.ng @ 2025-12-12 9:02 UTC (permalink / raw)
To: alexandre.belloni, Frank.Li, linux-i3c, linux-kernel; +Cc: adrianhoyin.ng
From: Adrian Ng Ho Yin <adrianhoyin.ng@altera.com>
Update dw_i3c_master_restore_addrs() to preserve existing bits in each
Device Address Table (DAT) entry when restoring addresses. This prevents
overwriting configuration bits during PM runtime resumes.
Signed-off-by: Adrian Ng Ho Yin <adrianhoyin.ng@altera.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
---
drivers/i3c/master/dw-i3c-master.c | 13 +++++++++----
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/i3c/master/dw-i3c-master.c b/drivers/i3c/master/dw-i3c-master.c
index f96b30c4cbfc..9ca609df593f 100644
--- a/drivers/i3c/master/dw-i3c-master.c
+++ b/drivers/i3c/master/dw-i3c-master.c
@@ -1696,11 +1696,16 @@ static void dw_i3c_master_restore_addrs(struct dw_i3c_master *master)
if (master->free_pos & BIT(pos))
continue;
- if (master->devs[pos].is_i2c_addr)
- reg_val = DEV_ADDR_TABLE_LEGACY_I2C_DEV |
+ reg_val = readl(master->regs + DEV_ADDR_TABLE_LOC(master->datstartaddr, pos));
+
+ if (master->devs[pos].is_i2c_addr) {
+ reg_val &= ~DEV_ADDR_TABLE_STATIC_MASK;
+ reg_val |= DEV_ADDR_TABLE_LEGACY_I2C_DEV |
DEV_ADDR_TABLE_STATIC_ADDR(master->devs[pos].addr);
- else
- reg_val = DEV_ADDR_TABLE_DYNAMIC_ADDR(master->devs[pos].addr);
+ } else {
+ reg_val &= ~DEV_ADDR_TABLE_DYNAMIC_MASK;
+ reg_val |= DEV_ADDR_TABLE_DYNAMIC_ADDR(master->devs[pos].addr);
+ }
writel(reg_val, master->regs + DEV_ADDR_TABLE_LOC(master->datstartaddr, pos));
}
--
2.49.GIT
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^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH v8 0/4] i3c: dw-i3c: Enable support for dw-i3c controller NACK retry sysfs and DAT restore fix
2025-12-12 9:02 [PATCH v8 0/4] i3c: dw-i3c: Enable support for dw-i3c controller NACK retry sysfs and DAT restore fix adrianhoyin.ng
` (3 preceding siblings ...)
2025-12-12 9:02 ` [PATCH v8 4/4] i3c: dw: Preserve DAT entry bits when restoring addresses adrianhoyin.ng
@ 2026-01-13 17:37 ` Alexandre Belloni
4 siblings, 0 replies; 6+ messages in thread
From: Alexandre Belloni @ 2026-01-13 17:37 UTC (permalink / raw)
To: Frank.Li, linux-i3c, linux-kernel, adrianhoyin.ng
On Fri, 12 Dec 2025 17:02:54 +0800, adrianhoyin.ng@altera.com wrote:
> From: Adrian Ng Ho Yin <adrianhoyin.ng@altera.com>
>
> This patch series adds a controller-wide sysfs attribute
> dev_nack_retry_count for the DesignWare I3C controller, allowing runtime
> control of the automatic retry mechanism when a device NACKs. Some I3C
> slave devices may temporarily be busy and unable to respond immediately;
> automatic retries improve robustness in such cases. Writes are clamped to
> the hardware maximum of 3, and the value is applied to all active DAT
> entries.
>
> [...]
Applied, thanks!
[1/4] i3c: add sysfs entry and attribute for Device NACK Retry count
https://git.kernel.org/abelloni/c/b58f47eb3926
[2/4] i3c: dw: Add support for Device NACK Retry configuration
https://git.kernel.org/abelloni/c/ec17f1430948
[3/4] i3c: dw: use FIELD_PREP for device address table macros
https://git.kernel.org/abelloni/c/4cd9d2bf0b56
[4/4] i3c: dw: Preserve DAT entry bits when restoring addresses
https://git.kernel.org/abelloni/c/de28e002df2e
Best regards,
--
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Embedded Linux and Kernel engineering
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^ permalink raw reply [flat|nested] 6+ messages in thread