From: David Mosberger <davidm@napali.hpl.hp.com>
To: linux-ia64@vger.kernel.org
Subject: RE: Why large stack frame for PAL call
Date: Tue, 29 Jun 2004 21:43:15 +0000 [thread overview]
Message-ID: <16609.57971.744388.366433@napali.hpl.hp.com> (raw)
In-Reply-To: <200406271740.i5RHeaY24803@unix-os.sc.intel.com>
>>>>> On Tue, 29 Jun 2004 09:20:49 -0700, "Mallick, Asit K" <asit.k.mallick@intel.com> said:
Asit> I rechecked some of my old documents and found that there was
Asit> version of the SDM that stated that the caller should ensure
Asit> that all 96 stacked registers are available before calling PAL
Asit> procedure.
Ah, that sounds vaguely familiar.
Asit> However, this restriction was removed in subsequent documents
Asit> and is no longer needed. The code did not get updated. So,
Asit> Ken's patch should be fine.
I guess we should try it on a Merced box, just to be reasonably sure.
I'll do that.
I guess this points out a weakness in the "checkstack" script: it
ought to add the space allocated by the "alloc" instructions as well.
Since the script is written in the wrong language (OK, at least the
language-name starts with "p", I'll give them credit for that ;-), I
won't try to fix this. Perhaps someone else wants to bite?
--david
prev parent reply other threads:[~2004-06-29 21:43 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2004-06-27 17:42 Why large stack frame for PAL call Chen, Kenneth W
2004-06-29 5:50 ` David Mosberger
2004-06-29 14:11 ` n0ano
2004-06-29 15:13 ` Chen, Kenneth W
2004-06-29 16:20 ` Mallick, Asit K
2004-06-29 21:43 ` David Mosberger [this message]
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