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From: Russ Anderson <rja@sgi.com>
To: linux-ia64@vger.kernel.org
Subject: Re: RFC - freeing up ar.k5
Date: Fri, 17 Sep 2004 19:43:16 +0000	[thread overview]
Message-ID: <200409171943.i8HJhGvb033457@ben.americas.sgi.com> (raw)
In-Reply-To: <200409162152.i8GLqwG01566@unix-os.sc.intel.com>

Tony Luck wrote:
> 
> Well, this is what a patch to free up ar.k5 by replacing its use
> with a percpu variable looks like.
> 
> Downside is a possible cache miss reading the variable in 'schedule()'.
> 
> Upside is freeing up ar.k5 ... whose use would get rid of much ugliness
> in the mca tlb recovery code (and in the impending per-cpu save areas
> for INIT/MCA).

I certainly do not object to using ar.k5 for a percpu physical address pointer.  

Just to understand the rest, I assume this means:

  * The ia64_mca_tlb_list[] array goes away and each cpu will have a 
    ia64_mca_tlb_info structure (a physical address pointer to the structure 
    being in ar.k5).  The memory for each structure will be allocated on
    the same node as the CPU.

  * A physcial address pointer to the per data MCA/INIT area added to 
    the ia64_mca_tlb_info structure.

  * Then whe an MCA or INIT occurs, the pointer is waiting in ar.k5.

Thanks,
-- 
Russ Anderson, OS RAS/Partitioning Project Lead  
SGI - Silicon Graphics Inc          rja@sgi.com

  parent reply	other threads:[~2004-09-17 19:43 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2004-09-16 21:52 RFC - freeing up ar.k5 Luck, Tony
2004-09-16 22:59 ` Keith Owens
2004-09-17 19:43 ` Russ Anderson [this message]
2004-09-17 20:48 ` Luck, Tony
2004-09-21  5:10 ` Luck, Tony
2004-10-01 21:35 ` Russ Anderson
2004-10-01 22:46 ` Luck, Tony
2004-10-04  0:06 ` Russ Anderson
2004-10-05 19:20 ` Russ Anderson
2004-10-05 19:27 ` Luck, Tony

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