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From: "Chen, Kenneth W" <kenneth.w.chen@intel.com>
To: linux-ia64@vger.kernel.org
Subject: RE: [patch 1/2] remove per-cpu ia64_phys_stacked_size_p8
Date: Fri, 24 Feb 2006 19:13:03 +0000	[thread overview]
Message-ID: <200602241913.k1OJD2g15869@unix-os.sc.intel.com> (raw)
In-Reply-To: <200602240233.k1O2Xeg05945@unix-os.sc.intel.com>

Christian Hildner wrote on Friday, February 24, 2006 2:08 AM
> self-modifing code isn't the straight forward way of programming. So 
> wouldn't it be an idea to let the code crash instead of silently work 
> with a potentially wrong number of registers here, if by any reason the 
> patch mechanism doesn't work.

I should've also *STRESS* that with all current Itanium processor
out there, including upcoming Montecito processor, no patch will
be done with this set of patch.  The default value is what the
hardware has.

There are *NO* processor exist as of today (including tomorrow, and
next month, and next year) that has physical stack register other
than 96 (which is what is encoded in the instruction right now).

- Ken


  parent reply	other threads:[~2006-02-24 19:13 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2006-02-24  2:33 [patch 1/2] remove per-cpu ia64_phys_stacked_size_p8 Chen, Kenneth W
2006-02-24 10:08 ` Christian Hildner
2006-02-24 18:58 ` Chen, Kenneth W
2006-02-24 19:13 ` Chen, Kenneth W [this message]
2006-02-27  8:15 ` Christian Hildner
2006-02-27 19:26 ` Chen, Kenneth W
2006-10-13 17:05 ` Chen, Kenneth W

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