From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Chen, Kenneth W" Date: Fri, 31 Mar 2006 01:13:35 +0000 Subject: RE: Synchronizing Bit operations V2 Message-Id: <200603310112.k2V1Cpg27150@unix-os.sc.intel.com> List-Id: In-Reply-To: References: In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: 'Christoph Lameter' Cc: Nick Piggin , Zoltan Menyhart , "Boehm, Hans" , "Grundler, Grant G" , akpm@osdl.org, linux-kernel@vger.kernel.org, linux-ia64@vger.kernel.org Christoph Lameter wrote on Thursday, March 30, 2006 5:09 PM > In general yes the caller should not be thinking about clear_bit having > any memory ordering at all. However for IA64 arch specific code the bit > operations must have a certain ordering semantic and it would be best that > these are also consistent. clear_bit is not a lock operation and may > f.e. be used for locking something. OK, fine. Then please don't change smp_mb__after_clear_bit() for ia64. i.e., leave it alone as noop. - Ken