From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Chen, Kenneth W" Date: Fri, 31 Mar 2006 06:15:28 +0000 Subject: RE: Synchronizing Bit operations V2 Message-Id: <200603310614.k2V6Ehg30012@unix-os.sc.intel.com> List-Id: In-Reply-To: <442C99A1.6060901@yahoo.com.au> References: In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: 'Nick Piggin' Cc: 'Christoph Lameter' , Zoltan Menyhart , "Boehm, Hans" , "Grundler, Grant G" , akpm@osdl.org, linux-kernel@vger.kernel.org, linux-ia64@vger.kernel.org Nick Piggin wrote on Thursday, March 30, 2006 6:53 PM > >>smp_mb__before_clear_bit() > >>clear_bit(...)( > > > > Sorry, you totally lost me. It could me I'm extremely slow today. For > > option (1), on ia64, clear_bit has release semantic already. The comb > > of __before_clear_bit + clear_bit provides the required ordering. Did > > I miss something? By the way, we are talking about detail implementation > > on one specific architecture. Not some generic concept that clear_bit > > has no ordering stuff in there. > > > > The memory ordering that above combination should produce is a > Linux style smp_mb before the clear_bit. Not a release. Whoever designed the smp_mb_before/after_* clearly understand the difference between a bidirectional smp_mb() and a one-way memory ordering. If smp_mb_before/after are equivalent to smp_mb, what's the point of introducing another interface? - Ken