From: "Chen, Kenneth W" <kenneth.w.chen@intel.com>
To: linux-ia64@vger.kernel.org
Subject: RE: Fix ia64 bitops: Full barrier on smp_mb__after_clear_bit()
Date: Fri, 31 Mar 2006 19:51:16 +0000 [thread overview]
Message-ID: <200603311950.k2VJoWg05558@unix-os.sc.intel.com> (raw)
In-Reply-To: <Pine.LNX.4.64.0603311124380.7426@schroedinger.engr.sgi.com>
Christoph Lameter wrote on Friday, March 31, 2006 11:31 AM
> This is also the way that powerpc (which faces similar issues) implements
> these macros.
>
> include/asm-powerpc/bitops.h:
>
> /*
> * clear_bit doesn't imply a memory barrier
> */
> #define smp_mb__before_clear_bit() smp_mb()
> #define smp_mb__after_clear_bit() smp_mb()
Using a totally different architecture to justify a change for ia64
specific implementation is a bit strange to me. PPC has their own
architecture limitation to deal with, why mix that with ia64?
next prev parent reply other threads:[~2006-03-31 19:51 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-03-31 19:31 Fix ia64 bitops: Full barrier on smp_mb__after_clear_bit() Christoph Lameter
2006-03-31 19:51 ` Chen, Kenneth W [this message]
2006-03-31 21:15 ` Christoph Lameter
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