From mboxrd@z Thu Jan 1 00:00:00 1970 From: Serge Semin Date: Thu, 07 Jul 2022 10:45:33 +0000 Subject: Re: [PATCH v3 1/8] irqchip/mips-gic: Only register IPI domain when SMP is enabled Message-Id: <20220707104533.7iakliv2f5i2qi33@mobilestation> List-Id: References: <20220701200056.46555-1-samuel@sholland.org> <20220701200056.46555-2-samuel@sholland.org> <20220705135243.ydbwfo4kois64elr@mobilestation> <87czehmiwt.wl-maz@kernel.org> In-Reply-To: <87czehmiwt.wl-maz@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: Marc Zyngier Cc: Samuel Holland , Thomas Gleixner , Andy Shevchenko , Bartosz Golaszewski , Bjorn Helgaas , Boris Ostrovsky , Borislav Petkov , Broadcom internal kernel review list , Chris Zankel , Colin Ian King , Dave Hansen , Dexuan Cui , Florian Fainelli , Guo Ren , "H. Peter Anvin" , Haiyang Zhang , Helge Deller , Ingo Molnar , Ivan Kokshaysky , "James E.J. Bottomley" , Jan Beulich , Joerg Roedel , Juergen Gross , Julia Lawall , "K. Y. Srinivasan" , Kees Cook , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Linus Walleij , Lorenzo Pieralisi , Mark Rutland , Matt Turner , Max Filippov , Maximilian Heyne , Oleksandr Tyshchenko , Rich Felker , Richard Henderson , Rikard Falkeborn , Rob Herring , Russell King , Stefano Stabellini , Stephen Hemminger , Sven Schnelle , Thomas Bogendoerfer , Wei Liu , Wei Xu , Will Deacon , Yoshinori Sato , iommu@lists.linux-foundation.org, iommu@lists.linux.dev, linux-alpha@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-hyperv@vger.kernel.org, linux-ia64@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, linux-parisc@vger.kernel.org, linux-pci@vger.kernel.org, linux-sh@vger.kernel.org, linux-xtensa@linux-xtensa.org, x86@kernel.org, xen-devel@lists.xenproject.org, kernel test robot On Thu, Jul 07, 2022 at 09:22:26AM +0100, Marc Zyngier wrote: > On Tue, 05 Jul 2022 14:52:43 +0100, > Serge Semin wrote: > > > > Hi Samuel > > > > On Fri, Jul 01, 2022 at 03:00:49PM -0500, Samuel Holland wrote: > > > The MIPS GIC irqchip driver may be selected in a uniprocessor > > > configuration, but it unconditionally registers an IPI domain. > > > > > > Limit the part of the driver dealing with IPIs to only be compiled when > > > GENERIC_IRQ_IPI is enabled, which corresponds to an SMP configuration. > > > > Thanks for the patch. Some comment is below. > > > > > > > > Reported-by: kernel test robot > > > Signed-off-by: Samuel Holland > > > --- > > > > > > Changes in v3: > > > - New patch to fix build errors in uniprocessor MIPS configs > > > > > > drivers/irqchip/Kconfig | 3 +- > > > drivers/irqchip/irq-mips-gic.c | 80 +++++++++++++++++++++++----------- > > > 2 files changed, 56 insertions(+), 27 deletions(-) > > > > > > diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig > > > index 1f23a6be7d88..d26a4ff7c99f 100644 > > > --- a/drivers/irqchip/Kconfig > > > +++ b/drivers/irqchip/Kconfig > > > @@ -322,7 +322,8 @@ config KEYSTONE_IRQ > > > > > > config MIPS_GIC > > > bool > > > - select GENERIC_IRQ_IPI > > > + select GENERIC_IRQ_IPI if SMP > > > > > + select IRQ_DOMAIN_HIERARCHY > > > > It seems to me that the IRQ domains hierarchy is supposed to be > > created only if IPI is required. At least that's what the MIPS GIC > > driver implies. Thus we can go further and CONFIG_IRQ_DOMAIN_HIERARCHY > > ifdef-out the gic_irq_domain_alloc() and gic_irq_domain_free() > > methods definition together with the initialization: > > > > static const struct irq_domain_ops gic_irq_domain_ops = { > > .xlate = gic_irq_domain_xlate, > > +#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY > > .alloc = gic_irq_domain_alloc, > > .free = gic_irq_domain_free, > > +#endif > > .map = gic_irq_domain_map, > > }; > > > > If the GENERIC_IRQ_IPI config is enabled, CONFIG_IRQ_DOMAIN_HIERARCHY > > will be automatically selected (see the config definition in > > kernel/irq/Kconfig). If the IRQs hierarchy is needed for some another > > functionality like GENERIC_MSI_IRQ_DOMAIN or GPIOs then they will > > explicitly enable the IRQ_DOMAIN_HIERARCHY config thus activating the > > denoted .alloc and .free methods definitions. > > > > To sum up you can get rid of the IRQ_DOMAIN_HIERARCHY config > > force-select from this patch and make the MIPS GIC driver code a bit > > more coherent. > > > > @Marc, please correct me if were wrong. > > Either way probably works correctly, but Samuel's approach is more > readable IMO. It is far easier to reason about a high-level feature > (GENERIC_IRQ_IPI) than an implementation detail (IRQ_DOMAIN_HIERARCHY). > The main idea of my comment was to get rid of the forcible IRQ_DOMAIN_HIERARCHY config selection, because the basic part of the driver doesn't depends on the hierarchical IRQ-domains functionality. It's needed only for IPIs and implicitly for the lower level IRQ device drivers like GPIO or PCIe-controllers, which explicitly enable the IRQ_DOMAIN_HIERARCHY config anyway. That's why instead of forcible IRQ_DOMAIN_HIERARCHY config selection (see Samuel patch) I suggested to make the corresponding functionality defined under the IRQ_DOMAIN_HIERARCHY config ifdefs, thus having the driver capable of creating the hierarchical IRQs domains only if it's required. > If you really want to save a handful of bytes, you can make the > callbacks conditional on GENERIC_IRQ_IPI, and be done with it. AFAIU I can't in this case. It must be either IRQ_DOMAIN_HIERARCHY ifdefs or explicit IRQ_DOMAIN_HIERARCHY select. There can be non-SMP (UP) systems with no need in IPIs but for instance having a GPIO or PCIe controller which require the hierarchical IRQ-domains support of the parental IRQ controller. So making the callbacks definition depended on the GENERIC_IRQ_IPI config state will break the driver for these systems. That's why I suggested to use CONFIG_IRQ_DOMAIN_HIERARCHY which activates the hierarchical IRQ domains support in the IRQ-chip system (see the irq_domain_ops structure conditional fields definition) and shall we have the suggested approach implemented in the MIPS GIC driver. -Sergey > But this can come as an additional patch. > > Thanks, > > M. > > -- > Without deviation from the norm, progress is not possible.