From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Natalie Protasevich" Date: Wed, 05 Sep 2007 15:29:42 +0000 Subject: Re: [PATCH 1/1] Allow global purge traslation cache (ptc.g) to be disabled Message-Id: <32209efe0709050829u7a63bccdt82454850a4a522fe@mail.gmail.com> List-Id: References: <200708301338.34246.protasnb@gmail.com> In-Reply-To: <200708301338.34246.protasnb@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: linux-ia64@vger.kernel.org On 9/5/07, Robin Holt wrote: > > No :) those interested are big hardware makers of large scaled out > > boxes, such as HP, UIS. They are using own asics and are not > > necessarily being able to keep chipset native capabilities intact. As > > I said in the preamble, the mechanism has to be there so they can turn > > the ptc.g off and run the OS. > > This really sounds like it is best done as a machvec. Currently, Altix > (sn2) does not have a ptc.g that spans nodes. We have our own tlb purge > mechanism which is very flexible and scalable. Maybe it would be best > to follow that example. To repeat Bjorn's comments, this area can be > fraught with _VERY_ difficult to diagnose problems. A boot test can > hardly be expected to uncover all the races so be patient while we walk > through this code. > All right, all right ... :) I'll do the machvec then. Thanks guys, will peek into the sn2 to get an idea. Regards, --Natalie