Hi,

I have a patch to simplify and consolidate architecture context switch
locking. Russell King's requirement that ARM have interrupts on during
context switch prompted me: there are now 3 different ctxsw locking
implementations throughout different arch files.

It didn't get a great deal of feedback from linux-arch, so I thought I
should ask if anyone could test on an architecture that is affected.

All ia64 has to do now is define __ARCH_WANT_UNLOCKED_CTXSW (which I
have done in the patch, of course). The unlocked context switch
implementation is also (hopefully) improved, with switch_lock replaced
by simple stores to a variable.

If anyone could test this on an ia64 would be great. I have tested
various combinations on an ia32 NUMAQ and it is stable there...

If you are interested in performance, lat_ctx or hackbench on a SMP
kernel running with maxcpus=1 would be a good test (the UP compiled
kernel will be slightly suboptimal with the patch, but that can easily
be fixed).

Stability wise, you'd need to test with an SMP system, the larger the
better.

It is diffed against 2.6.7-rc2-mm2, but should apply to any recent
-mm or -linus kernel.

Thanks
Nick