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From: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
To: linux-ia64@vger.kernel.org
Subject: Re: [RFC][patch 3/10] Multiple vector domain support - introduce
Date: Sat, 16 Jul 2005 01:07:51 +0000	[thread overview]
Message-ID: <42D85DE7.3060600@jp.fujitsu.com> (raw)
In-Reply-To: <42D62F3E.2090609@jp.fujitsu.com>

Hi Ashok,

Thank you for comments.

>>+
>>+	/*
>>+	 * Make special mapping between per CPU IRQs and GSVs
>>+	 */
>>+	for (gsv = 0; gsv < NR_GSVS; gsv++) {
>>+		vec = gsv_to_vector(gsv);
>>+		if (vec < IA64_FIRST_DEVICE_VECTOR ||
>>+		    vec > IA64_LAST_DEVICE_VECTOR) {
>>+			ia64_gsv_to_irq_map[gsv] = vec;
>>+			ia64_irq_to_gsv_map[vec] = vec;
> 
> 
> Should the above be = gsv instead of vec?
> 
>>+			ia64_irq_to_gsv_map[vec] = vec;
> 
> ---------------------------------------------------^^^^

I did this by intent, but we can also use "= gsv" instead
of "= vec".
In my patch, all per CPU interrupts are mapped to the same
IRQ regardless of what domain the cpu belongs to. So multiple
gsvs are mappied to one IRQ for per CPU interrupts.


>>+/*
>>+ * Convert global system vector to the corresponding IRQ.
>>+ */
>>+static inline int
>>+gsv_to_irq (unsigned int gsv)
>>+{
>>+	if (gsv > NR_GSVS)
> 
> 
> Should the above be (gsv >= NR_GSVS)?? 
> 

Yes, it's a bug.
Thank you for finding this out.

Thanks,
Kenji Kaneshige


      parent reply	other threads:[~2005-07-16  1:07 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2005-07-14  9:24 [RFC][patch 3/10] Multiple vector domain support - introduce gsv Kenji Kaneshige
2005-07-14 17:50 ` Ashok Raj
2005-07-16  1:07 ` Kenji Kaneshige [this message]

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