Re: accessed/dirty bit handler tuning

[Zoltan Menyhart <Zoltan.Menyhart@bull.net>]

David Mosberger-Tang wrote:
> On 4/3/06, Zoltan Menyhart <Zoltan.Menyhart@bull.net> wrote:
> 
> 
>>The problem is that the most frequently used trap handler contains
>>the unsafe walk of the
>>
>>        rx = IA64_KR_PT_BASE -> pgd[i] -> pud[j] -> pmd[k] -> pte[l]
>>
>>chain...
> 
> 
> Please, everybody step back a minute.  Hint: consider that x86 does
> the page-table walk in hardware...

Telling the truth: I'm not an x86 expert :-) 
What I could dig up in 5 minutes is:

IA-32 Intel® Architecture Software Developer’s Manual Volume 3A:
7.1.2.1 Automatic Locking

"When updating page-directory and page-table entries:
When updating page-directory and page-table entries, the processor uses
locked cycles to set the accessed and dirty flag in the page-directory
and page-table entries."

I guess the TLB load is auto-locked, too.

Anyway, what can we conclude from this for the ia64 architecture?

Can you _prove_ that walking that chain of pointers is safe?

Thanks,

Zoltan