From: Christoph Lameter <clameter@sgi.com>
To: Zoltan Menyhart <Zoltan.Menyhart@bull.net>
Cc: akpm@osdl.org, ak@suse.de, linux-kernel@vger.kernel.org,
linux-ia64@vger.kernel.org
Subject: Re: light weight counters: race free through local_t?
Date: Wed, 14 Jun 2006 16:33:09 +0000 [thread overview]
Message-ID: <Pine.LNX.4.64.0606140928500.4030@schroedinger.engr.sgi.com> (raw)
In-Reply-To: <449033B0.1020206@bull.net>
On Wed, 14 Jun 2006, Zoltan Menyhart wrote:
> > On IA64 we we would trade an interrupt disable/ load / add / store
> > /interrupt enable against one fetchadd instruction with this patch. How
> > bad/good a trade is that?
>
> On one hand, switching to local counters can be a good idea if they are not
> evicted from the caches by the usual NRU/LRU cache replacement...
>
> On the other hand, I do not think the ia64's fetchadd instruction is
> expensive.
> If your data is in L2, then it takes 11 clock cycles.
>
> I do not think the counters have got much chance to stay in L1.
> Anyway, L1 is write through, you'll need to copy the updated value
> back into L2.
> As the shortest L2 access takes 5 clock cycles...
> You need 2 of them. (Assuming a counter is always in L2.)
> And add interrupt disable/enable time...
Could you do a clock cycle comparision of an
atomic_inc(__get_per_cpu(var))
(the fallback of local_t on ia64)
vs.
local_irq_save(flags)
__get_per_cpu(var)++
local_irq_restore(flags)
(ZVC like implementation)
vs.
get_per_cpu(var)++
put_cpu()
(current light weight counters)
next prev parent reply other threads:[~2006-06-14 16:33 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-06-10 5:30 light weight counters: race free through local_t? Christoph Lameter
2006-06-14 16:05 ` Zoltan Menyhart
2006-06-14 16:33 ` Christoph Lameter [this message]
2006-06-15 12:22 ` Zoltan Menyhart
2006-06-15 15:56 ` Christoph Lameter
2006-06-15 16:46 ` Zoltan Menyhart
2006-06-15 18:14 ` Christoph Lameter
2006-06-16 9:14 ` Zoltan Menyhart
2006-06-15 16:06 ` Christoph Lameter
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