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From: Jun Nakajima <jun@sco.com>
To: linux-ia64@vger.kernel.org
Subject: [Linux-ia64] Using f6-f11 floating-point registers
Date: Tue, 27 Jun 2000 22:02:09 +0000	[thread overview]
Message-ID: <marc-linux-ia64-105590678205181@msgid-missing> (raw)

At this point, the kernel is using more than f6-f11 floating-point
registers (using -mfixed-rangeñ0-f15,f32-f127, i.e. those are *not*
available to the kernel, but the others, like f16-f31 are). 

When do we support the reduced FP model (EL_IA_64_REDUCEFP), where only
f6-f11 are used by the kernel? Does the current compiler allow the
kernel to use those FP registers only, if we provide
-mfixed-rangeò-f5,f12-f127, for example? Of course, we need to change
the kernel if we do this.

Thanks,
-- 
Jun U Nakajima
Core OS Development
SCO/Murray Hill, NJ



             reply	other threads:[~2000-06-27 22:02 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2000-06-27 22:02 Jun Nakajima [this message]
2000-06-27 22:44 ` [Linux-ia64] Using f6-f11 floating-point registers James Wilson
2000-06-28  0:20 ` David Mosberger
2000-06-28 13:57 ` Jun Nakajima

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