RE: [Linux-ia64] Kernel panic in dtlb_fault

Mallick, Asit K
2001-01-11T22:10:11Z

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Attached is a patch to fix the problem. Uros and Jenna were able to boot
with this patch. Sorry for sending the early version.

Thanks,
Asit

> -----Original Message-----
> From: Uros Prestor [mailto:uros@turbolinux.com]
> Sent: Thursday, January 11, 2001 12:13 PM
> To: davidm@hpl.hp.com
> Cc: linux-ia64@linuxia64.org
> Subject: Re: [Linux-ia64] Kernel panic in dtlb_fault
>
>
> David Mosberger wrote:
>
> > Are you sure you picked up the new kernel? Try "objdump -d" on
> > vmlinux and verify that itlb_fault ends with "b0" being restored.
>
> This is the disassembly output of itlb_fault:
> e000000000500400 <itlb_fault>:
> e000000000500400: 00 80 00 28 24 04 [MII]
> mov r16=cr20
> e000000000500406: d0 01 00 62 00 e0 mov r29=b0
> e00000000050040c: 03 00 cc 00 mov r31=pr
> e000000000500410: 05 88 00 32 24 44 [MLX]
> mov r17=cr25
> e000000000500416: 00 00 00 00 60 c0
> movl r30=0xe00000000
> 0500420;;
> e00000000050041c: 03 02 22 68
> e000000000500420: 0a 90 00 22 18 10 [MMI]
> ld8 r18=[r17];;
> e000000000500426: 00 00 00 02 00 c0 nop.m 0x0
> e00000000050042c: 00 90 00 50
> tbit.z p6,p0=r18,0
> e000000000500430: 11 00 00 00 01 00 [MIB] nop.m 0x0
> e000000000500436: 00 00 00 02 00 03 nop.i 0x0
> e00000000050043c: 98 0c 00 41 (p06)
> br.cond.spnt.many e0
> 000000005010c0 <page_fault>;;
> e000000000500440: 0a 00 48 00 2f 04 [MMI]
> itc.i r18;;
> e000000000500446: 00 00 00 02 00 00 nop.m 0x0
> e00000000050044c: d0 09 00 07 mov b0=r29
> e000000000500450: 11 00 00 00 01 00 [MIB] nop.m 0x0
> e000000000500456: f0 ff c0 bf 05 00
> mov pr=r31,0xfffffff
> ffffffffe
> e00000000050045c: 00 00 20 00 rfi;;
>
> Seems like the b0 register is getting restored correctly.
>
> Uros
>
> --
> Uros Prestor
> uros@turbolinux.com
>
>
>
>
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> Linux-IA64@linuxia64.org
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>

[-- Attachment #2: ivt.diff --]
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--- linux-2.4.0/arch/ia64/kernel/ivt.S Tue Jan 9 03:48:36 2001
+++ linux/arch/ia64/kernel/ivt.S Thu Jan 11 02:30:30 2001
@@ -193,6 +193,7 @@
;;
1: ld8 r18=[r17] // read L3 PTE
;;
+ mov b0=r29
tbit.z p6,p0=r18,_PAGE_P_BIT // page present bit cleared?
(p6) br.cond.spnt.many page_fault
;;
@@ -228,6 +229,7 @@
;;
1: ld8 r18=[r17] // read L3 PTE
;;
+ mov b0=r29
tbit.z p6,p0=r18,_PAGE_P_BIT // page present bit cleared?
(p6) br.cond.spnt.many page_fault
;;
@@ -399,7 +401,6 @@
shr.u r18=r16,PMD_SHIFT // shift L2 index into position
;;
ld8 r17=[r17] // fetch the L1 entry (may be 0)
- mov b0=r30
;;
(p7) cmp.eq p6,p7=r17,r0 // was L1 entry NULL?
dep r17=r18,r17,3,(PAGE_SHIFT-3) // compute address of L2 page table entry
@@ -409,8 +410,8 @@
;;
(p7) cmp.eq.or.andcm p6,p7=r17,r0 // was L2 entry NULL?
dep r17=r19,r17,3,(PAGE_SHIFT-3) // compute address of L3 page table entry
- ;;
(p6) br.cond.spnt.many page_fault
+ mov b0=r30
br.sptk.many b0 // return to continuation point
;;