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From: David Mosberger <davidm@hpl.hp.com>
To: linux-ia64@vger.kernel.org
Subject: Re: FW: [Linux-ia64] Interrupt redirection problem
Date: Wed, 27 Jun 2001 16:42:31 +0000	[thread overview]
Message-ID: <marc-linux-ia64-105590693005783@msgid-missing> (raw)

>>>>> On Wed, 27 Jun 2001 11:15:13 -0500, "Miller, Mike (OS Dev)" <Mike.Miller@compaq.com> said:

  Mike> Is this to say that the BSP handling >90% of the interrupts is
  Mike> normal or OK?

For some reason, my earlier response to Andreas's question didn't make
it to the list, so I'm repeating it here: it is indeed normal for a
single CPU to receive most of the interrupts.  The way this works is
that normally all CPUs use an external task priority (xtp) of
"normal".  When a CPU runs its idle task, it lowers the xtp to "low"
and thereby actively solicits interrupt delivery to itself.  Now, when
the xtp across all CPUs is the same, the chipset gets to chose which
CPU to deliver an interrupt to.  IIRC, the 460gx in that case picks
the CPU which was programmed into the I/O SAPIC.  On Linux, that is by
default the CPU that installed the interrupt handler.  And since most
interrupt handlers are installed by the bootstrap processor, you
normally see most interrupts coming in on CPU 0.

	--david


                 reply	other threads:[~2001-06-27 16:42 UTC|newest]

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