From: "Pallipadi, Venkatesh" <venkatesh.pallipadi@intel.com>
To: linux-ia64@vger.kernel.org
Subject: [Linux-ia64] [PATCH] Clearing of exception status before calling IA32 user sig
Date: Wed, 16 Oct 2002 01:26:21 +0000 [thread overview]
Message-ID: <marc-linux-ia64-105590709805168@msgid-missing> (raw)
[-- Attachment #1: Type: text/plain, Size: 1600 bytes --]
Hi,
One more bug fix for IA32 exception handler. IA32 exception handler is
not clearing the exception status, before calling the user signal handler
routine. The issue was first observed due to an IA32 binary (which runs fine
on IA32 system), failing on Itanium based system. The binary was trying to
do an "finit" in the user SIGFPE handler. As the exception state was not
cleared before calling the user signal handler, the finit there was failing,
due to the pending exception.
The attached patch fixes the issue. [Note: Applies over <base> + <IA32
fpstate Save/Restore patch which was sent previously>.]
Please let me know, if you need any more information on this.
Thanks,
-Venkatesh
--- ia64-fpe/arch/ia64/ia32/ia32_signal.c.org2 Mon Oct 14 19:10:48 2002
+++ ia64-fpe/arch/ia64/ia32/ia32_signal.c Tue Oct 15 16:16:23 2002
@@ -219,6 +219,7 @@
struct _fpreg_ia32 *fpregp;
char buf[32];
unsigned long fsr, fcr, fir, fdr;
+ unsigned long new_fsr;
unsigned long num128[2];
unsigned long mxcsr=0;
int fp_tos, fr8_st_map;
@@ -231,6 +232,13 @@
asm volatile ( "mov %0=ar.fcr;" : "=r"(fcr));
asm volatile ( "mov %0=ar.fir;" : "=r"(fir));
asm volatile ( "mov %0=ar.fdr;" : "=r"(fdr));
+ /*
+ * We need to clear the exception state before calling the signal
+ * handler. Clear the bits 15, bits 0-7 in fp status word. Similar
+ * to the functionality of fnclex instruction.
+ */
+ new_fsr = fsr & (~0x80ff) ;
+ asm volatile ( "mov ar.fsr=%0;" :: "r"(new_fsr));
__put_user(fcr & 0xffff, &save->cw);
__put_user(fsr & 0xffff, &save->sw);
<<fpe.2418_finit.patch>>
[-- Attachment #2: fpe.2418_finit.patch --]
[-- Type: application/octet-stream, Size: 893 bytes --]
--- ia64-fpe/arch/ia64/ia32/ia32_signal.c.org2 Mon Oct 14 19:10:48 2002
+++ ia64-fpe/arch/ia64/ia32/ia32_signal.c Tue Oct 15 16:16:23 2002
@@ -219,6 +219,7 @@
struct _fpreg_ia32 *fpregp;
char buf[32];
unsigned long fsr, fcr, fir, fdr;
+ unsigned long new_fsr;
unsigned long num128[2];
unsigned long mxcsr=0;
int fp_tos, fr8_st_map;
@@ -231,6 +232,13 @@
asm volatile ( "mov %0=ar.fcr;" : "=r"(fcr));
asm volatile ( "mov %0=ar.fir;" : "=r"(fir));
asm volatile ( "mov %0=ar.fdr;" : "=r"(fdr));
+ /*
+ * We need to clear the exception state before calling the signal
+ * handler. Clear the bits 15, bits 0-7 in fp status word. Similar
+ * to the functionality of fnclex instruction.
+ */
+ new_fsr = fsr & (~0x80ff) ;
+ asm volatile ( "mov ar.fsr=%0;" :: "r"(new_fsr));
__put_user(fcr & 0xffff, &save->cw);
__put_user(fsr & 0xffff, &save->sw);
reply other threads:[~2002-10-16 1:26 UTC|newest]
Thread overview: [no followups] expand[flat|nested] mbox.gz Atom feed
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=marc-linux-ia64-105590709805168@msgid-missing \
--to=venkatesh.pallipadi@intel.com \
--cc=linux-ia64@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox