David,

Here's a patch that does some major surgery to the INIT
code (which I've been looking at a lot more closely while
I was fixing the recent breakages in this area).  The first
thing that I noticed while working on it was that on Tiger
I didn't get the pretty process backtraces on which you'd been
working so hard.  I just got:

  "Entered OS INIT handler"

which was a lot less helpful :-)  The reason for this turned
out to be that the SAL on Tiger does not generate an error
record for an INIT ... so the code that grabbed the error
record and dissected it to find the minstate saved registers
did nothing for me.  SAL folks here say they don't have to
create a record for an INIT (in fact they tell us whether
there is a record via the "mi" bit of the processor state
parameter ... see SDV pg. 2:276, and for INIT PSP.mi is 0
on Tiger).

The PAL does provide a pointer to the minstate area (see
11.3.2 PALE_CHECK Exit state, and 11.4.2 PALE_INIT Exit State),
which is still valid when we get to the OS entry points for
INIT and MCA.  So it seems simpler to just use that, rather than
go the long way round getting the error record (which doesn't
even exist on Tiger).

So this patch picks up r17 (pointer to minstate) and r18
(processor state parameter) and squirrels them away in the
ia64_sal_to_os_handoff_state structure ... then uses them
in the INIT handler.

-Tony