Compact Flash Question

["Yigal Sadgat" <YSadgat1@gcte.com>]

We wrote the Kernel to support CF drives (in IDE mode) several years ago but
now there are strange things coming back from the field that compel us to go
back and re-evaluate many design decisions.

For instance,
(1) Can you really ignore bit(2) (CORR) in the Status register offset 7 that 
tells
you that the CF has detected and corrected a soft error?, etc.
(2) An engineer at SanDisk Engineering told me NOT to do wear leveling.
The file allocation table is written very frequently back into the flash. So
is it really safe to assume that I don't need wear leveling???
(3) Re. the BUSY bit in the status register (offset 7, bit D7), anybody 
experienced
time outs?
(4) Re Error register (offset 1) bit D7 (BBK), again, I was told that it 
cannot (???)
happen since the CF performs read-after-write and it automatically switches 
good blocks
for bad ones... Is this correct?

We get many "soft" errors and I cannot wait to put my hand on a system to 
test but
thought I would draw on your collective experience before we dive into these 
issues again.

Any comments would be greatly appreciated.

Yigal Sadgat
General Computer Technology (GCT)
YSadgat1@gcte.com