Re: [PATCH 2/6] The definition of ahci_start_fis_rx() and ahci_stop_fis_rx()

["zhao, forrest" <forrest.zhao@intel.com>]

On Fri, 2006-06-02 at 11:15 +0200, Jens Axboe wrote:
> On Fri, Jun 02 2006, zhao, forrest wrote:
> > +	/*
> > +	 * Disable FIS reception
> > +	 *
> > +	 * AHCI Rev 1.1 Section 10.1.2:
> > +	 * If PxCMD.FRE is set to '1', software should clear it
> > +	 * to '0' and wait at least 500 milliseconds for PxCMD.FR
> > +	 * to return '0' when read. If PxCMD.FR does not clear
> > +	 * '0' correctly, then software may attempt a port reset
> > +	 * of a full HBA reset to recover.
> > +	 */
> > +	tmp &= ~(PORT_CMD_FIS_RX);
> > +	writel(tmp, port_mmio + PORT_CMD);
> > +
> > +	mdelay(500);
> > +	work = 1000;
> 
> The spec states that you should wait up to 500msec for this condition to
> happen, not wait 500msec before looking at it! So please rework this
> bit, a half second potentially wasted busy loop is quite nasty.

The spec says If PxCMD.FRE is set to '1', software should clear it to
'0' and wait *at least* 500 milliseconds for PxCMD.FR to return '0' when
read.

It's "at least", not "up to".

Thanks,
Forrest