Re: [PATCH] libata: Add MMIO support to pata_sil680

[Benjamin Herrenschmidt <benh@kernel.crashing.org>]

On Thu, 2007-05-24 at 00:31 +0100, Alan Cox wrote:
> 
> Anything non taskfile, which is tricky to do arbitarily for all
> controllers - this is why I didn't just stuff in a simple fix and post it.

We might have to provide an optional ->flush() that is device specific ?
Config space access would do the job nicely in most cases though. If
it's really only for SRST which can be slow. If it's for the 400ns of
writing the command, then we have a deeper problem but I would expect
MMIO chipsets to be smarter than that ...

> For BMDMA controllers most of them have a load of other MMIO registers
> we can read (eg the SIL680 has the PRD table address you can read
> harmlessly), once we get beyond SFF BMDMA however it will be controller
> dependant and we probably have to actually specify what register is used
> for dummy posting reads when we set up the device. For I/O space we don't
> get posting so life is easy. 

Ah yes, the PRD table pointer is a good option too... We could introduce
a ->flush() and have a default sff version that reads that pointer ?

Cheers,
Ben.