Re: Multiple MSI, take 3

[Benjamin Herrenschmidt <benh@kernel.crashing.org>]

On Sun, 2008-07-13 at 15:30 -0700, Eric W. Biederman wrote:
> You are correct.  Using the existing irq handling logic will cause us
> to drop irqs and to loose information if two messages are sent close
> to each other.  Which is very nasty.
> 
> With a little care we can avoid that problem by having a 32 bit bitmap
> of which sub irqs have fired so we can make all of them pending
> without loosing information.  That does requires a new handle_irq
> method.

And we end up re-doing the logic that the core already provides ... for
individual irqs :-)

> One of the primary purposes of masking irqs in hardware is to prevent
> them from screaming.  Unlikely with edge triggered irqs but not a
> capability I would like to give up.

Have you seen screaming MSIs yet ? We -could- if necessary add a hook
to irq_chip for that case if it really ever happens...

> Multi-msi has the problem that cpu affinity can not be changed on a
> per message basis without an iommu.  Which is a portability problem
> and a problem on common architectures.

It's a minor problem I believe. It's mostly an API issue in fact, and
I'm happy to live with it rather than the other approach which sounds
just ... gross. Sorry but you are reproducing locally within an IRQ what
the whole IRQ is about to differenciate them in the first place.

It also makes it harder to remove the "irq" argument to handlers which
is something Jeff started looking into and that I quite like.

> Therefore to support multi-msi it must be handled as a special case,
> we can not treat the individual messages like normal irqs.

We can, that's what they are. They just are IRQs with -some-
restrictions on -some- platforms (mostly affinity on x86 and need to
soft-mask, which are fairly minor in my book).

Ben.