From: Alan <alan@lxorguk.ukuu.org.uk>
To: Jeremy Higdon <jeremy@sgi.com>
Cc: "Dailey, Nate" <Nate.Dailey@stratus.com>, linux-ide@vger.kernel.org
Subject: Re: sata_vsc.c cache line size question
Date: Sun, 14 Jan 2007 14:47:22 +0000 [thread overview]
Message-ID: <20070114144722.73fe0b49@localhost.localdomain> (raw)
In-Reply-To: <20070114080301.GD61246@sgi.com>
> So I suppose the driver should be modified to set it to 0x80 only
> if it's 0. I believe that most PCI implementations will set it in
> the BIOS or whatever.
pci_set_master should handle this automtically on most platforms.
On x86-32 you also need to check "pcibios_max_latency" if you write the
latency yourself directly AND the card could be plugged into an arbitary
PCI slot on a 32bit PC.
Alan
next prev parent reply other threads:[~2007-01-14 14:36 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-01-12 19:45 sata_vsc.c cache line size question Dailey, Nate
2007-01-14 8:03 ` Jeremy Higdon
2007-01-14 14:47 ` Alan [this message]
2007-01-14 18:21 ` Jeff Garzik
-- strict thread matches above, loose matches on Subject: below --
2007-01-15 16:26 Dailey, Nate
2007-01-18 7:11 ` Jeremy Higdon
2007-01-18 14:42 Dailey, Nate
2007-02-07 8:38 ` Jeremy Higdon
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