Re: [PATCH] pata_hpt{37x|3x2n}: fix timing register masks

[Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>]

On Tuesday 24 November 2009 10:20:06 pm Alan Cox wrote:
> On Wed, 25 Nov 2009 00:15:52 +0400
> Sergei Shtylyov <sshtylyov@ru.mvista.com> wrote:
> 
> > These drivers inherited from the older 'hpt366' IDE driver the buggy timing
> > register masks in their set_piomode() metods. As a result, too low command
> > cycle active time is programmed for slow PIO modes.  Quite fortunately, it's
> > later "fixed up" by the set_dmamode() methods which also "helpfully" reprogram
> > the command timings, usually to PIO mode 4.
> > 
> > However, the drivers added some breakage of their own too:  the bit that they
> > set/clear to control the FIFO is wrong -- it's actually the MSB of the command
> > cycle setup time; setting it in DMA mode is also wrong as this bit is only for
> > PIO actually...
> > 
> > Fix all this and bump the drivers' versions, accounting for recenjt patches
> > that forgot to do it...

Sergei, pata_hpt37x contains another copy of ->set_{piomode,dmamode} methods
(for HPT372 and later chipsets) which also need to be updated.

> > Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
> 
> Acked-by: Alan Cox <alan@linux.intel.com>

--
Bartlomiej Zolnierkiewicz