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From: Rolf Eike Beer <eike-kernel@sf-tec.de>
To: Jassi Brar <jassisinghbrar@gmail.com>
Cc: Tejun Heo <tj@kernel.org>,
	linux-pci@vger.kernel.org, linux-ide@vger.kernel.org,
	jgarzik@pobox.com
Subject: Re: SIL24: pcie_set_readrq 4096
Date: Fri, 23 Jul 2010 07:30:08 +0200	[thread overview]
Message-ID: <201007230730.16935.eike-kernel@sf-tec.de> (raw)
In-Reply-To: <AANLkTiltS3zLLSBgv_VNEXpQvEez2PpObhjmbcZxJ2c8@mail.gmail.com>

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Jassi Brar wrote:
> On Thu, Jul 22, 2010 at 10:18 PM, Tejun Heo <tj@kernel.org> wrote:
> > It's been a while since I read pci-e spec but IIUC readrq size and
> > payload size are independent and if readrq is larger than payload size
> > it's supposed to complete in multiple steps.  I could be wrong tho.
> 
> AFAIUI readrq size is independent and not greater than the max_payload
> size. Payload size is what max a device can handle and readrq is what a
> device can ask.

The first and third statements are correct, the second is not. Read request may 
be larger than the usual payload size.

However that is something the complete PCIe fabric up to that device has to 
support. So if the root port does only support read request of something 
smaller the device must be configured with that maximum size so it will not 
issue any bigger requests. Blindly configuring a device to the maximum allowed 
value looks dangerous and broken to me.

Eike

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      parent reply	other threads:[~2010-07-23  5:30 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-07-22  2:47 SIL24: pcie_set_readrq 4096 Jassi Brar
2010-07-22 13:18 ` Tejun Heo
2010-07-22 14:34   ` Jassi Brar
2010-07-22 20:42     ` Tejun Heo
2010-07-23  5:30     ` Rolf Eike Beer [this message]

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