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From: Andrew Lunn <andrew@lunn.ch>
To: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Tejun Heo <tj@kernel.org>, Jason Cooper <jason@lakedaemon.net>,
	Andrew Lunn <andrew@lunn.ch>,
	Gregory Clement <gregory.clement@free-electrons.com>,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	Ezequiel Garcia <ezequiel.garcia@free-electrons.com>,
	Lior Amsalem <alior@marvell.com>,
	Tawfik Bayouk <tawfik@marvell.com>,
	linux-arm-kernel@lists.infradead.org, linux-ide@vger.kernel.org
Subject: Re: [PATCH 1/4] ata: ahci_mvebu: new driver for Marvell Armada 380 AHCI interfaces
Date: Mon, 7 Apr 2014 17:18:23 +0200	[thread overview]
Message-ID: <20140407151823.GG18785@lunn.ch> (raw)
In-Reply-To: <1396882664-19297-2-git-send-email-thomas.petazzoni@free-electrons.com>

On Mon, Apr 07, 2014 at 04:57:41PM +0200, Thomas Petazzoni wrote:
> The Marvell Armada 380 SoC includes two AHCI compatible
> interfaces. However, like all DMA-capable Marvell interface, they
> require special handling to configure MBus windows. Therefore, this
> commit adds a new ahci_mvebu driver, which relies on the
> libahci_platform.c code recently introduced.
> 
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> ---
>  .../devicetree/bindings/ata/ahci-platform.txt      |   3 +-
>  drivers/ata/Kconfig                                |   9 ++
>  drivers/ata/Makefile                               |   1 +
>  drivers/ata/ahci_mvebu.c                           | 105 +++++++++++++++++++++
>  4 files changed, 117 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/ata/ahci_mvebu.c
> 
> diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt b/Documentation/devicetree/bindings/ata/ahci-platform.txt
> index 48b285f..271746d 100644
> --- a/Documentation/devicetree/bindings/ata/ahci-platform.txt
> +++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt
> @@ -7,7 +7,8 @@ Required properties:
>  - compatible        : compatible list, one of "snps,spear-ahci",
>                        "snps,exynos5440-ahci", "ibm,476gtr-ahci",
>                        "allwinner,sun4i-a10-ahci", "fsl,imx53-ahci"
> -                      "fsl,imx6q-ahci" or "snps,dwc-ahci"
> +                      "fsl,imx6q-ahci", "snps,dwc-ahci" or
> +                      "marvell,armada-380-ahci"

Hi Thomas

Since this list is growing, maybe now would be a good time to sort it
alphabetically?

>  - interrupts        : <interrupt mapping for SATA IRQ>
>  - reg               : <registers mapping>
>  
> diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
> index 2e4da3b..cb987e9 100644
> --- a/drivers/ata/Kconfig
> +++ b/drivers/ata/Kconfig
> @@ -123,6 +123,15 @@ config AHCI_IMX
>  
>  	  If unsure, say N.
>  
> +config AHCI_MVEBU
> +	tristate "Marvell EBU AHCI SATA support"
> +	depends on ARCH_MVEBU
> +	help
> +	  This option enables support for the Marvebu EBU SoC's
> +	  onboard AHCI SATA.
> +
> +	  If unsure, say N.
> +
>  config AHCI_SUNXI
>  	tristate "Allwinner sunxi AHCI SATA support"
>  	depends on ARCH_SUNXI
> diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile
> index 44c8016..5a02aee 100644
> --- a/drivers/ata/Makefile
> +++ b/drivers/ata/Makefile
> @@ -12,6 +12,7 @@ obj-$(CONFIG_SATA_DWC)		+= sata_dwc_460ex.o
>  obj-$(CONFIG_SATA_HIGHBANK)	+= sata_highbank.o libahci.o
>  obj-$(CONFIG_AHCI_DA850)	+= ahci_da850.o libahci.o libahci_platform.o
>  obj-$(CONFIG_AHCI_IMX)		+= ahci_imx.o libahci.o libahci_platform.o
> +obj-$(CONFIG_AHCI_MVEBU)	+= ahci_mvebu.o libahci.o libahci_platform.o
>  obj-$(CONFIG_AHCI_SUNXI)	+= ahci_sunxi.o libahci.o libahci_platform.o
>  obj-$(CONFIG_AHCI_ST)		+= ahci_st.o libahci.o libahci_platform.o
>  obj-$(CONFIG_AHCI_XGENE)	+= ahci_xgene.o libahci.o libahci_platform.o
> diff --git a/drivers/ata/ahci_mvebu.c b/drivers/ata/ahci_mvebu.c
> new file mode 100644
> index 0000000..ca90b18
> --- /dev/null
> +++ b/drivers/ata/ahci_mvebu.c
> @@ -0,0 +1,105 @@
> +/*
> + * AHCI glue platform driver for Marvell EBU SOCs
> + *
> + * Copyright (C) 2014 Marvell
> + *
> + * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> + * Marcin Wojtas <mw@semihalf.com>
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2.  This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + */
> +
> +#include <linux/ahci_platform.h>
> +#include <linux/kernel.h>
> +#include <linux/mbus.h>
> +#include <linux/module.h>
> +#include <linux/of_device.h>
> +#include <linux/platform_device.h>
> +#include "ahci.h"
> +
> +#define AHCI_WINDOW_CTRL(win)	(0x60 + ((win) << 4))
> +#define AHCI_WINDOW_BASE(win)	(0x64 + ((win) << 4))
> +#define AHCI_WINDOW_SIZE(win)	(0x68 + ((win) << 4))
> +
> +static void ahci_mvebu_mbus_config(struct ahci_host_priv *hpriv,
> +				   const struct mbus_dram_target_info *dram)
> +{
> +	int i;
> +
> +	for (i = 0; i < 4; i++) {
> +		writel(0, hpriv->mmio + AHCI_WINDOW_CTRL(i));
> +		writel(0, hpriv->mmio + AHCI_WINDOW_BASE(i));
> +		writel(0, hpriv->mmio + AHCI_WINDOW_SIZE(i));
> +	}
> +
> +	for (i = 0; i < dram->num_cs; i++) {
> +		const struct mbus_dram_window *cs = dram->cs + i;
> +
> +		writel((cs->mbus_attr << 8) |
> +		       (dram->mbus_dram_target_id << 4) | 1,
> +		       hpriv->mmio + AHCI_WINDOW_CTRL(i));
> +		writel(cs->base, hpriv->mmio + AHCI_WINDOW_BASE(i));
> +		writel(((cs->size - 1) & 0xffff0000),
> +		       hpriv->mmio + AHCI_WINDOW_SIZE(i));
> +	}
> +}
> +
> +static const struct ata_port_info ahci_mvebu_port_info = {
> +	.flags	   = AHCI_FLAG_COMMON,
> +	.pio_mask  = ATA_PIO4,
> +	.udma_mask = ATA_UDMA6,
> +	.port_ops  = &ahci_platform_ops,
> +};
> +
> +static int ahci_mvebu_probe(struct platform_device *pdev)
> +{
> +	struct ahci_host_priv *hpriv;
> +	const struct mbus_dram_target_info *dram;
> +	int rc;
> +
> +	hpriv = ahci_platform_get_resources(pdev);
> +	if (IS_ERR(hpriv))
> +		return PTR_ERR(hpriv);
> +
> +	rc = ahci_platform_enable_resources(hpriv);
> +	if (rc)
> +		return rc;
> +
> +	dram = mv_mbus_dram_info();
> +	if (dram)
> +		ahci_mvebu_mbus_config(hpriv, dram);

I know this is a common model for mv_sata, which has to deal with
devices without dram, but can 38x also work without dram? Or should
missing dram be considered fatal to the probe?

> +
> +	rc = ahci_platform_init_host(pdev, hpriv, &ahci_mvebu_port_info, 0, 0);
> +	if (rc)
> +		goto disable_resources;
> +
> +	return 0;
> +
> +disable_resources:
> +	ahci_platform_disable_resources(hpriv);
> +	return rc;
> +}
> +
> +static const struct of_device_id ahci_mvebu_of_match[] = {
> +	{ .compatible = "marvell,armada-380-ahci", },
> +	{ },
> +};
> +MODULE_DEVICE_TABLE(of, ahci_mvebu_of_match);
> +
> +static struct platform_driver ahci_mvebu_driver = {
> +	.probe = ahci_mvebu_probe,
> +	.remove = ata_platform_remove_one,
> +	.driver = {
> +		.name = "ahci-mvebu",
> +		.owner = THIS_MODULE,
> +		.of_match_table = ahci_mvebu_of_match,
> +	},
> +};
> +module_platform_driver(ahci_mvebu_driver);
> +
> +MODULE_DESCRIPTION("Marvell EBU AHCI SATA driver");
> +MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>, Marcin Wojtas <mw@semihalf.com>");
> +MODULE_LICENSE("GPL");
> +MODULE_ALIAS("platform:ahci_mv");
> -- 
> 1.8.3.2
> 

  reply	other threads:[~2014-04-07 15:20 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-04-07 14:57 [PATCH 0/4] Support for Marvell AHCI interface on Armada 38x Thomas Petazzoni
2014-04-07 14:57 ` [PATCH 1/4] ata: ahci_mvebu: new driver for Marvell Armada 380 AHCI interfaces Thomas Petazzoni
2014-04-07 15:18   ` Andrew Lunn [this message]
2014-04-07 15:50     ` Thomas Petazzoni
2014-04-07 17:50   ` Bartlomiej Zolnierkiewicz
2014-04-07 21:43     ` Thomas Petazzoni
2014-04-07 14:57 ` [PATCH 2/4] ARM: mvebu: add Device Tree description of AHCI interfaces on Armada 38x Thomas Petazzoni
2014-04-07 14:57 ` [PATCH 3/4] ARM: configs: add ahci_mvebu to mvebu_v7_defconfig Thomas Petazzoni
2014-04-07 14:57 ` [PATCH 4/4] ARM: configs: add ahci_mvebu to multi_v7_defconfig Thomas Petazzoni

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