From: Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
To: Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>,
Mikko Perttunen
<mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
"tj-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org"
<tj-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
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<linux-ide-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
Subject: Re: [PATCH 6/9] ARM: tegra: Export tegra_powergate_power_on
Date: Wed, 9 Jul 2014 16:20:10 +0300 [thread overview]
Message-ID: <20140709132010.GL23218@tbergstrom-lnx.Nvidia.com> (raw)
In-Reply-To: <20140709125613.GA3262@ulmo>
On Wed, Jul 09, 2014 at 02:56:14PM +0200, Thierry Reding wrote:
> * PGP Signed by an unknown key
>
> On Wed, Jul 09, 2014 at 03:43:44PM +0300, Peter De Schrijver wrote:
> > On Wed, Jul 09, 2014 at 02:04:02PM +0200, Thierry Reding wrote:
> > > > For those 2 domains we can find the necessary clocks and resets by parsing
> > > > the relevant existing DT nodes for PCIe and gr3d. For clocks, this isn't
> > > > even needed as we can always register some extra clkdev's to get them. There
> > > > is no equivalent for resets so we have to parse the gr3d and pcie DT nodes,
> > > > but that's not too bad I think.
> > >
> > > Even if we could really do this, at this point I don't see an advantage.
> > > All that it would be doing is move to some subsystem that doesn't quite
> > > match what we need just for the sake of moving to that subsystem. Having
> > > a Tegra-specific API doesn't sound so bad anymore.
> > >
> >
> > The advantage would be that we can use LP0/SC7 as a cpuidle state.
>
> How is that going to work? And why does it need powergates to be
pm_runtime_get() and pm_runtime_put() hook into genpd. So genpd knows
when all devices in a domain are idle. It can then decide to turn off
the domain (based on the decision of a per domain governor). If all
domains are off (except for the non-powergateable domain), a special cpuidle
state can be enabled by genpd which will initiate a transition to LP0 without
actually doing a full system suspend.
> implemented as power domains? If we switch off power gates, then we need
> to restore context in the drivers anyway, therefore I assume .suspend()
> and .resume() would need to be called, in which case powergate handling
> can surely be done at that stage, can't it?
>
.suspend() and .resume() are not used for this. genpd uses other per device
callbacks to save and restore the state which are invoked when the domain
is turned off and on (.save_state and .restore_state). The major difference
with .suspend() and .resume() is that .suspend() has to perform 3 tasks:
prevent any new requests to the driver, finalize or cancel all outstanding
requests and save the hw context. .save_state will only be called when the
device is idle (based on the refcount controlled by pm_runtime_get() and
pm_runtime_put()) which means it only has to handle saving the hw context.
> > Also system
> > resume from LP0 can be faster as we potentially don't have to resume all
> > domains at once.
>
> I don't understand what that's got to do with anything. If we call into
> the PMC driver explicitly via tegra_powergate_*() functions from driver
> code, then we have full control over suspend/resume in the drivers, and
> therefore don't need to resume all at once either.
But then we would be duplicating all the bookkeeping required for this? What's
the point of that?
Cheers,
Peter.
next prev parent reply other threads:[~2014-07-09 13:20 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-04 11:32 [PATCH 0/9] Serial ATA support for NVIDIA Tegra124 Mikko Perttunen
2014-06-04 11:32 ` [PATCH 1/9] of: Add NVIDIA Tegra SATA controller binding Mikko Perttunen
2014-06-16 21:55 ` Stephen Warren
2014-06-04 11:32 ` [PATCH 2/9] ARM: tegra: Add SATA controller to Tegra124 device tree Mikko Perttunen
2014-06-04 11:32 ` [PATCH 3/9] ARM: tegra: Add SATA and SATA power to Jetson TK1 " Mikko Perttunen
[not found] ` <1401881559-18469-4-git-send-email-mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-06-16 21:58 ` Stephen Warren
2014-06-04 11:32 ` [PATCH 4/9] clk: tegra: Enable hardware control of SATA PLL Mikko Perttunen
2014-06-16 21:49 ` Stephen Warren
2014-06-17 9:59 ` Peter De Schrijver
2014-06-04 11:32 ` [PATCH 5/9] clk: tegra: Add SATA clocks to Tegra124 initialization table Mikko Perttunen
2014-06-04 11:32 ` [PATCH 6/9] ARM: tegra: Export tegra_powergate_power_on Mikko Perttunen
[not found] ` <1401881559-18469-7-git-send-email-mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-06-16 22:01 ` Stephen Warren
2014-06-17 12:13 ` Thierry Reding
2014-06-17 12:28 ` Mikko Perttunen
2014-06-17 14:01 ` Peter De Schrijver
2014-06-17 21:51 ` Thierry Reding
2014-06-18 12:18 ` Peter De Schrijver
2014-06-18 15:37 ` Stephen Warren
2014-06-19 8:02 ` Peter De Schrijver
2014-06-19 8:36 ` Peter De Schrijver
2014-06-19 16:01 ` Stephen Warren
2014-06-23 10:14 ` Peter De Schrijver
2014-07-08 13:05 ` Thierry Reding
2014-07-08 14:11 ` Peter De Schrijver
2014-07-09 6:31 ` Thierry Reding
2014-07-09 8:33 ` Peter De Schrijver
[not found] ` <20140709083311.GE23218-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2014-07-09 10:25 ` Thierry Reding
2014-07-09 10:31 ` Lucas Stach
2014-07-09 11:20 ` Peter De Schrijver
2014-07-09 11:08 ` Peter De Schrijver
[not found] ` <20140709110816.GF23218-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2014-07-09 12:04 ` Thierry Reding
2014-07-09 12:43 ` Peter De Schrijver
2014-07-09 12:56 ` Thierry Reding
2014-07-09 13:20 ` Peter De Schrijver [this message]
2014-07-09 14:42 ` Thierry Reding
2014-07-09 16:09 ` Peter De Schrijver
2014-06-04 11:32 ` [PATCH 7/9] ahci: Increase AHCI_MAX_CLKS to 4 Mikko Perttunen
[not found] ` <1401881559-18469-8-git-send-email-mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-06-16 22:04 ` Stephen Warren
2014-06-04 11:32 ` [PATCH 8/9] ata: Add support for the Tegra124 SATA controller Mikko Perttunen
[not found] ` <1401881559-18469-9-git-send-email-mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-06-05 12:18 ` Rob Herring
2014-06-05 12:59 ` Mikko Perttunen
2014-06-16 22:14 ` Stephen Warren
2014-06-17 12:14 ` Bartlomiej Zolnierkiewicz
2014-06-17 16:10 ` Stephen Warren
2014-06-17 16:13 ` Tejun Heo
[not found] ` <20140617161320.GG31819-Gd/HAXX7CRxy/B6EtB590w@public.gmane.org>
2014-06-17 16:14 ` Tejun Heo
2014-06-17 16:23 ` Stephen Warren
2014-06-17 16:32 ` Tejun Heo
2014-06-17 17:04 ` Bartlomiej Zolnierkiewicz
2014-06-17 17:36 ` Mikko Perttunen
[not found] ` <53A07CA4.7080206-/1wQRMveznE@public.gmane.org>
2014-06-17 17:37 ` Stephen Warren
2014-06-04 11:32 ` [PATCH 9/9] ARM: tegra: Add options for Tegra AHCI support to tegra_defconfig Mikko Perttunen
[not found] ` <1401881559-18469-1-git-send-email-mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-06-05 17:29 ` [PATCH 0/9] Serial ATA support for NVIDIA Tegra124 Stephen Warren
[not found] ` <5390A8F9.2090408-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2014-06-06 6:27 ` Mikko Perttunen
2014-06-06 7:11 ` Thierry Reding
2014-06-06 7:18 ` Mikko Perttunen
[not found] ` <53915F3B.6050806-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-06-09 18:33 ` Stephen Warren
[not found] ` <5395FE0E.80105-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2014-06-09 18:49 ` Mikko Perttunen
[not found] ` <539601B4.1010707-/1wQRMveznE@public.gmane.org>
2014-07-08 13:08 ` Thierry Reding
2014-07-08 13:34 ` Mikko Perttunen
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