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From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Damien Le Moal <dlemoal@kernel.org>
Cc: linux-ide@vger.kernel.org, Koba Ko <koba.ko@canonical.com>
Subject: Re: [PATCH] ata: ahci: Add Intel Alder Lake-P AHCI controller to low power chipsets list
Date: Mon, 25 Sep 2023 12:13:39 +0300	[thread overview]
Message-ID: <20230925091339.GM3208943@black.fi.intel.com> (raw)
In-Reply-To: <e58ddf0f-3b7e-9599-dd7d-c6ed322d1184@kernel.org>

Hi,

On Mon, Sep 25, 2023 at 11:09:01AM +0200, Damien Le Moal wrote:
> On 2023/09/25 10:05, Mika Westerberg wrote:
> > Intel Alder Lake-P AHCI controller needs to be added to the mobile
> > chipsets list in order to have link power management enabled. Without
> > this the CPU cannot enter lower power C-states making idle power
> > consumption high.
> > 
> > Cc: Koba Ko <koba.ko@canonical.com>
> > Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
> 
> Looks OK, but given that there is a tendency of the low power stuff to be buggy,
> was this well tested ?

Yes it was tested (Koba Cc'd can confirm this). We also confirmed from
Intel AHCI folks that the ADL (and RPL) AHCI controllers fully support
this configuration.

> Also, does this need a Fixes/CC stable tag ? If not, I
> will queue this for 6.7.

Up to you :) Typically PCI ID additions can go to stable as well. No
fixes tag needed, though (there is no commit that this one fixes).

Thanks!

  reply	other threads:[~2023-09-25  9:13 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-25  8:05 [PATCH] ata: ahci: Add Intel Alder Lake-P AHCI controller to low power chipsets list Mika Westerberg
2023-09-25  9:09 ` Damien Le Moal
2023-09-25  9:13   ` Mika Westerberg [this message]
2023-09-25  9:27     ` Damien Le Moal
2023-09-26  4:55       ` Koba Ko
2023-10-02  6:21         ` Mika Westerberg
2023-10-03  0:49           ` Damien Le Moal
2023-10-03  4:36             ` Mika Westerberg
2023-10-03  1:00 ` Damien Le Moal

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