* [PATCH] ata: ahci: Add Intel Alder Lake-P AHCI controller to low power chipsets list
@ 2023-09-25 8:05 Mika Westerberg
2023-09-25 9:09 ` Damien Le Moal
2023-10-03 1:00 ` Damien Le Moal
0 siblings, 2 replies; 9+ messages in thread
From: Mika Westerberg @ 2023-09-25 8:05 UTC (permalink / raw)
To: Damien Le Moal; +Cc: linux-ide, Koba Ko, Mika Westerberg
Intel Alder Lake-P AHCI controller needs to be added to the mobile
chipsets list in order to have link power management enabled. Without
this the CPU cannot enter lower power C-states making idle power
consumption high.
Cc: Koba Ko <koba.ko@canonical.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
---
drivers/ata/ahci.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 08745e7db820..d96f80b6ff5d 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -423,6 +423,7 @@ static const struct pci_device_id ahci_pci_tbl[] = {
{ PCI_VDEVICE(INTEL, 0x02d7), board_ahci_low_power }, /* Comet Lake PCH RAID */
/* Elkhart Lake IDs 0x4b60 & 0x4b62 https://sata-io.org/product/8803 not tested yet */
{ PCI_VDEVICE(INTEL, 0x4b63), board_ahci_low_power }, /* Elkhart Lake AHCI */
+ { PCI_VDEVICE(INTEL, 0x7ae2), board_ahci_low_power }, /* Alder Lake-P AHCI */
/* JMicron 360/1/3/5/6, match class to avoid IDE function */
{ PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
--
2.40.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH] ata: ahci: Add Intel Alder Lake-P AHCI controller to low power chipsets list
2023-09-25 8:05 [PATCH] ata: ahci: Add Intel Alder Lake-P AHCI controller to low power chipsets list Mika Westerberg
@ 2023-09-25 9:09 ` Damien Le Moal
2023-09-25 9:13 ` Mika Westerberg
2023-10-03 1:00 ` Damien Le Moal
1 sibling, 1 reply; 9+ messages in thread
From: Damien Le Moal @ 2023-09-25 9:09 UTC (permalink / raw)
To: Mika Westerberg; +Cc: linux-ide, Koba Ko
On 2023/09/25 10:05, Mika Westerberg wrote:
> Intel Alder Lake-P AHCI controller needs to be added to the mobile
> chipsets list in order to have link power management enabled. Without
> this the CPU cannot enter lower power C-states making idle power
> consumption high.
>
> Cc: Koba Ko <koba.ko@canonical.com>
> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Looks OK, but given that there is a tendency of the low power stuff to be buggy,
was this well tested ? Also, does this need a Fixes/CC stable tag ? If not, I
will queue this for 6.7.
> ---
> drivers/ata/ahci.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
> index 08745e7db820..d96f80b6ff5d 100644
> --- a/drivers/ata/ahci.c
> +++ b/drivers/ata/ahci.c
> @@ -423,6 +423,7 @@ static const struct pci_device_id ahci_pci_tbl[] = {
> { PCI_VDEVICE(INTEL, 0x02d7), board_ahci_low_power }, /* Comet Lake PCH RAID */
> /* Elkhart Lake IDs 0x4b60 & 0x4b62 https://sata-io.org/product/8803 not tested yet */
> { PCI_VDEVICE(INTEL, 0x4b63), board_ahci_low_power }, /* Elkhart Lake AHCI */
> + { PCI_VDEVICE(INTEL, 0x7ae2), board_ahci_low_power }, /* Alder Lake-P AHCI */
>
> /* JMicron 360/1/3/5/6, match class to avoid IDE function */
> { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
--
Damien Le Moal
Western Digital Research
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH] ata: ahci: Add Intel Alder Lake-P AHCI controller to low power chipsets list
2023-09-25 9:09 ` Damien Le Moal
@ 2023-09-25 9:13 ` Mika Westerberg
2023-09-25 9:27 ` Damien Le Moal
0 siblings, 1 reply; 9+ messages in thread
From: Mika Westerberg @ 2023-09-25 9:13 UTC (permalink / raw)
To: Damien Le Moal; +Cc: linux-ide, Koba Ko
Hi,
On Mon, Sep 25, 2023 at 11:09:01AM +0200, Damien Le Moal wrote:
> On 2023/09/25 10:05, Mika Westerberg wrote:
> > Intel Alder Lake-P AHCI controller needs to be added to the mobile
> > chipsets list in order to have link power management enabled. Without
> > this the CPU cannot enter lower power C-states making idle power
> > consumption high.
> >
> > Cc: Koba Ko <koba.ko@canonical.com>
> > Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
>
> Looks OK, but given that there is a tendency of the low power stuff to be buggy,
> was this well tested ?
Yes it was tested (Koba Cc'd can confirm this). We also confirmed from
Intel AHCI folks that the ADL (and RPL) AHCI controllers fully support
this configuration.
> Also, does this need a Fixes/CC stable tag ? If not, I
> will queue this for 6.7.
Up to you :) Typically PCI ID additions can go to stable as well. No
fixes tag needed, though (there is no commit that this one fixes).
Thanks!
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] ata: ahci: Add Intel Alder Lake-P AHCI controller to low power chipsets list
2023-09-25 9:13 ` Mika Westerberg
@ 2023-09-25 9:27 ` Damien Le Moal
2023-09-26 4:55 ` Koba Ko
0 siblings, 1 reply; 9+ messages in thread
From: Damien Le Moal @ 2023-09-25 9:27 UTC (permalink / raw)
To: Mika Westerberg; +Cc: linux-ide, Koba Ko
On 2023/09/25 11:13, Mika Westerberg wrote:
> Hi,
>
> On Mon, Sep 25, 2023 at 11:09:01AM +0200, Damien Le Moal wrote:
>> On 2023/09/25 10:05, Mika Westerberg wrote:
>>> Intel Alder Lake-P AHCI controller needs to be added to the mobile
>>> chipsets list in order to have link power management enabled. Without
>>> this the CPU cannot enter lower power C-states making idle power
>>> consumption high.
>>>
>>> Cc: Koba Ko <koba.ko@canonical.com>
>>> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
>>
>> Looks OK, but given that there is a tendency of the low power stuff to be buggy,
>> was this well tested ?
>
> Yes it was tested (Koba Cc'd can confirm this). We also confirmed from
> Intel AHCI folks that the ADL (and RPL) AHCI controllers fully support
> this configuration.
>
>> Also, does this need a Fixes/CC stable tag ? If not, I
>> will queue this for 6.7.
>
> Up to you :) Typically PCI ID additions can go to stable as well. No
> fixes tag needed, though (there is no commit that this one fixes).
OK. I will not add a CC stable for now. If requested, we can trivially backport
this later.
>
> Thanks!
--
Damien Le Moal
Western Digital Research
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] ata: ahci: Add Intel Alder Lake-P AHCI controller to low power chipsets list
2023-09-25 9:27 ` Damien Le Moal
@ 2023-09-26 4:55 ` Koba Ko
2023-10-02 6:21 ` Mika Westerberg
0 siblings, 1 reply; 9+ messages in thread
From: Koba Ko @ 2023-09-26 4:55 UTC (permalink / raw)
To: Damien Le Moal; +Cc: Mika Westerberg, linux-ide
On Mon, Sep 25, 2023 at 5:27 PM Damien Le Moal <dlemoal@kernel.org> wrote:
>
> On 2023/09/25 11:13, Mika Westerberg wrote:
> > Hi,
> >
> > On Mon, Sep 25, 2023 at 11:09:01AM +0200, Damien Le Moal wrote:
> >> On 2023/09/25 10:05, Mika Westerberg wrote:
> >>> Intel Alder Lake-P AHCI controller needs to be added to the mobile
> >>> chipsets list in order to have link power management enabled. Without
> >>> this the CPU cannot enter lower power C-states making idle power
> >>> consumption high.
> >>>
> >>> Cc: Koba Ko <koba.ko@canonical.com>
> >>> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
> >>
> >> Looks OK, but given that there is a tendency of the low power stuff to be buggy,
> >> was this well tested ?
> >
> > Yes it was tested (Koba Cc'd can confirm this). We also confirmed from
> > Intel AHCI folks that the ADL (and RPL) AHCI controllers fully support
> > this configuration.
I verified on an ADL platform with odd and disk devices and
they work fine.
> >
> >> Also, does this need a Fixes/CC stable tag ? If not, I
> >> will queue this for 6.7.
> >
> > Up to you :) Typically PCI ID additions can go to stable as well. No
> > fixes tag needed, though (there is no commit that this one fixes).
>
> OK. I will not add a CC stable for now. If requested, we can trivially backport
> this later.
>
> >
> > Thanks!
>
> --
> Damien Le Moal
> Western Digital Research
>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] ata: ahci: Add Intel Alder Lake-P AHCI controller to low power chipsets list
2023-09-26 4:55 ` Koba Ko
@ 2023-10-02 6:21 ` Mika Westerberg
2023-10-03 0:49 ` Damien Le Moal
0 siblings, 1 reply; 9+ messages in thread
From: Mika Westerberg @ 2023-10-02 6:21 UTC (permalink / raw)
To: Koba Ko; +Cc: Damien Le Moal, linux-ide
On Tue, Sep 26, 2023 at 12:55:05PM +0800, Koba Ko wrote:
> On Mon, Sep 25, 2023 at 5:27 PM Damien Le Moal <dlemoal@kernel.org> wrote:
> >
> > On 2023/09/25 11:13, Mika Westerberg wrote:
> > > Hi,
> > >
> > > On Mon, Sep 25, 2023 at 11:09:01AM +0200, Damien Le Moal wrote:
> > >> On 2023/09/25 10:05, Mika Westerberg wrote:
> > >>> Intel Alder Lake-P AHCI controller needs to be added to the mobile
> > >>> chipsets list in order to have link power management enabled. Without
> > >>> this the CPU cannot enter lower power C-states making idle power
> > >>> consumption high.
> > >>>
> > >>> Cc: Koba Ko <koba.ko@canonical.com>
> > >>> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
> > >>
> > >> Looks OK, but given that there is a tendency of the low power stuff to be buggy,
> > >> was this well tested ?
> > >
> > > Yes it was tested (Koba Cc'd can confirm this). We also confirmed from
> > > Intel AHCI folks that the ADL (and RPL) AHCI controllers fully support
> > > this configuration.
>
> I verified on an ADL platform with odd and disk devices and
> they work fine.
Thanks!
@Damien, just checking whether this fell through cracks because I do not
see it applied to libata.git next branches?
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] ata: ahci: Add Intel Alder Lake-P AHCI controller to low power chipsets list
2023-10-02 6:21 ` Mika Westerberg
@ 2023-10-03 0:49 ` Damien Le Moal
2023-10-03 4:36 ` Mika Westerberg
0 siblings, 1 reply; 9+ messages in thread
From: Damien Le Moal @ 2023-10-03 0:49 UTC (permalink / raw)
To: Mika Westerberg, Koba Ko; +Cc: linux-ide
On 10/2/23 15:21, Mika Westerberg wrote:
> On Tue, Sep 26, 2023 at 12:55:05PM +0800, Koba Ko wrote:
>> On Mon, Sep 25, 2023 at 5:27 PM Damien Le Moal <dlemoal@kernel.org> wrote:
>>>
>>> On 2023/09/25 11:13, Mika Westerberg wrote:
>>>> Hi,
>>>>
>>>> On Mon, Sep 25, 2023 at 11:09:01AM +0200, Damien Le Moal wrote:
>>>>> On 2023/09/25 10:05, Mika Westerberg wrote:
>>>>>> Intel Alder Lake-P AHCI controller needs to be added to the mobile
>>>>>> chipsets list in order to have link power management enabled. Without
>>>>>> this the CPU cannot enter lower power C-states making idle power
>>>>>> consumption high.
>>>>>>
>>>>>> Cc: Koba Ko <koba.ko@canonical.com>
>>>>>> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
>>>>>
>>>>> Looks OK, but given that there is a tendency of the low power stuff to be buggy,
>>>>> was this well tested ?
>>>>
>>>> Yes it was tested (Koba Cc'd can confirm this). We also confirmed from
>>>> Intel AHCI folks that the ADL (and RPL) AHCI controllers fully support
>>>> this configuration.
>>
>> I verified on an ADL platform with odd and disk devices and
>> they work fine.
>
> Thanks!
>
> @Damien, just checking whether this fell through cracks because I do not
> see it applied to libata.git next branches?
Sorry about the delay. I was traveling and the suspend/resume fixes used all my
bandwidth. Will queue this today. Do you want this for 6.7 or as a fix for 6.6 ?
The latter is OK.
--
Damien Le Moal
Western Digital Research
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] ata: ahci: Add Intel Alder Lake-P AHCI controller to low power chipsets list
2023-10-03 0:49 ` Damien Le Moal
@ 2023-10-03 4:36 ` Mika Westerberg
0 siblings, 0 replies; 9+ messages in thread
From: Mika Westerberg @ 2023-10-03 4:36 UTC (permalink / raw)
To: Damien Le Moal; +Cc: Koba Ko, linux-ide
Hi,
On Tue, Oct 03, 2023 at 09:49:20AM +0900, Damien Le Moal wrote:
> On 10/2/23 15:21, Mika Westerberg wrote:
> > On Tue, Sep 26, 2023 at 12:55:05PM +0800, Koba Ko wrote:
> >> On Mon, Sep 25, 2023 at 5:27 PM Damien Le Moal <dlemoal@kernel.org> wrote:
> >>>
> >>> On 2023/09/25 11:13, Mika Westerberg wrote:
> >>>> Hi,
> >>>>
> >>>> On Mon, Sep 25, 2023 at 11:09:01AM +0200, Damien Le Moal wrote:
> >>>>> On 2023/09/25 10:05, Mika Westerberg wrote:
> >>>>>> Intel Alder Lake-P AHCI controller needs to be added to the mobile
> >>>>>> chipsets list in order to have link power management enabled. Without
> >>>>>> this the CPU cannot enter lower power C-states making idle power
> >>>>>> consumption high.
> >>>>>>
> >>>>>> Cc: Koba Ko <koba.ko@canonical.com>
> >>>>>> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
> >>>>>
> >>>>> Looks OK, but given that there is a tendency of the low power stuff to be buggy,
> >>>>> was this well tested ?
> >>>>
> >>>> Yes it was tested (Koba Cc'd can confirm this). We also confirmed from
> >>>> Intel AHCI folks that the ADL (and RPL) AHCI controllers fully support
> >>>> this configuration.
> >>
> >> I verified on an ADL platform with odd and disk devices and
> >> they work fine.
> >
> > Thanks!
> >
> > @Damien, just checking whether this fell through cracks because I do not
> > see it applied to libata.git next branches?
>
> Sorry about the delay. I was traveling and the suspend/resume fixes used all my
> bandwidth. Will queue this today. Do you want this for 6.7 or as a fix for 6.6 ?
> The latter is OK.
6.7 is fine, thanks!
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] ata: ahci: Add Intel Alder Lake-P AHCI controller to low power chipsets list
2023-09-25 8:05 [PATCH] ata: ahci: Add Intel Alder Lake-P AHCI controller to low power chipsets list Mika Westerberg
2023-09-25 9:09 ` Damien Le Moal
@ 2023-10-03 1:00 ` Damien Le Moal
1 sibling, 0 replies; 9+ messages in thread
From: Damien Le Moal @ 2023-10-03 1:00 UTC (permalink / raw)
To: Mika Westerberg; +Cc: linux-ide, Koba Ko
On 9/25/23 17:05, Mika Westerberg wrote:
> Intel Alder Lake-P AHCI controller needs to be added to the mobile
> chipsets list in order to have link power management enabled. Without
> this the CPU cannot enter lower power C-states making idle power
> consumption high.
>
> Cc: Koba Ko <koba.ko@canonical.com>
> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Applied to libata for-6.7. Thanks !
--
Damien Le Moal
Western Digital Research
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2023-10-03 4:36 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
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2023-09-25 8:05 [PATCH] ata: ahci: Add Intel Alder Lake-P AHCI controller to low power chipsets list Mika Westerberg
2023-09-25 9:09 ` Damien Le Moal
2023-09-25 9:13 ` Mika Westerberg
2023-09-25 9:27 ` Damien Le Moal
2023-09-26 4:55 ` Koba Ko
2023-10-02 6:21 ` Mika Westerberg
2023-10-03 0:49 ` Damien Le Moal
2023-10-03 4:36 ` Mika Westerberg
2023-10-03 1:00 ` Damien Le Moal
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