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Fri, 12 Jun 2026 11:32:49 -0700 (PDT) Received: from ryzen ([2601:644:8000:5b5d:a073:5e58:ab5:a167]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c8661b5b207sm2795034a12.5.2026.06.12.11.32.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jun 2026 11:32:48 -0700 (PDT) From: Rosen Penev To: linux-ide@vger.kernel.org Cc: Damien Le Moal , Niklas Cassel , Grant Likely , Tim Yamin , Julia Lawall , Jeff Garzik , linux-kernel@vger.kernel.org (open list) Subject: [PATCHv3 3/6] ata: pata_mpc52xx: reset cached DMA direction on resume Date: Fri, 12 Jun 2026 11:32:24 -0700 Message-ID: <20260612183227.20446-4-rosenp@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260612183227.20446-1-rosenp@gmail.com> References: <20260612183227.20446-1-rosenp@gmail.com> Precedence: bulk X-Mailing-List: linux-ide@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit mpc52xx_ata_hw_init() is called from both probe and resume, but only probe initializes priv->mpc52xx_ata_dma_last_write to -1. On resume the hardware FIFO state is lost, yet the cached direction survives. If the first post-resume DMA uses the same direction as before suspend, mpc52xx_bmdma_setup() skips reconfiguring the FIFO (fifo_control, fifo_alarm) because the cache matches, leaving the FIFO in its default reset state. Move the initialization of mpc52xx_ata_dma_last_write into mpc52xx_ata_hw_init() so it is reset on both probe and resume. Assisted-by: opencode:big-pickle Signed-off-by: Rosen Penev --- drivers/ata/pata_mpc52xx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/ata/pata_mpc52xx.c b/drivers/ata/pata_mpc52xx.c index 72a2b677bc90..b2e2f83aa9ca 100644 --- a/drivers/ata/pata_mpc52xx.c +++ b/drivers/ata/pata_mpc52xx.c @@ -375,6 +375,7 @@ mpc52xx_ata_hw_init(struct mpc52xx_ata_priv *priv) /* Init timings to PIO0 */ memset(priv->timings, 0x00, 2*sizeof(struct mpc52xx_ata_timings)); + priv->mpc52xx_ata_dma_last_write = -1; mpc52xx_ata_compute_pio_timings(priv, 0, 0); mpc52xx_ata_compute_pio_timings(priv, 1, 0); @@ -750,7 +751,6 @@ static int mpc52xx_ata_probe(struct platform_device *op) priv->ata_regs_pa = res_mem.start; priv->ata_irq = ata_irq; priv->csel = -1; - priv->mpc52xx_ata_dma_last_write = -1; if (ipb_freq/1000000 == 66) { priv->mdmaspec = mdmaspec66; -- 2.54.0