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Sun, 12 Jul 2026 14:37:34 -0700 (PDT) Received: from ryzen.lan ([2601:644:8000:7a86::e35]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2ccc9bfb7aesm89082605ad.29.2026.07.12.14.37.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Jul 2026 14:37:33 -0700 (PDT) From: Rosen Penev To: linux-ide@vger.kernel.org Cc: Damien Le Moal , Niklas Cassel , Jeff Garzik , Mark Miesfeld , Rupjyoti Sarmah , Prodyut Hazarika , linux-kernel@vger.kernel.org (open list) Subject: [PATCHv4 3/4] ata: sata_dwc_460ex: fix clear_interrupt_bit() clearing all pending interrupts Date: Sun, 12 Jul 2026 14:37:27 -0700 Message-ID: <20260712213728.824420-4-rosenp@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260712213728.824420-1-rosenp@gmail.com> References: <20260712213728.824420-1-rosenp@gmail.com> Precedence: bulk X-Mailing-List: linux-ide@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit clear_interrupt_bit() ignores the bit argument and performs a read-write-back of the entire INTPR register. If INTPR uses standard Write-1-to-Clear semantics, this clears every pending interrupt bit, not just the intended one. Coalesced interrupts (e.g. DMAT + NEWFP) would be cleared together, silently losing the second event. Write only the specific bit to clear so that other pending interrupts are preserved. Fixes: 62936009f35a ("[libata] Add 460EX on-chip SATA driver, sata_dwc_460ex") Assisted-by: opencode:big-pickle Signed-off-by: Rosen Penev --- drivers/ata/sata_dwc_460ex.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/ata/sata_dwc_460ex.c b/drivers/ata/sata_dwc_460ex.c index 85c5e67e9175..bc543a408963 100644 --- a/drivers/ata/sata_dwc_460ex.c +++ b/drivers/ata/sata_dwc_460ex.c @@ -394,8 +394,7 @@ static void clear_serror(struct ata_port *ap) static void clear_interrupt_bit(struct sata_dwc_device *hsdev, u32 bit) { - sata_dwc_writel(&hsdev->sata_dwc_regs->intpr, - sata_dwc_readl(&hsdev->sata_dwc_regs->intpr)); + sata_dwc_writel(&hsdev->sata_dwc_regs->intpr, bit); } static u32 qcmd_tag_to_mask(u8 tag) -- 2.55.0