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[144.49.247.23]) by smtp-relay.gmail.com with ESMTPS id 46e09a7af769-850fa4af679sm82629a34.4.2026.10.26.12.18.22 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 26 Oct 2026 12:18:23 -0700 (PDT) X-Relaying-Domain: broadcom.com X-CFilter-Loop: Reflected Received: by mail-qt1-f198.google.com with SMTP id d75a77b69052e-533928ef33aso41733861cf.1 for ; Mon, 26 Oct 2026 12:18:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; t=1793042301; x=1793647101; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=p/JejeyXs+a2BV9S3GP+DdWRq7anNloDPZ8ebf8LoQg=; b=XcvYzirKIjhjXk7bY8SwlMQKMqHjStk5+OICSrg8oX430GEdJLZeslTRrN5lZDvDiI z3ePH4/DqX5EaDMarzx1kAp73rs/bDKaBVX+bC8QzD4uUfYCZwkHlQyRC3Nv+l5D+Zh/ Ti39SaROwdMLy2FTYegApSxhAMih0sTfsDTfs= X-Forwarded-Encrypted: i=1; AKwUvBy3VNYEdtua5gkoFAWPJwLdNF8VgDqHcpQAComHTNYO4T0twcnuNrYpcO6KPty3mJvD3MZaFYXBBP4=@vger.kernel.org X-Received: by 2002:ac8:6546:0:b0:535:a5fa:ee0c with SMTP id d75a77b69052e-5383b66652emr111406471cf.76.1793042301526; Mon, 26 Oct 2026 12:18:21 -0700 (PDT) X-Received: by 2002:ac8:6546:0:b0:535:a5fa:ee0c with SMTP id d75a77b69052e-5383b66652emr111405901cf.76.1793042300941; Mon, 26 Oct 2026 12:18:20 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-91c62063dacsm33430996d6.37.2026.10.26.12.18.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Oct 2026 12:18:18 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Ray Jui , Scott Branden , Broadcom internal kernel review list , Vinod Koul , Neil Armstrong , Manivannan Sadhasivam , Kishon Vijay Abraham I , Tejun Heo , Yendapally Reddy Dhananjaya Reddy , linux-ide@vger.kernel.org (open list:LIBATA SUBSYSTEM (Serial and Parallel ATA drivers)), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM IPROC ARM ARCHITECTURE), linux-phy@lists.infradead.org (open list:GENERIC PHY FRAMEWORK) Subject: [PATCH v3 6/6] ARM: dts: broadcom: Enable SATA on BCM958625HR Date: Mon, 26 Oct 2026 12:16:18 -0700 Message-ID: <20261026191618.3178830-7-florian.fainelli@broadcom.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20261026191618.3178830-1-florian.fainelli@broadcom.com> References: <20261026191618.3178830-1-florian.fainelli@broadcom.com> X-Mailing-List: linux-ide@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-DetectorID-Processed: b00c1d49-9d2e-4205-b15f-d015386d3d5e Commit 77416ab35f57 ("ARM: dts: NSP: Disable AHCI controller for HR NSP boards") disabled AHCI after reports of boot hangs. Both SATA PHYs remain enabled, but the disabled controller leaves the eSATA ports unavailable. With explicit IDM clock/reset setup and the corrected shared PHY register aperture in place, enable the controller on BCM958625HR. Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/broadcom/bcm958625hr.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/broadcom/bcm958625hr.dts b/arch/arm/boot/dts/broadcom/bcm958625hr.dts index 53acae385822..f6717ca76aef 100644 --- a/arch/arm/boot/dts/broadcom/bcm958625hr.dts +++ b/arch/arm/boot/dts/broadcom/bcm958625hr.dts @@ -184,6 +184,7 @@ partition@700000 { &sata { /delete-property/ dma-coherent; + status = "okay"; }; &sata_phy0 { -- 2.53.0