Re: [PATCH] dt-bindings: ata: convert ata/cortina,gemini-sata-bridge to yaml

LABBE Corentin
2022-01-31T08:11:37Z

Le Mon, Jan 31, 2022 at 09:48:20AM +0900, Damien Le Moal a écrit :
> On 2022/01/30 5:40, Corentin Labbe wrote:
> > This patch converts ata/cortina,gemini-sata-bridge binding to yaml
> >
> > Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
> > ---
> > .../ata/cortina,gemini-sata-bridge.txt | 55 ----------
> > .../ata/cortina,gemini-sata-bridge.yaml | 100 ++++++++++++++++++
> > 2 files changed, 100 insertions(+), 55 deletions(-)
> > delete mode 100644 Documentation/devicetree/bindings/ata/cortina,gemini-sata-bridge.txt
> > create mode 100644 Documentation/devicetree/bindings/ata/cortina,gemini-sata-bridge.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/ata/cortina,gemini-sata-bridge.txt b/Documentation/devicetree/bindings/ata/cortina,gemini-sata-bridge.txt
> > deleted file mode 100644
> > index 1c3d3cc70051..000000000000
> > --- a/Documentation/devicetree/bindings/ata/cortina,gemini-sata-bridge.txt
> > +++ /dev/null
> > @@ -1,55 +0,0 @@
> > -* Cortina Systems Gemini SATA Bridge
> > -
> > -The Gemini SATA bridge in a SoC-internal PATA to SATA bridge that
> > -takes two Faraday Technology FTIDE010 PATA controllers and bridges
> > -them in different configurations to two SATA ports.
> > -
> > -Required properties:
> > -- compatible: should be
> > - "cortina,gemini-sata-bridge"
> > -- reg: registers and size for the block
> > -- resets: phandles to the reset lines for both SATA bridges
> > -- reset-names: must be "sata0", "sata1"
> > -- clocks: phandles to the compulsory peripheral clocks
> > -- clock-names: must be "SATA0_PCLK", "SATA1_PCLK"
> > -- syscon: a phandle to the global Gemini system controller
> > -- cortina,gemini-ata-muxmode: tell the desired multiplexing mode for
> > - the ATA controller and SATA bridges. Values 0..3:
> > - Mode 0: ata0 master <-> sata0
> > - ata1 master <-> sata1
> > - ata0 slave interface brought out on IDE pads
> > - Mode 1: ata0 master <-> sata0
> > - ata1 master <-> sata1
> > - ata1 slave interface brought out on IDE pads
> > - Mode 2: ata1 master <-> sata1
> > - ata1 slave <-> sata0
> > - ata0 master and slave interfaces brought out
> > - on IDE pads
> > - Mode 3: ata0 master <-> sata0
> > - ata0 slave <-> sata1
> > - ata1 master and slave interfaces brought out
> > - on IDE pads
> > -
> > -Optional boolean properties:
> > -- cortina,gemini-enable-ide-pins: enables the PATA to IDE connection.
> > - The muxmode setting decides whether ATA0 or ATA1 is brought out,
> > - and whether master, slave or both interfaces get brought out.
> > -- cortina,gemini-enable-sata-bridge: enables the PATA to SATA bridge
> > - inside the Gemnini SoC. The Muxmode decides what PATA blocks will
> > - be muxed out and how.
> > -
> > -Example:
> > -
> > -sata: sata@46000000 {
> > - compatible = "cortina,gemini-sata-bridge";
> > - reg = <0x46000000 0x100>;
> > - resets = <&rcon 26>, <&rcon 27>;
> > - reset-names = "sata0", "sata1";
> > - clocks = <&gcc GEMINI_CLK_GATE_SATA0>,
> > - <&gcc GEMINI_CLK_GATE_SATA1>;
> > - clock-names = "SATA0_PCLK", "SATA1_PCLK";
> > - syscon = <&syscon>;
> > - cortina,gemini-ata-muxmode = <3>;
> > - cortina,gemini-enable-ide-pins;
> > - cortina,gemini-enable-sata-bridge;
> > -};
> > diff --git a/Documentation/devicetree/bindings/ata/cortina,gemini-sata-bridge.yaml b/Documentation/devicetree/bindings/ata/cortina,gemini-sata-bridge.yaml
> > new file mode 100644
> > index 000000000000..ff27e4884e21
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/ata/cortina,gemini-sata-bridge.yaml
> > @@ -0,0 +1,100 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/ata/cortina,gemini-sata-bridge.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Cortina Systems Gemini SATA Bridge
> > +
> > +maintainers:
> > + - Linus Walleij <linus.walleij@linaro.org>
> > +
> > +description: |
> > + The Gemini SATA bridge in a SoC-internal PATA to SATA bridge that
> > + takes two Faraday Technology FTIDE010 PATA controllers and bridges
> > + them in different configurations to two SATA ports.
> > +
> > +properties:
> > + compatible:
> > + const: "cortina,gemini-sata-bridge"
> > + reg:
> > + minItems: 1
> > + resets:
> > + minItems: 2
> > + description: phandles to the reset lines for both SATA bridges
> > + reset-names:
> > + items:
> > + - const: "sata0"
> > + - const: "sata1"
> > + clocks:
> > + minItems: 2
> > + description: phandles to the compulsory peripheral clocks
> > + clock-names:
> > + items:
> > + - const: "SATA0_PCLK"
> > + - const: "SATA1_PCLK"
> > + syscon:
> > + minItems: 1
> > + $ref: /schemas/types.yaml#/definitions/phandle
> > + description: a phandle to the global Gemini system controller
>
> s/a phandle/phandle ?
>
> Saying "a phandle" seems to imply that there may be many. I am not sure here though.
>
> > + cortina,gemini-ata-muxmode:
> > + $ref: /schemas/types.yaml#/definitions/uint32
> > + enum:
> > + - 0
> > + - 1
> > + - 2
> > + - 3
> > + description: |
> > + tell the desired multiplexing mode for the ATA controller and SATA bridges. Values 0..3:
>
> Nit: Start the sentence with an uppercase "Tell...".
>
> > + Mode 0: ata0 master <-> sata0
> > + ata1 master <-> sata1
> > + ata0 slave interface brought out on IDE pads
> > + Mode 1: ata0 master <-> sata0
> > + ata1 master <-> sata1
> > + ata1 slave interface brought out on IDE pads
> > + Mode 2: ata1 master <-> sata1
> > + ata1 slave <-> sata0
> > + ata0 master and slave interfaces brought out on IDE pads
> > + Mode 3: ata0 master <-> sata0
> > + ata0 slave <-> sata1
> > + ata1 master and slave interfaces brought out on IDE pads
> > +
> > + cortina,gemini-enable-ide-pins:
> > + type: boolean
> > + description: enables the PATA to IDE connection.
>
> Same here.
>
> > + The muxmode setting decides whether ATA0 or ATA1 is brought out,
> > + and whether master, slave or both interfaces get brought out.
> > + cortina,gemini-enable-sata-bridge:
> > + type: boolean
> > + description: enables the PATA to SATA bridge
>
> Ditto. And the line break is a little early. The first line could be longer so
> that everything fits in 2 lines.
>
> > + inside the Gemnini SoC. The Muxmode decides what PATA blocks will
> > + be muxed out and how.
> > +
> > +required:
> > + - clocks
> > + - clock-names
> > + - cortina,gemini-ata-muxmode
> > + - resets
> > + - reset-names
> > + - compatible
> > + - reg
> > + - syscon
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/clock/cortina,gemini-clock.h>
> > + sata: sata@46000000 {
> > + compatible = "cortina,gemini-sata-bridge";
> > + reg = <0x46000000 0x100>;
> > + resets = <&rcon 26>, <&rcon 27>;
> > + reset-names = "sata0", "sata1";
> > + clocks = <&gcc GEMINI_CLK_GATE_SATA0>,
> > + <&gcc GEMINI_CLK_GATE_SATA1>;
> > + clock-names = "SATA0_PCLK", "SATA1_PCLK";
> > + syscon = <&syscon>;
> > + cortina,gemini-ata-muxmode = <3>;
> > + cortina,gemini-enable-ide-pins;
> > + cortina,gemini-enable-sata-bridge;
> > + };
>
> With the above cosmetic nits addressed (if necessary):
>
> Acked-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
>

Hello

I will fix all thoses in v2.

Thanks!