Re: libata and software reset

[John Garry <john.garry@huawei.com>]

On 19/10/2022 11:15, Damien Le Moal wrote:
>> For hisi_sas, maybe ATA_CMD_DEV_RESET is silently ignored when issued
>> for a SATA disk, but having SRST set/unset still takes effect (and that
>> is how it still works). I need to check on that.
> Checked SATA-IO v3.5a. Software reset is explained in "11.4
> Software reset protocol" and involves 2 things for the host to do:
> 
> DSR0: Software_reset_asserted, this state is entered if a Register Host
> to Device FIS is received with the C bit in the FIS cleared to zero and
> the SRST bit set to one in the Device Control register.
> If in this state, the device begins its initialization and diagnostics
> processing and awaits the clearing of the SRST bit.
> 
> DSR1: Execute_diagnostics, this state is entered if a Register Host to
> Device FIS is received with the C bit in the FIS cleared to zero and the
> SRST bit cleared to zero in the Device Control register.
> If in this state, the device completes initialization and processing of
> its diagnostics.
> 
> Which confirms what libahci is doing: essentially zeroing a tf with
> ata_tf_init() and setting + resetting the SRST bit, sending the tf each
> time.

Ah, so since the C bit is not set in hisi_sas_fill_ata_reset_cmd(), I 
think that the command field is just ignored. Indeed, the spec says that 
setting C and SRST together is invalid.

Thanks,
John