From: Jeff Garzik <jgarzik@pobox.com>
To: Pat LaVarre <p.lavarre@ieee.org>
Cc: linux-ide@vger.kernel.org
Subject: Re: [PATCH] libata atapi work #5
Date: Fri, 14 May 2004 16:15:58 -0400 [thread overview]
Message-ID: <40A528FE.8040301@pobox.com> (raw)
In-Reply-To: <1084564801.3084.13.camel@patibmrh9>
Pat LaVarre wrote:
> Jeff G:
>
>
>>an open IP core
>>compliant to the AHCI specification:
>>http://www.intel.com/technology/serialata/pdf/rev1_0.pdf
>
>
> Does the web now offer PCI chip designs in open source?
Yes. http://www.opencores.org/projects.cgi/web/pci
The above IP core bridges from the PCI bus to the internal wishbone [IP
core interconnect] bus.
In theory, you connect your AHCI IP core to the PCI IP core via
wishbone. opencores.org also has a wishbone-compliant DMA engine.
> 1987..1990 or so I did register-transfer-level chip design (a la
> Verilog). I naturally prefer concurrent designs over sequential.
All good EE designs are concurrent rather than sequential ;-)
But I'm a computer scientist, what do I know...
Jeff
next prev parent reply other threads:[~2004-05-14 20:16 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2004-05-14 18:42 [PATCH] libata atapi work #5 Pat LaVarre
2004-05-14 19:09 ` Jeff Garzik
2004-05-14 19:27 ` Pat LaVarre
2004-05-14 19:47 ` Jeff Garzik
2004-05-14 20:00 ` Pat LaVarre
2004-05-14 20:14 ` Leon Woestenberg
2004-05-14 20:15 ` Jeff Garzik [this message]
2004-05-14 20:23 ` Leon Woestenberg
2004-05-14 20:29 ` Jeff Garzik
2004-05-14 23:09 ` Pat LaVarre
2004-05-15 0:01 ` Jeff Garzik
-- strict thread matches above, loose matches on Subject: below --
2004-05-14 18:26 Jeff Garzik
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